1 /* 2 * Copyright (c) 2024 Arm Limited. All rights reserved. 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 /** 18 * \file host_clus_util_lcp_memory_map.h 19 * \brief This file contains addresses that are defined in the compute 20 * subsystem (CSS) LCP and cluster utility memory map. 21 */ 22 23 #ifndef __HOST_CLUS_UTIL_LCP_MEMORY_MAP_H__ 24 #define __HOST_CLUS_UTIL_LCP_MEMORY_MAP_H__ 25 26 /* LCP memory map base address */ 27 #define HOST_LCP_MMAP_PHYS_BASE 0x00000000ULL 28 /* LCP memory map end address */ 29 #define HOST_LCP_MMAP_PHYS_LIMIT 0xFFFFFFFFULL 30 31 /* 32 * Following are address offsets for each cluster's memory map. 33 * phys_address = 0x200000000 + (CLUSTER_IDX * 0x200000) + following offsets 34 */ 35 /* LCP + SMCF components base address */ 36 #define HOST_CLUS_UTIL_LCP_SMCF_OFF_ADDR_PHYS_BASE 0x00000000ULL 37 /* LCP + SMCF components end address */ 38 #define HOST_CLUS_UTIL_LCP_SMCF_OFF_ADDR_PHYS_LIMIT 0x000FFFFFULL 39 40 /* Cluster control base address */ 41 #define HOST_CLUS_UTIL_CLUS_CTRL_OFF_ADDR_PHYS_BASE 0x00100000ULL 42 /* Cluster control end address */ 43 #define HOST_CLUS_UTIL_CLUS_CTRL_OFF_ADDR_PHYS_LIMIT 0x0015FFFFULL 44 45 /* PPU base address */ 46 #define HOST_CLUS_UTIL_PPU_OFF_ADDR_PHYS_BASE 0x00180000ULL 47 /* PPU end address */ 48 #define HOST_CLUS_UTIL_PPU_OFF_ADDR_PHYS_LIMIT 0x0018FFFFULL 49 50 /* AMU base address */ 51 #define HOST_CLUS_UTIL_AMU_OFF_ADDR_PHYS_BASE 0x00190000ULL 52 /* AMU end address */ 53 #define HOST_CLUS_UTIL_AMU_OFF_ADDR_PHYS_LIMIT 0x0019FFFFULL 54 55 /* RAS base address */ 56 #define HOST_CLUS_UTIL_RAS_OFF_ADDR_PHYS_BASE 0x001A0000ULL 57 /* RAS end address */ 58 #define HOST_CLUS_UTIL_RAS_OFF_ADDR_PHYS_LIMIT 0x001AFFFFULL 59 60 /* MPMM base address */ 61 #define HOST_CLUS_UTIL_MPMM_OFF_ADDR_PHYS_BASE 0x001B0000ULL 62 /* MPMM end address */ 63 #define HOST_CLUS_UTIL_MPMM_OFF_ADDR_PHYS_LIMIT 0x001BFFFFULL 64 65 #endif /* __HOST_CLUS_UTIL_LCP_MEMORY_MAP_H__ */ 66
