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Searched defs:HFCORECLKEN0 (Results 1 – 25 of 68) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_cmu.h63 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32hg210f32.h268 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32hg210f64.h268 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32hg222f32.h268 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32hg222f64.h268 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32hg110f32.h268 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32hg110f64.h268 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_cmu.h63 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg380f128.h320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg380f256.h320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg380f64.h320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg390f128.h320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg390f256.h320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg390f64.h320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg395f128.h320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg395f256.h320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg395f64.h320 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg280f128.h311 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg280f256.h311 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg280f64.h311 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg290f128.h311 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg290f256.h311 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg290f64.h311 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg295f128.h311 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member
Defm32wg295f256.h311 __IOM uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */ member

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