1 /** 2 ****************************************************************************** 3 * @file stm32u0xx_hal_flash.h 4 * @author MCD Application Team 5 * @brief Header file of FLASH HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file in 13 * the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 ****************************************************************************** 16 */ 17 18 /* Define to prevent recursive inclusion -------------------------------------*/ 19 #ifndef STM32U0xx_HAL_FLASH_H 20 #define STM32U0xx_HAL_FLASH_H 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "stm32u0xx_hal_def.h" 28 29 /** @addtogroup STM32U0xx_HAL_Driver 30 * @{ 31 */ 32 33 /** @addtogroup FLASH 34 * @{ 35 */ 36 37 /* Exported types ------------------------------------------------------------*/ 38 /** @defgroup FLASH_Exported_Types FLASH Exported Types 39 * @{ 40 */ 41 42 /** 43 * @brief FLASH Erase structure definition 44 */ 45 typedef struct 46 { 47 uint32_t TypeErase; /*!< Mass erase or page erase. 48 This parameter can be a value of @ref FLASH_Type_Erase */ 49 uint32_t Banks; /*!< Select bank to erase. 50 This parameter must be a value of @ref FLASH_Banks 51 (FLASH_BANK_BOTH should be used only for mass erase) */ 52 uint32_t Page; /*!< Initial Flash page to erase when page erase is enabled 53 This parameter must be a value between 0 and (FLASH_PAGE_NB - 1) */ 54 uint32_t NbPages; /*!< Number of pages to be erased. 55 This parameter must be a value between 1 and (FLASH_PAGE_NB - value of initial page)*/ 56 } FLASH_EraseInitTypeDef; 57 58 /** 59 * @brief FLASH Option Bytes Program structure definition 60 */ 61 typedef struct 62 { 63 uint32_t OptionType; /*!< Option byte to be configured. 64 This parameter can be a combination of the values of @ref FLASH_OB_Type */ 65 uint32_t WRPArea; /*!< Write protection area to be programmed (used for OPTIONBYTE_WRP). 66 Only one WRP area could be programmed at the same time. 67 This parameter can be value of @ref FLASH_OB_WRP_Area */ 68 uint32_t WRPStartOffset; /*!< Write protection start offset (used for OPTIONBYTE_WRP). 69 This parameter must be a value between 0 and [FLASH_PAGE_NB - 1]*/ 70 uint32_t WRPEndOffset; /*!< Write protection end offset (used for OPTIONBYTE_WRP). 71 This parameter must be a value between WRPStartOffset and [FLASH_PAGE_NB - 1] */ 72 uint32_t RDPLevel; /*!< Set the read protection level (used for OPTIONBYTE_RDP). 73 This parameter can be a value of @ref FLASH_OB_Read_Protection */ 74 uint32_t USERType; /*!< User option byte(s) to be configured (used for OPTIONBYTE_USER). 75 This parameter can be a combination of @ref FLASH_OB_USER_Type */ 76 uint32_t USERConfig; /*!< Value of the user option byte (used for OPTIONBYTE_USER). 77 This parameter can be a combination of 78 @ref FLASH_OB_USER_BOR_ENABLE, 79 @ref FLASH_OB_USER_BOR_LEVEL, 80 @ref FLASH_OB_USER_RESET_CONFIG, 81 @ref FLASH_OB_USER_NRST_STOP, 82 @ref FLASH_OB_USER_NRST_STANDBY, 83 @ref FLASH_OB_USER_NRST_SHUTDOWN, 84 @ref FLASH_OB_USER_IWDG_SW, 85 @ref FLASH_OB_USER_IWDG_STOP, 86 @ref FLASH_OB_USER_IWDG_STANDBY, 87 @ref FLASH_OB_USER_WWDG_SW, 88 @ref FLASH_OB_USER_SRAM_PARITY, 89 @ref FLASH_OB_USER_NBOOT_SEL, 90 @ref FLASH_OB_USER_NBOOT1, 91 @ref FLASH_OB_USER_NBOOT0, 92 @ref FLASH_OB_USER_INPUT_RESET_HOLDER */ 93 uint32_t RDPKeyType; /*!< Configuration of the RDP OEM keys (used for OPTIONBYTE_RDPKEY). 94 This parameter can be a value of @ref FLASH_OB_RDP_Key_Type */ 95 uint32_t RDPKey1; /*!< Value of the RDP OEM key 1 (used for OPTIONBYTE_RDPKEY) */ 96 uint32_t RDPKey2; /*!< Value of the RDP OEM key 1 (used for OPTIONBYTE_RDPKEY) */ 97 uint32_t RDPKey3; /*!< Value of the RDP OEM key 1 (used for OPTIONBYTE_RDPKEY) */ 98 uint32_t RDPKey4; /*!< Value of the RDP OEM key 1 (used for OPTIONBYTE_RDPKEY) */ 99 uint32_t BootLock; /*!< Allow to force a unique boot entry point to Flash or system Flash */ 100 uint32_t HDPEndPage; /*!< This parameter defines Hide protection area end page */ 101 uint32_t HDPState; /*!< Hide protection area enable */ 102 } FLASH_OBProgramInitTypeDef; 103 104 /** 105 * @brief FLASH handle Structure definition 106 */ 107 typedef struct 108 { 109 HAL_LockTypeDef Lock; /* FLASH locking object */ 110 uint32_t ErrorCode; /* FLASH error code */ 111 uint32_t ProcedureOnGoing; /* Internal variable to indicate which procedure is ongoing or not in IT context */ 112 uint32_t Address; /* Internal variable to save address selected for program in IT context */ 113 uint32_t Banks; /* Internal variable to save current bank selected during erase in IT context */ 114 uint32_t Page; /* Internal variable to define the current page which is erasing in IT context */ 115 uint32_t NbPagesToErase; /* Internal variable to save the remaining pages to erase in IT context */ 116 } FLASH_ProcessTypeDef; 117 118 /** 119 * @brief FLASH HDP Extension structure definition 120 */ 121 typedef struct 122 { 123 uint32_t Status; /*!< State of the HDP Extension area @ref FLASHEx_HDPEXT_Access */ 124 uint32_t NbPages; /*!< Number of pages to be HDP extended. 125 This parameter can be a value between 1 and max number of pages in the flash */ 126 } FLASH_HDPExtensionTypeDef; 127 128 /** 129 * @} 130 */ 131 132 /** 133 * @} 134 */ 135 136 /* Exported constants --------------------------------------------------------*/ 137 /** @defgroup FLASH_Exported_Constants FLASH Exported Constants 138 * @{ 139 */ 140 /** @defgroup FLASH_Keys FLASH Keys 141 * @{ 142 */ 143 #define FLASH_KEY1 0x45670123U /*!< Flash key1 */ 144 #define FLASH_KEY2 0xCDEF89ABU /*!< Flash key2: used with FLASH_KEY1 \ 145 to unlock the FLASH registers access */ 146 #define FLASH_OPTKEY1 0x08192A3BU /*!< Flash option byte key1 */ 147 #define FLASH_OPTKEY2 0x4C5D6E7FU /*!< Flash option byte key2: used with FLASH_OPTKEY1 \ 148 to allow option bytes operations */ 149 150 /** 151 * @} 152 */ 153 154 /** @defgroup FLASH_OB_RDP_Key_Type FLASH Option Bytes Read Protection Key Type 155 * @{ 156 */ 157 #define OB_RDP_KEY_OEM1 0x01U /*!< OEM1 key */ 158 #define OB_RDP_KEY_OEM2 0x02U /*!< OEM2 key */ 159 /** 160 * @} 161 */ 162 163 /** @defgroup FLASH_Latency FLASH Latency 164 * @{ 165 */ 166 #define FLASH_LATENCY_0 0x00000000UL /*!< FLASH Zero wait state */ 167 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_0 /*!< FLASH One wait state */ 168 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_1 /*!< FLASH Two wait states */ 169 /** 170 * @} 171 */ 172 173 /** @defgroup FLASH_Flags FLASH Flags Definition 174 * @{ 175 */ 176 #define FLASH_FLAG_EOP ((FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS) | FLASH_SR_EOP_Pos) /*!< FLASH End of operation flag */ 177 #define FLASH_FLAG_OPERR ((FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS) | FLASH_SR_OPERR_Pos) /*!< FLASH Operation error flag */ 178 #define FLASH_FLAG_PROGERR ((FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS) | FLASH_SR_PROGERR_Pos) /*!< FLASH Programming error flag */ 179 #define FLASH_FLAG_WRPERR ((FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS) | FLASH_SR_WRPERR_Pos) /*!< FLASH Write protection error flag */ 180 #define FLASH_FLAG_PGAERR ((FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS) | FLASH_SR_PGAERR_Pos) /*!< FLASH Programming alignment error flag */ 181 #define FLASH_FLAG_SIZERR ((FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS) | FLASH_SR_SIZERR_Pos) /*!< FLASH Size error flag */ 182 #define FLASH_FLAG_PGSERR ((FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS) | FLASH_SR_PGSERR_Pos) /*!< FLASH Programming sequence error flag */ 183 #define FLASH_FLAG_MISERR ((FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS) | FLASH_SR_MISERR_Pos) /*!< FLASH Fast programming data miss error flag */ 184 #define FLASH_FLAG_FASTERR ((FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS) | FLASH_SR_FASTERR_Pos) /*!< FLASH Fast programming error flag */ 185 #define FLASH_FLAG_OPTVERR ((FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS) | FLASH_SR_OPTVERR_Pos) /*!< FLASH Option validity error flag */ 186 #define FLASH_FLAG_BSY1 ((FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS) | FLASH_SR_BSY1_Pos) /*!< FLASH Operation Busy flag for Bank 1 */ 187 #define FLASH_FLAG_BSY FLASH_FLAG_BSY1 /*!< FLASH Operation Busy flag - legacy name for single bank */ 188 #define FLASH_FLAG_CFGBSY ((FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS) | FLASH_SR_CFGBSY_Pos) /*!< FLASH Configuration Busy flag */ 189 #define FLASH_FLAG_ECCC1 ((FLASH_FLAG_ECCR1_ID << FLASH_FLAG_REG_POS) | FLASH_ECCR_ECCC_Pos) /*!< FLASH ECC correction on bank 1 */ 190 #define FLASH_FLAG_ECCD1 ((FLASH_FLAG_ECCR1_ID << FLASH_FLAG_REG_POS) | FLASH_ECCR_ECCD_Pos) /*!< FLASH ECC detection on bank 1 */ 191 #define FLASH_FLAG_ECCC FLASH_FLAG_ECCC1 /*!< FLASH ECC correction - legacy name for single bank */ 192 #define FLASH_FLAG_ECCD FLASH_FLAG_ECCD1 /*!< FLASH ECC detection - legacy name for single bank */ 193 /** 194 * @} 195 */ 196 197 /** @defgroup FLASH_Interrupt_definition FLASH Interrupts Definition 198 * @brief FLASH Interrupt definition 199 * @{ 200 */ 201 #define FLASH_IT_EOP ((FLASH_FLAG_CR_ID << FLASH_FLAG_REG_POS) | FLASH_CR_EOPIE_Pos) /*!< End of FLASH Operation Interrupt source */ 202 #define FLASH_IT_OPERR ((FLASH_FLAG_CR_ID << FLASH_FLAG_REG_POS) | FLASH_CR_ERRIE_Pos) /*!< Error Interrupt source */ 203 #define FLASH_IT_ECCC1 ((FLASH_FLAG_ECCR1_ID << FLASH_FLAG_REG_POS) | FLASH_ECCR_ECCCIE_Pos) /*!< ECC Correction on Bank 1 Interrupt source */ 204 #define FLASH_IT_ECCC FLASH_IT_ECCC1 /*!< ECC Correction - legacy name for single bank */ 205 /** 206 * @} 207 */ 208 209 /** @defgroup FLASH_Error FLASH Error 210 * @{ 211 */ 212 #define HAL_FLASH_ERROR_NONE 0x00000000U 213 #define HAL_FLASH_ERROR_OP FLASH_SR_OPERR 214 #define HAL_FLASH_ERROR_PROG FLASH_SR_PROGERR 215 #define HAL_FLASH_ERROR_WRP FLASH_SR_WRPERR 216 #define HAL_FLASH_ERROR_PGA FLASH_SR_PGAERR 217 #define HAL_FLASH_ERROR_SIZ FLASH_SR_SIZERR 218 #define HAL_FLASH_ERROR_PGS FLASH_SR_PGSERR 219 #define HAL_FLASH_ERROR_MIS FLASH_SR_MISERR 220 #define HAL_FLASH_ERROR_FAST FLASH_SR_FASTERR 221 #define HAL_FLASH_ERROR_HDPOPT FLASH_SR_HDPOPTWERR 222 #define HAL_FLASH_ERROR_OEMOPT FLASH_SR_OEMOPTWERR 223 #define HAL_FLASH_ERROR_OPTV FLASH_SR_OPTVERR 224 #define HAL_FLASH_ERROR_ECCD FLASH_ECCR_ECCD 225 /** 226 * @} 227 */ 228 229 /** @defgroup FLASH_Type_Erase FLASH Erase Type 230 * @{ 231 */ 232 #define FLASH_TYPEERASE_PAGES FLASH_CR_PER /*!< Pages erase only */ 233 #define FLASH_TYPEERASE_MASS FLASH_CR_MER1 /*!< Flash mass erase activation */ 234 /** 235 * @} 236 */ 237 238 /** @defgroup FLASH_Banks FLASH Banks 239 * @{ 240 */ 241 #define FLASH_BANK_1 1U /*!< Bank 1 */ 242 /** 243 * @} 244 */ 245 246 247 /** @defgroup FLASH_Type_Program FLASH Program Type 248 * @{ 249 */ 250 #define FLASH_TYPEPROGRAM_DOUBLEWORD FLASH_CR_PG /*!< Program a double-word (64-bit) at a specified address */ 251 #define FLASH_TYPEPROGRAM_FAST FLASH_CR_FSTPG /*!< Fast program a 32 row double-word (64-bit) at a specified address */ 252 /** 253 * @} 254 */ 255 256 /** @defgroup FLASH_OB_Type FLASH Option Bytes Type 257 * @{ 258 */ 259 #define OPTIONBYTE_WRP 0x00000001U /*!< WRP option byte configuration */ 260 #define OPTIONBYTE_RDP 0x00000002U /*!< RDP option byte configuration */ 261 #define OPTIONBYTE_USER 0x00000004U /*!< USER option byte configuration */ 262 #define OPTIONBYTE_HDP 0x00000008U /*!< HDP option byte configuration */ 263 #define OPTIONBYTE_RDPKEY 0x00000010U /*!< RDP OEM KEYs option byte configuration */ 264 265 #define OPTIONBYTE_ALL (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | \ 266 OPTIONBYTE_HDP | OPTIONBYTE_RDPKEY) /*!< All option byte configuration */ 267 /** 268 * @} 269 */ 270 271 /** @defgroup FLASH_OB_WRP_Area FLASH WRP Area 272 * @{ 273 */ 274 #define OB_WRPAREA_ZONE_A 0x00000001U /*!< Flash Zone A */ 275 #define OB_WRPAREA_ZONE_B 0x00000002U /*!< Flash Zone B */ 276 /** 277 * @} 278 */ 279 280 /** @defgroup FLASH_OB_Read_Protection FLASH Option Bytes Read Protection 281 * @{ 282 */ 283 #define OB_RDP_LEVEL_0 0x000000AAU 284 #define OB_RDP_LEVEL_1 0x000000BBU 285 #define OB_RDP_LEVEL_2 0x000000CCU /*!< Warning: When enabling read protection level 2 \ 286 it is no more possible to go back to level 1 or 0 */ 287 /** 288 * @} 289 */ 290 291 /** @defgroup FLASH_OB_USER_Type FLASH Option Bytes User Type 292 * @{ 293 */ 294 #define OB_USER_BOR_EN FLASH_OPTR_BOR_EN /*!< BOR reset enable */ 295 #define OB_USER_BOR_LEV (FLASH_OPTR_BORF_LEV | FLASH_OPTR_BORR_LEV) /*!< BOR reset Level */ 296 #define OB_USER_NRST_STOP FLASH_OPTR_nRST_STOP /*!< Reset generated when entering the stop mode */ 297 #define OB_USER_NRST_STDBY FLASH_OPTR_nRST_STDBY /*!< Reset generated when entering the standby mode */ 298 #define OB_USER_NRST_SHDW FLASH_OPTR_nRST_SHDW /*!< Reset generated when entering the shutdown mode */ 299 #define OB_USER_IWDG_SW FLASH_OPTR_IWDG_SW /*!< Independent watchdog selection */ 300 #define OB_USER_IWDG_STOP FLASH_OPTR_IWDG_STOP /*!< Independent watchdog counter freeze in stop mode */ 301 #define OB_USER_IWDG_STDBY FLASH_OPTR_IWDG_STDBY /*!< Independent watchdog counter freeze in standby mode */ 302 #define OB_USER_WWDG_SW FLASH_OPTR_WWDG_SW /*!< Window watchdog selection */ 303 #define OB_USER_RAM_PARITY_CHECK FLASH_OPTR_RAM_PARITY_CHECK /*!< Sram parity check control */ 304 #define OB_USER_NBOOT_SEL FLASH_OPTR_nBOOT_SEL /*!< Boot Selection */ 305 #define OB_USER_NBOOT1 FLASH_OPTR_nBOOT1 /*!< nBoot1 configuration */ 306 #define OB_USER_NBOOT0 FLASH_OPTR_nBOOT0 /*!< nBoot0 configuration */ 307 #define OB_USER_NRST_MODE FLASH_OPTR_NRST_MODE /*!< Reset pin configuration */ 308 #define OB_USER_INPUT_RESET_HOLDER FLASH_OPTR_IRHEN /*!< Internal reset holder enable */ 309 310 #define OB_USER_ALL (OB_USER_BOR_EN | OB_USER_BOR_LEV | OB_USER_NRST_STOP | \ 311 OB_USER_NRST_STDBY | OB_USER_NRST_SHDW | OB_USER_IWDG_SW | \ 312 OB_USER_IWDG_STOP | OB_USER_IWDG_STDBY | OB_USER_WWDG_SW | \ 313 OB_USER_RAM_PARITY_CHECK | OB_USER_NBOOT_SEL | OB_USER_NBOOT1 | \ 314 OB_USER_NBOOT0 | OB_USER_NRST_MODE | OB_USER_INPUT_RESET_HOLDER) /*!< all option bits */ 315 /** 316 * @} 317 */ 318 319 /** @defgroup FLASH_OB_USER_BOR_ENABLE FLASH Option Bytes User BOR enable 320 * @{ 321 */ 322 #define OB_BOR_DISABLE 0x00000000U /*!< BOR Reset set to default */ 323 #define OB_BOR_ENABLE FLASH_OPTR_BOR_EN /*!< Use option byte to define BOR thresholds */ 324 /** 325 * @} 326 */ 327 328 /** @defgroup FLASH_OB_USER_BOR_LEVEL FLASH Option Bytes User BOR Level 329 * @{ 330 */ 331 #define OB_BOR_LEVEL_FALLING_0 0x00000000U /*!< BOR falling level 1 with threshold around 2.0V */ 332 #define OB_BOR_LEVEL_FALLING_1 FLASH_OPTR_BORF_LEV_0 /*!< BOR falling level 2 with threshold around 2.2V */ 333 #define OB_BOR_LEVEL_FALLING_2 FLASH_OPTR_BORF_LEV_1 /*!< BOR falling level 3 with threshold around 2.5V */ 334 #define OB_BOR_LEVEL_FALLING_3 (FLASH_OPTR_BORF_LEV_0 | FLASH_OPTR_BORF_LEV_1) /*!< BOR falling level 4 with threshold around 2.8V */ 335 #define OB_BOR_LEVEL_RISING_0 0x00000000U /*!< BOR rising level 1 with threshold around 2.1V */ 336 #define OB_BOR_LEVEL_RISING_1 FLASH_OPTR_BORR_LEV_0 /*!< BOR rising level 2 with threshold around 2.3V */ 337 #define OB_BOR_LEVEL_RISING_2 FLASH_OPTR_BORR_LEV_1 /*!< BOR rising level 3 with threshold around 2.6V */ 338 #define OB_BOR_LEVEL_RISING_3 (FLASH_OPTR_BORR_LEV_0 | FLASH_OPTR_BORR_LEV_1) /*!< BOR rising level 4 with threshold around 2.9V */ 339 /** 340 * @} 341 */ 342 343 /** @defgroup FLASH_OB_USER_NRST_STOP FLASH Option Bytes User Reset On Stop 344 * @{ 345 */ 346 #define OB_STOP_RST 0x00000000U /*!< Reset generated when entering the stop mode */ 347 #define OB_STOP_NORST FLASH_OPTR_nRST_STOP /*!< No reset generated when entering the stop mode */ 348 /** 349 * @} 350 */ 351 352 /** @defgroup FLASH_OB_USER_NRST_STANDBY FLASH Option Bytes User Reset On Standby 353 * @{ 354 */ 355 #define OB_STANDBY_RST 0x00000000U /*!< Reset generated when entering the standby mode */ 356 #define OB_STANDBY_NORST FLASH_OPTR_nRST_STDBY /*!< No reset generated when entering the standby mode */ 357 /** 358 * @} 359 */ 360 361 /** @defgroup FLASH_OB_USER_NRST_SHUTDOWN FLASH Option Bytes User Reset On Shutdown 362 * @{ 363 */ 364 #define OB_SHUTDOWN_RST 0x00000000U /*!< Reset generated when entering the shutdown mode */ 365 #define OB_SHUTDOWN_NORST FLASH_OPTR_nRST_SHDW /*!< No reset generated when entering the shutdown mode */ 366 /** 367 * @} 368 */ 369 370 /** @defgroup FLASH_OB_USER_IWDG_SW FLASH Option Bytes User IWDG Type 371 * @{ 372 */ 373 #define OB_IWDG_HW 0x00000000U /*!< Hardware independent watchdog */ 374 #define OB_IWDG_SW FLASH_OPTR_IWDG_SW /*!< Software independent watchdog */ 375 /** 376 * @} 377 */ 378 379 /** @defgroup FLASH_OB_USER_IWDG_STOP FLASH Option Bytes User IWDG Mode On Stop 380 * @{ 381 */ 382 #define OB_IWDG_STOP_FREEZE 0x00000000U /*!< Independent watchdog counter is frozen in Stop mode */ 383 #define OB_IWDG_STOP_RUN FLASH_OPTR_IWDG_STOP /*!< Independent watchdog counter is running in Stop mode */ 384 /** 385 * @} 386 */ 387 388 /** @defgroup FLASH_OB_USER_IWDG_STANDBY FLASH Option Bytes User IWDG Mode On Standby 389 * @{ 390 */ 391 #define OB_IWDG_STDBY_FREEZE 0x00000000U /*!< Independent watchdog counter is frozen in Standby mode */ 392 #define OB_IWDG_STDBY_RUN FLASH_OPTR_IWDG_STDBY /*!< Independent watchdog counter is running in Standby mode */ 393 /** 394 * @} 395 */ 396 397 /** @defgroup FLASH_OB_USER_WWDG_SW FLASH Option Bytes User WWDG Type 398 * @{ 399 */ 400 #define OB_WWDG_HW 0x00000000U /*!< Hardware window watchdog */ 401 #define OB_WWDG_SW FLASH_OPTR_WWDG_SW /*!< Software window watchdog */ 402 /** 403 * @} 404 */ 405 406 /** @defgroup FLASH_OB_USER_SRAM_PARITY FLASH Option Bytes User SRAM parity 407 * @{ 408 */ 409 #define OB_SRAM_PARITY_ENABLE 0x00000000U /*!< Sram parity enable */ 410 #define OB_SRAM_PARITY_DISABLE FLASH_OPTR_RAM_PARITY_CHECK /*!< Sram parity disable */ 411 /** 412 * @} 413 */ 414 415 /** @defgroup FLASH_OB_USER_NBOOT_SEL FLASH Option Bytes User Boot0 Selection 416 * @{ 417 */ 418 #define OB_BOOT0_FROM_PIN 0x00000000U /*!< BOOT0 signal is defined by PA14/BOOT0 pin value */ 419 #define OB_BOOT0_FROM_OB FLASH_OPTR_nBOOT_SEL /*!< BOOT0 signal is defined by nBOOT0 option bit */ 420 /** 421 * @} 422 */ 423 424 /** @defgroup FLASH_OB_USER_NBOOT1 FLASH Option Bytes User BOOT1 Type 425 * @{ 426 */ 427 #define OB_BOOT1_SRAM 0x00000000U /*!< Embedded SRAM is selected as boot space (if nBOOT0=0 or BOOT0_pin=1) */ 428 #define OB_BOOT1_SYSTEM FLASH_OPTR_nBOOT1 /*!< System memory is selected as boot space (if nBOOT0=0 or BOOT0_pin=1) */ 429 /** 430 * @} 431 */ 432 433 /** @defgroup FLASH_OB_USER_NBOOT0 FLASH Option Bytes User nBOOT0 option bit 434 * @{ 435 */ 436 #define OB_NBOOT0_RESET 0x00000000U /*!< nBOOT0 = 0 */ 437 #define OB_NBOOT0_SET FLASH_OPTR_nBOOT0 /*!< nBOOT0 = 1 */ 438 /** 439 * @} 440 */ 441 442 /** @defgroup FLASH_OB_USER_RESET_CONFIG FLASH Option Bytes User reset config bit 443 * @{ 444 */ 445 #define OB_RESET_MODE_INPUT_ONLY FLASH_OPTR_NRST_MODE_0 /*!< Reset pin is in Reset input mode only */ 446 #define OB_RESET_MODE_GPIO FLASH_OPTR_NRST_MODE_1 /*!< Reset pin is in GPIO mode mode only */ 447 #define OB_RESET_MODE_INPUT_OUTPUT FLASH_OPTR_NRST_MODE /*!< Reset pin is in reset input and output mode */ 448 /** 449 * @} 450 */ 451 452 /** @defgroup FLASH_OB_USER_INPUT_RESET_HOLDER FLASH Option Bytes User input reset holder bit 453 * @{ 454 */ 455 #define OB_IRH_ENABLE 0x00000000U /*!< Internal Reset handler enable */ 456 #define OB_IRH_DISABLE FLASH_OPTR_IRHEN /*!< Internal Reset handler disable */ 457 /** 458 * @} 459 */ 460 461 462 /** @defgroup FLASH_OB_SEC_BOOT_LOCK FLASH Option Bytes Secure boot lock 463 * @{ 464 */ 465 #define OB_BOOT_LOCK_DISABLE 0x00000000U /*!< Boot Lock is free */ 466 #define OB_BOOT_LOCK_ENABLE FLASH_SECR_BOOT_LOCK /*!< Boot Lock is forced to Flash or System Flash */ 467 /** 468 * @} 469 */ 470 471 /** 472 * @} 473 */ 474 475 /* Exported macros -----------------------------------------------------------*/ 476 /** @defgroup FLASH_Exported_Macros FLASH Exported Macros 477 * @brief macros to control FLASH features 478 * @{ 479 */ 480 481 /** 482 * @brief Set the FLASH Latency. 483 * @param __LATENCY__ FLASH Latency 484 * This parameter can be one of the following values : 485 * @arg @ref FLASH_LATENCY_0 FLASH Zero wait state 486 * @arg @ref FLASH_LATENCY_1 FLASH One wait state 487 * @arg @ref FLASH_LATENCY_2 FLASH Two wait states 488 * @retval None 489 */ 490 #define __HAL_FLASH_SET_LATENCY(__LATENCY__) MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (__LATENCY__)) 491 492 /** 493 * @brief Get the FLASH Latency. 494 * @retval FLASH Latency 495 * Returned value can be one of the following values : 496 * @arg @ref FLASH_LATENCY_0 FLASH Zero wait state 497 * @arg @ref FLASH_LATENCY_1 FLASH One wait state 498 * @arg @ref FLASH_LATENCY_2 FLASH Two wait states 499 */ 500 #define __HAL_FLASH_GET_LATENCY() READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) 501 502 /** 503 * @brief Enable the FLASH prefetch buffer. 504 * @retval None 505 */ 506 #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) 507 508 /** 509 * @brief Disable the FLASH prefetch buffer. 510 * @retval None 511 */ 512 #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) 513 514 /** 515 * @brief Enable the FLASH instruction cache. 516 * @retval none 517 */ 518 #define __HAL_FLASH_INSTRUCTION_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_ICEN) 519 520 /** 521 * @brief Disable the FLASH instruction cache. 522 * @retval none 523 */ 524 #define __HAL_FLASH_INSTRUCTION_CACHE_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICEN) 525 526 /** 527 * @brief Reset the FLASH instruction Cache. 528 * @note This function must be used only when the Instruction Cache is disabled. 529 * @retval None 530 */ 531 #define __HAL_FLASH_INSTRUCTION_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_ICRST); \ 532 CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICRST); \ 533 } while (0U) 534 /** 535 * @} 536 */ 537 538 /** @defgroup FLASH_Interrupt FLASH Interrupts Macros 539 * @brief macros to handle FLASH interrupts 540 * @{ 541 */ 542 543 /** 544 * @brief Enable the specified FLASH interrupt. 545 * @param __INTERRUPT__ FLASH interrupt 546 * This parameter can be one of the following values : 547 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 548 * @arg @ref FLASH_IT_OPERR Error Interrupt 549 * @arg @ref FLASH_IT_ECCC1 ECC Correction Interrupt on bank 1 550 * @arg @ref FLASH_IT_ECCC ECC Correction Interrupt - legacy name for single bank 551 * @retval none 552 */ 553 554 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) \ 555 do { \ 556 if(((__INTERRUPT__) & (FLASH_FLAG_CR_ID << FLASH_FLAG_REG_POS)) != 0U) \ 557 { \ 558 SET_BIT(FLASH->CR, (1UL << ((__INTERRUPT__) & 0x1FU))); \ 559 } \ 560 else if (((__INTERRUPT__) & (FLASH_FLAG_ECCR1_ID << FLASH_FLAG_REG_POS)) != 0U) \ 561 { \ 562 SET_BIT(FLASH->ECCR, (1UL << ((__INTERRUPT__) & 0x1FU))); \ 563 } \ 564 } while (0U) 565 566 /** 567 * @brief Disable the specified FLASH interrupt. 568 * @param __INTERRUPT__ FLASH interrupt 569 * This parameter can be one of the following values : 570 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 571 * @arg @ref FLASH_IT_OPERR Error Interrupt 572 * @arg @ref FLASH_IT_ECCC1 ECC Correction Interrupt on bank 1 573 * @arg @ref FLASH_IT_ECCC ECC Correction Interrupt - legacy name for single bank 574 * @retval none 575 */ 576 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) \ 577 do { \ 578 if(((__INTERRUPT__) & (FLASH_FLAG_CR_ID << FLASH_FLAG_REG_POS)) != 0U) \ 579 { \ 580 CLEAR_BIT(FLASH->CR, (1UL << ((__INTERRUPT__) & 0x1FU))); \ 581 } \ 582 else if (((__INTERRUPT__) & (FLASH_FLAG_ECCR1_ID << FLASH_FLAG_REG_POS)) != 0U) \ 583 { \ 584 CLEAR_BIT(FLASH->ECCR, (1UL << ((__INTERRUPT__) & 0x1FU))); \ 585 } \ 586 } while (0U) 587 588 /** 589 * @brief Check whether the specified FLASH flag is set or not. 590 * @param __FLAG__ specifies the FLASH flag to check. 591 * This parameter can be one of the following values : 592 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 593 * @arg @ref FLASH_FLAG_OPERR FLASH Operation error flag 594 * @arg @ref FLASH_FLAG_PROGERR FLASH Programming error flag 595 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protection error flag 596 * @arg @ref FLASH_FLAG_PGAERR FLASH Programming alignment error flag 597 * @arg @ref FLASH_FLAG_SIZERR FLASH Size error flag 598 * @arg @ref FLASH_FLAG_PGSERR FLASH Programming sequence error flag 599 * @arg @ref FLASH_FLAG_MISERR FLASH Fast programming data miss error flag 600 * @arg @ref FLASH_FLAG_FASTERR FLASH Fast programming error flag 601 * @arg @ref FLASH_FLAG_OPTVERR FLASH Option validity error flag 602 * @arg @ref FLASH_FLAG_BSY1 FLASH bank 1 write/erase operations in progress flag 603 * @arg @ref FLASH_FLAG_BSY FLASH write/erase operations in progress flag - legacy name for single bank 604 * @arg @ref FLASH_FLAG_CFGBSY FLASH configuration is busy : program or erase setting are used. 605 * @arg @ref FLASH_FLAG_ECCC1 FLASH one ECC error has been detected and corrected 606 * @arg @ref FLASH_FLAG_ECCD1 FLASH two ECC errors have been detected on bank 1 607 * @arg @ref FLASH_FLAG_ECCC FLASH one ECC error has been detected and corrected - legacy name for single bank 608 * @arg @ref FLASH_FLAG_ECCD FLASH two ECC errors have been detected - legacy name for single bank 609 * @retval The state of FLASH_FLAG (SET or RESET). 610 */ 611 #define __HAL_FLASH_GET_FLAG(__FLAG__) ((((__FLAG__) & (FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS)) != 0U) ? \ 612 (READ_BIT(FLASH->SR, (1UL << ((__FLAG__) & 0x1FU))) != 0x00U) : \ 613 (READ_BIT(FLASH->ECCR, (1UL << ((__FLAG__) & 0x1FU))) != 0x00U)) 614 615 /** 616 * @brief Clear the FLASH pending flags. 617 * @param __FLAG__ specifies the FLASH flags to clear. 618 * This parameter can be one of the following values : 619 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 620 * @arg @ref FLASH_FLAG_OPERR FLASH Operation error flag 621 * @arg @ref FLASH_FLAG_PROGERR FLASH Programming error flag 622 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protection error flag 623 * @arg @ref FLASH_FLAG_PGAERR FLASH Programming alignment error flag 624 * @arg @ref FLASH_FLAG_SIZERR FLASH Size error flag 625 * @arg @ref FLASH_FLAG_PGSERR FLASH Programming sequence error flag 626 * @arg @ref FLASH_FLAG_MISERR FLASH Fast programming data miss error flag 627 * @arg @ref FLASH_FLAG_FASTERR FLASH Fast programming error flag 628 * @arg @ref FLASH_FLAG_OPTVERR FLASH Option validity error flag 629 * @arg @ref FLASH_FLAG_ECCC1 FLASH one ECC error has been detected and corrected 630 * @arg @ref FLASH_FLAG_ECCD1 FLASH two ECC errors have been detected on bank 1 631 * @arg @ref FLASH_FLAG_ECCC FLASH one ECC error has been detected and corrected - legacy name for single bank 632 * @arg @ref FLASH_FLAG_ECCD FLASH two ECC errors have been detected - legacy name for single bank 633 * @retval None 634 */ 635 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) \ 636 do { \ 637 if(((__FLAG__) & (FLASH_FLAG_SR_ID << FLASH_FLAG_REG_POS)) != 0U) \ 638 { \ 639 FLASH->SR = (1UL << ((__FLAG__) & 0x1FU)); \ 640 } \ 641 else if (((__FLAG__) & (FLASH_FLAG_ECCR1_ID << FLASH_FLAG_REG_POS)) != 0U) \ 642 { \ 643 FLASH->ECCR = (1UL << ((__FLAG__) & 0x1FU)); \ 644 } \ 645 } while(0U) 646 647 /** 648 * @} 649 */ 650 651 /* Include FLASH HAL Extended module */ 652 #include "stm32u0xx_hal_flash_ex.h" 653 /* Exported variables --------------------------------------------------------*/ 654 /** @defgroup FLASH_Exported_Variables FLASH Exported Variables 655 * @{ 656 */ 657 extern FLASH_ProcessTypeDef pFlash; 658 /** 659 * @} 660 */ 661 662 /* Exported functions --------------------------------------------------------*/ 663 /** @addtogroup FLASH_Exported_Functions 664 * @{ 665 */ 666 667 /* Program operation functions ***********************************************/ 668 /** @addtogroup FLASH_Exported_Functions_Group1 669 * @{ 670 */ 671 HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data); 672 HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data); 673 /* FLASH IRQ handler method */ 674 void HAL_FLASH_IRQHandler(void); 675 /* Callbacks in non blocking modes */ 676 void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); 677 void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); 678 /** 679 * @} 680 */ 681 682 /* Peripheral Control functions **********************************************/ 683 /** @addtogroup FLASH_Exported_Functions_Group2 684 * @{ 685 */ 686 HAL_StatusTypeDef HAL_FLASH_Unlock(void); 687 HAL_StatusTypeDef HAL_FLASH_Lock(void); 688 /* Option bytes control */ 689 HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); 690 HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); 691 HAL_StatusTypeDef HAL_FLASH_OB_Launch(void); 692 /** 693 * @} 694 */ 695 696 /* Peripheral State functions ************************************************/ 697 /** @addtogroup FLASH_Exported_Functions_Group3 698 * @{ 699 */ 700 uint32_t HAL_FLASH_GetError(void); 701 /** 702 * @} 703 */ 704 705 /** 706 * @} 707 */ 708 709 /* Private types --------------------------------------------------------*/ 710 /** @defgroup FLASH_Private_types FLASH Private Types 711 * @{ 712 */ 713 HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); 714 /** 715 * @} 716 */ 717 718 /* Private constants --------------------------------------------------------*/ 719 /** @defgroup FLASH_Private_Constants FLASH Private Constants 720 * @{ 721 */ 722 #define FLASH_SIZE_DATA_REGISTER FLASHSIZE_BASE 723 724 725 #define FLASH_BANK_SIZE (FLASH_SIZE) /*!< FLASH Bank Size */ 726 727 #define FLASH_PAGE_SIZE 0x00000800U /*!< FLASH Page Size, 2 KBytes */ 728 #define FLASH_PAGE_NB (FLASH_BANK_SIZE/FLASH_PAGE_SIZE) /* Number of pages per bank */ 729 #define FLASH_TIMEOUT_VALUE 1000U /*!< FLASH Execution Timeout, 1 s */ 730 #define FLASH_TYPENONE 0x00000000U /*!< No programming Procedure On Going */ 731 #define FLASH_SR_ERRORS (FLASH_SR_OPERR | FLASH_SR_PROGERR | FLASH_SR_WRPERR | \ 732 FLASH_SR_PGAERR | FLASH_SR_SIZERR | FLASH_SR_PGSERR | \ 733 FLASH_SR_MISERR | FLASH_SR_FASTERR | FLASH_SR_OPTVERR ) /*!< All SR error flags */ 734 #define FLASH_SR_CLEAR (FLASH_SR_ERRORS | FLASH_SR_EOP) 735 736 /* Internal defines for HAL macro usage */ 737 #define FLASH_FLAG_REG_POS 16U 738 #define FLASH_FLAG_SR_ID 1U 739 #define FLASH_FLAG_CR_ID 2U 740 #define FLASH_FLAG_ECCR1_ID 4U 741 742 /** 743 * @} 744 */ 745 746 /* Private macros ------------------------------------------------------------*/ 747 /** @defgroup FLASH_Private_Macros FLASH Private Macros 748 * @{ 749 */ 750 #define IS_FLASH_MAIN_MEM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= (FLASH_BASE))\ 751 && ((__ADDRESS__) < (FLASH_BASE + FLASH_SIZE))) 752 753 #define IS_FLASH_MAIN_FIRSTHALF_MEM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= (FLASH_BASE))\ 754 && ((__ADDRESS__) < (FLASH_BASE + FLASH_BANK_SIZE))) 755 756 #define IS_FLASH_PROGRAM_MAIN_MEM_ADDRESS(__ADDRESS__) ((__ADDRESS__) >= (FLASH_BASE))\ 757 && ((__ADDRESS__) <= (FLASH_BASE + FLASH_SIZE )) 758 759 #define IS_FLASH_PROGRAM_OTP_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= 0x1FFF7000U)\ 760 && ((__ADDRESS__) < 0x1FFF7400U )) 761 762 #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) ((IS_FLASH_PROGRAM_MAIN_MEM_ADDRESS(__ADDRESS__))\ 763 || (IS_FLASH_PROGRAM_OTP_ADDRESS(__ADDRESS__))) 764 765 #define IS_FLASH_FAST_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= (FLASH_BASE))\ 766 && ((__ADDRESS__) <= (FLASH_BASE + FLASH_SIZE - 256UL))) 767 768 #define IS_FLASH_PAGE(__PAGE__) ((__PAGE__) < FLASH_PAGE_NB) 769 770 771 #define IS_FLASH_BANK(__BANK__) ((__BANK__) == FLASH_BANK_1) 772 773 #define IS_FLASH_TYPEERASE(__VALUE__) (((__VALUE__) == FLASH_TYPEERASE_PAGES) || \ 774 ((__VALUE__) == FLASH_TYPEERASE_MASS)) 775 776 #define IS_FLASH_TYPEPROGRAM(__VALUE__) (((__VALUE__) == FLASH_TYPEPROGRAM_DOUBLEWORD) || \ 777 ((__VALUE__) == FLASH_TYPEPROGRAM_FAST)) 778 779 #define IS_OPTIONBYTE(__VALUE__) ((((__VALUE__) & OPTIONBYTE_ALL) != 0x00U) && \ 780 (((__VALUE__) & ~OPTIONBYTE_ALL) == 0x00U)) 781 782 783 #define IS_OB_WRPAREA(__VALUE__) (((__VALUE__) == OB_WRPAREA_ZONE_A)\ 784 || ((__VALUE__) == OB_WRPAREA_ZONE_B)) 785 786 #define IS_OB_RDP_LEVEL(__LEVEL__) (((__LEVEL__) == OB_RDP_LEVEL_0) ||\ 787 ((__LEVEL__) == OB_RDP_LEVEL_1) ||\ 788 ((__LEVEL__) == OB_RDP_LEVEL_2)) 789 790 #define IS_OB_USER_TYPE(__TYPE__) ((((__TYPE__) & OB_USER_ALL) != 0x00U) && \ 791 (((__TYPE__) & ~OB_USER_ALL) == 0x00U)) 792 793 #define IS_OB_USER_CONFIG(__TYPE__,__CONFIG__) ((~(__TYPE__) & (__CONFIG__)) == 0x00U) 794 795 #define IS_OB_BOOT_LOCK(__VALUE__) (((__VALUE__) == OB_BOOT_LOCK_DISABLE)\ 796 || ((__VALUE__) == OB_BOOT_LOCK_ENABLE)) 797 798 #define IS_OB_HDP_SIZE(__VALUE__) ((__VALUE__) < (FLASH_PAGE_NB + 1U)) 799 800 #define IS_FLASH_LATENCY(__LATENCY__) (((__LATENCY__) == FLASH_LATENCY_0) || \ 801 ((__LATENCY__) == FLASH_LATENCY_1) || \ 802 ((__LATENCY__) == FLASH_LATENCY_2)) 803 #define IS_OB_RDP_KEY_TYPE(__KEYTYPE__) (((__KEYTYPE__) == OB_RDP_KEY_OEM1) || \ 804 ((__KEYTYPE__) == OB_RDP_KEY_OEM2)) 805 806 #define IS_OB_HDPEXT_CONFIG(__HDPEXTCONFIG__) (((__HDPEXTCONFIG__) == FLASH_HDPEXT_ACCESS_GRANTED) || \ 807 ((__HDPEXTCONFIG__) == FLASH_HDPEXT_ACCESS_DENIED) || \ 808 ((__HDPEXTCONFIG__) == FLASH_HDPEXT_ACCESS_LOCKED)) 809 /** 810 * @} 811 */ 812 813 /** 814 * @} 815 */ 816 817 /** 818 * @} 819 */ 820 821 #ifdef __cplusplus 822 } 823 #endif 824 825 #endif /* STM32U0xx_HAL_FLASH_H */ 826 827
