/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/ |
D | MKE14Z4.h | 1996 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/ |
D | MKE15Z4.h | 1997 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/ |
D | MKE12Z7.h | 4453 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/ |
D | MKE16Z4.h | 1995 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/ |
D | MKE13Z7.h | 4455 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/ |
D | MKE17Z7.h | 4457 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/ |
D | MKE14Z7.h | 4371 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/ |
D | MKE15Z7.h | 4373 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/ |
D | MKE16F16.h | 7183 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/ |
D | MKE14F16.h | 6184 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/ |
D | MKE18F16.h | 7188 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QM6/ |
D | MIMX8QM6_ca53.h | 25972 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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D | MIMX8QM6_cm4_core0.h | 20628 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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D | MIMX8QM6_cm4_core1.h | 20628 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX2/ |
D | MIMX8DX2_cm4.h | 45559 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX1/ |
D | MIMX8DX1_cm4.h | 45559 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX2/ |
D | MIMX8QX2_cm4.h | 45560 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX1/ |
D | MIMX8QX1_cm4.h | 45560 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX4/ |
D | MIMX8QX4_cm4.h | 46121 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX5/ |
D | MIMX8QX5_cm4.h | 46123 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX6/ |
D | MIMX8UX6_cm4.h | 46123 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX6/ |
D | MIMX8QX6_cm4.h | 46123 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX5/ |
D | MIMX8UX5_cm4.h | 46123 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX5/ |
D | MIMX8DX5_cm4.h | 46122 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX6/ |
D | MIMX8DX6_cm4.h | 46122 __IO uint32_t HCR; /**< Half Cycle Register, offset: 0x9C */ member
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