| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K142_SCG.h | 79 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| D | S32K146_SCG.h | 79 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| D | S32K144_SCG.h | 79 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| D | S32K148_SCG.h | 79 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/ |
| D | MKE12Z9.h | 12033 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/ |
| D | MKE17Z9.h | 12037 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/ |
| D | MKE13Z9.h | 12035 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/ |
| D | MKE18F16.h | 16323 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/ |
| D | MKE16F16.h | 16317 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/ |
| D | MKE14F16.h | 15317 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/ |
| D | K32L2A41A.h | 14370 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/ |
| D | K32L2A31A.h | 14370 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/ |
| D | K32L3A60_cm4.h | 17149 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| D | K32L3A60_cm0plus.h | 17259 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/ |
| D | MCIMX7U3_cm4.h | 28217 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/ |
| D | MCIMX7U5_cm4.h | 28218 …__IO uint32_t HCCR; /**< HSRUN Clock Control Register, offset: 0x1C */ member
|