1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef __STM32L4xx_HAL_UART_H 38 #define __STM32L4xx_HAL_UART_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 /* Includes ------------------------------------------------------------------*/ 45 #include "stm32l4xx_hal_def.h" 46 47 /** @addtogroup STM32L4xx_HAL_Driver 48 * @{ 49 */ 50 51 /** @addtogroup UART 52 * @{ 53 */ 54 55 /* Exported types ------------------------------------------------------------*/ 56 /** @defgroup UART_Exported_Types UART Exported Types 57 * @{ 58 */ 59 60 /** 61 * @brief UART Init Structure definition 62 */ 63 typedef struct 64 { 65 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 66 The baud rate register is computed using the following formula: 67 UART: 68 ===== 69 - If oversampling is 16 or in LIN mode, 70 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 71 - If oversampling is 8, 72 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4] 73 Baud Rate Register[3] = 0 74 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1 75 LPUART: 76 ======= 77 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 78 79 where (uart/lpuart)_ker_ck_pres is the UART input clock divided by a prescaler */ 80 81 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 82 This parameter can be a value of @ref UARTEx_Word_Length. */ 83 84 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 85 This parameter can be a value of @ref UART_Stop_Bits. */ 86 87 uint32_t Parity; /*!< Specifies the parity mode. 88 This parameter can be a value of @ref UART_Parity 89 @note When parity is enabled, the computed parity is inserted 90 at the MSB position of the transmitted data (9th bit when 91 the word length is set to 9 data bits; 8th bit when the 92 word length is set to 8 data bits). */ 93 94 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 95 This parameter can be a value of @ref UART_Mode. */ 96 97 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 98 or disabled. 99 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 100 101 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8). 102 This parameter can be a value of @ref UART_Over_Sampling. */ 103 104 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 105 Selecting the single sample method increases the receiver tolerance to clock 106 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 107 108 #if defined(USART_PRESC_PRESCALER) 109 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 110 This parameter can be a value of @ref UART_ClockPrescaler. */ 111 #endif 112 113 } UART_InitTypeDef; 114 115 /** 116 * @brief UART Advanced Features initalization structure definition 117 */ 118 typedef struct 119 { 120 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 121 Advanced Features may be initialized at the same time . 122 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */ 123 124 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 125 This parameter can be a value of @ref UART_Tx_Inv. */ 126 127 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 128 This parameter can be a value of @ref UART_Rx_Inv. */ 129 130 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 131 vs negative/inverted logic). 132 This parameter can be a value of @ref UART_Data_Inv. */ 133 134 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 135 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 136 137 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 138 This parameter can be a value of @ref UART_Overrun_Disable. */ 139 140 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 141 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 142 143 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 144 This parameter can be a value of @ref UART_AutoBaudRate_Enable */ 145 146 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 147 detection is carried out. 148 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 149 150 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 151 This parameter can be a value of @ref UART_MSB_First. */ 152 } UART_AdvFeatureInitTypeDef; 153 154 155 156 /** 157 * @brief HAL UART State structures definition 158 * @note HAL UART State value is a combination of 2 different substates: gState and RxState. 159 * - gState contains UART state information related to global Handle management 160 * and also information related to Tx operations. 161 * gState value coding follow below described bitmap : 162 * b7-b6 Error information 163 * 00 : No Error 164 * 01 : (Not Used) 165 * 10 : Timeout 166 * 11 : Error 167 * b5 IP initilisation status 168 * 0 : Reset (IP not initialized) 169 * 1 : Init done (IP not initialized. HAL UART Init function already called) 170 * b4-b3 (not used) 171 * xx : Should be set to 00 172 * b2 Intrinsic process state 173 * 0 : Ready 174 * 1 : Busy (IP busy with some configuration or internal operations) 175 * b1 (not used) 176 * x : Should be set to 0 177 * b0 Tx state 178 * 0 : Ready (no Tx operation ongoing) 179 * 1 : Busy (Tx operation ongoing) 180 * - RxState contains information related to Rx operations. 181 * RxState value coding follow below described bitmap : 182 * b7-b6 (not used) 183 * xx : Should be set to 00 184 * b5 IP initilisation status 185 * 0 : Reset (IP not initialized) 186 * 1 : Init done (IP not initialized) 187 * b4-b2 (not used) 188 * xxx : Should be set to 000 189 * b1 Rx state 190 * 0 : Ready (no Rx operation ongoing) 191 * 1 : Busy (Rx operation ongoing) 192 * b0 (not used) 193 * x : Should be set to 0. 194 */ 195 typedef enum 196 { 197 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized 198 Value is allowed for gState and RxState */ 199 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use 200 Value is allowed for gState and RxState */ 201 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing 202 Value is allowed for gState only */ 203 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing 204 Value is allowed for gState only */ 205 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing 206 Value is allowed for RxState only */ 207 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing 208 Not to be used for neither gState nor RxState. 209 Value is result of combination (Or) between gState and RxState values */ 210 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state 211 Value is allowed for gState only */ 212 HAL_UART_STATE_ERROR = 0xE0U /*!< Error 213 Value is allowed for gState only */ 214 } HAL_UART_StateTypeDef; 215 216 /** 217 * @brief UART clock sources definition 218 */ 219 typedef enum 220 { 221 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 222 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 223 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 224 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 225 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 226 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 227 } UART_ClockSourceTypeDef; 228 229 /** 230 * @brief UART handle Structure definition 231 */ 232 typedef struct __UART_HandleTypeDef 233 { 234 USART_TypeDef *Instance; /*!< UART registers base address */ 235 236 UART_InitTypeDef Init; /*!< UART communication parameters */ 237 238 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 239 240 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 241 242 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 243 244 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 245 246 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 247 248 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 249 250 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 251 252 uint16_t Mask; /*!< UART Rx RDR register mask */ 253 254 #if defined(USART_CR1_FIFOEN) 255 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 256 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 257 258 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 259 260 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 261 #endif 262 263 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 264 265 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 266 267 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 268 269 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 270 271 HAL_LockTypeDef Lock; /*!< Locking object */ 272 273 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 274 and also related to Tx operations. 275 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 276 277 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. 278 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 279 280 __IO uint32_t ErrorCode; /*!< UART Error code */ 281 282 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 283 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 284 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 285 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 286 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 287 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 288 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 289 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 290 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 291 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 292 #if defined(USART_CR1_FIFOEN) 293 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 294 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 295 #endif 296 297 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 298 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 299 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 300 301 } UART_HandleTypeDef; 302 303 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 304 /** 305 * @brief HAL UART Callback ID enumeration definition 306 */ 307 typedef enum 308 { 309 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 310 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 311 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 312 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 313 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 314 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 315 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 316 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 317 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 318 #if defined(USART_CR1_FIFOEN) 319 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 320 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 321 #endif 322 323 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 324 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 325 326 } HAL_UART_CallbackIDTypeDef; 327 328 /** 329 * @brief HAL UART Callback pointer definition 330 */ 331 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 332 333 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 334 335 /** 336 * @} 337 */ 338 339 /* Exported constants --------------------------------------------------------*/ 340 /** @defgroup UART_Exported_Constants UART Exported Constants 341 * @{ 342 */ 343 344 /** @defgroup UART_Error_Definition UART Error Definition 345 * @{ 346 */ 347 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 348 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */ 349 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */ 350 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */ 351 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */ 352 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */ 353 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 354 #define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */ 355 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 356 /** 357 * @} 358 */ 359 360 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 361 * @{ 362 */ 363 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 364 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 365 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 366 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 367 /** 368 * @} 369 */ 370 371 /** @defgroup UART_Parity UART Parity 372 * @{ 373 */ 374 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 375 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 376 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 377 /** 378 * @} 379 */ 380 381 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 382 * @{ 383 */ 384 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 385 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 386 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 387 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 388 /** 389 * @} 390 */ 391 392 /** @defgroup UART_Mode UART Transfer Mode 393 * @{ 394 */ 395 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 396 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 397 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 398 /** 399 * @} 400 */ 401 402 /** @defgroup UART_State UART State 403 * @{ 404 */ 405 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 406 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 407 /** 408 * @} 409 */ 410 411 /** @defgroup UART_Over_Sampling UART Over Sampling 412 * @{ 413 */ 414 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 415 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 416 /** 417 * @} 418 */ 419 420 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 421 * @{ 422 */ 423 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 424 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 425 /** 426 * @} 427 */ 428 429 #if defined(USART_PRESC_PRESCALER) 430 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 431 * @{ 432 */ 433 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 434 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 435 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 436 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 437 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 438 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 439 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 440 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 441 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 442 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 443 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 444 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 445 446 /** 447 * @} 448 */ 449 #endif 450 451 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 452 * @{ 453 */ 454 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */ 455 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */ 456 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */ 457 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */ 458 /** 459 * @} 460 */ 461 462 /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut 463 * @{ 464 */ 465 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART receiver timeout disable */ 466 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART receiver timeout enable */ 467 /** 468 * @} 469 */ 470 471 /** @defgroup UART_LIN UART Local Interconnection Network mode 472 * @{ 473 */ 474 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 475 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 476 /** 477 * @} 478 */ 479 480 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 481 * @{ 482 */ 483 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 484 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 485 /** 486 * @} 487 */ 488 489 /** @defgroup UART_DMA_Tx UART DMA Tx 490 * @{ 491 */ 492 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 493 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 494 /** 495 * @} 496 */ 497 498 /** @defgroup UART_DMA_Rx UART DMA Rx 499 * @{ 500 */ 501 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 502 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 503 /** 504 * @} 505 */ 506 507 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 508 * @{ 509 */ 510 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 511 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 512 /** 513 * @} 514 */ 515 516 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 517 * @{ 518 */ 519 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 520 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 521 /** 522 * @} 523 */ 524 525 /** @defgroup UART_Request_Parameters UART Request Parameters 526 * @{ 527 */ 528 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 529 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 530 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 531 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 532 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 533 /** 534 * @} 535 */ 536 537 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 538 * @{ 539 */ 540 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 541 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 542 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 543 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 544 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 545 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 546 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 547 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 548 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 549 /** 550 * @} 551 */ 552 553 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 554 * @{ 555 */ 556 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 557 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 558 /** 559 * @} 560 */ 561 562 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 563 * @{ 564 */ 565 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 566 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 567 /** 568 * @} 569 */ 570 571 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 572 * @{ 573 */ 574 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 575 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 576 /** 577 * @} 578 */ 579 580 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 581 * @{ 582 */ 583 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 584 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 585 /** 586 * @} 587 */ 588 589 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 590 * @{ 591 */ 592 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 593 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 594 /** 595 * @} 596 */ 597 598 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 599 * @{ 600 */ 601 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 602 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 603 /** 604 * @} 605 */ 606 607 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 608 * @{ 609 */ 610 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 611 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 612 /** 613 * @} 614 */ 615 616 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 617 * @{ 618 */ 619 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */ 620 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */ 621 /** 622 * @} 623 */ 624 625 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 626 * @{ 627 */ 628 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 629 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 630 /** 631 * @} 632 */ 633 634 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 635 * @{ 636 */ 637 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 638 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 639 /** 640 * @} 641 */ 642 643 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 644 * @{ 645 */ 646 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 647 /** 648 * @} 649 */ 650 651 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 652 * @{ 653 */ 654 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 655 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 656 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */ 657 /** 658 * @} 659 */ 660 661 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 662 * @{ 663 */ 664 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 665 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 666 /** 667 * @} 668 */ 669 670 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 671 * @{ 672 */ 673 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */ 674 /** 675 * @} 676 */ 677 678 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 679 * @{ 680 */ 681 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */ 682 /** 683 * @} 684 */ 685 686 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 687 * @{ 688 */ 689 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 690 /** 691 * @} 692 */ 693 694 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 695 * @{ 696 */ 697 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 698 /** 699 * @} 700 */ 701 702 /** @defgroup UART_Flags UART Status Flags 703 * Elements values convention: 0xXXXX 704 * - 0xXXXX : Flag mask in the ISR register 705 * @{ 706 */ 707 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 708 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 709 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 710 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 711 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 712 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 713 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 714 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 715 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 716 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 717 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 718 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 719 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 720 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 721 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 722 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 723 #if defined(USART_CR1_FIFOEN) 724 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 725 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 726 #else 727 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ 728 #endif 729 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 730 #if defined(USART_CR1_FIFOEN) 731 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 732 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 733 #else 734 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ 735 #endif 736 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 737 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 738 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 739 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 740 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 741 /** 742 * @} 743 */ 744 745 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 746 * Elements values convention: 000ZZZZZ0XXYYYYYb 747 * - YYYYY : Interrupt source position in the XX register (5bits) 748 * - XX : Interrupt source register (2bits) 749 * - 01: CR1 register 750 * - 10: CR2 register 751 * - 11: CR3 register 752 * - ZZZZZ : Flag position in the ISR register(5bits) 753 * @{ 754 */ 755 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 756 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 757 #if defined(USART_CR1_FIFOEN) 758 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 759 #endif 760 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 761 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 762 #if defined(USART_CR1_FIFOEN) 763 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 764 #endif 765 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 766 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 767 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 768 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 769 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 770 #if defined(USART_CR1_FIFOEN) 771 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 772 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 773 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 774 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 775 #endif 776 777 /* Elements values convention: 000000000XXYYYYYb 778 - YYYYY : Interrupt source position in the XX register (5bits) 779 - XX : Interrupt source register (2bits) 780 - 01: CR1 register 781 - 10: CR2 register 782 - 11: CR3 register */ 783 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 784 785 /* Elements values convention: 0000ZZZZ00000000b 786 - ZZZZ : Flag position in the ISR register(4bits) */ 787 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 788 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 789 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 790 /** 791 * @} 792 */ 793 794 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 795 * @{ 796 */ 797 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 798 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 799 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 800 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 801 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 802 #if defined(USART_CR1_FIFOEN) 803 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 804 #endif 805 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 806 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 807 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 808 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 809 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 810 /** 811 * @} 812 */ 813 814 815 /** 816 * @} 817 */ 818 819 /* Exported macros -----------------------------------------------------------*/ 820 /** @defgroup UART_Exported_Macros UART Exported Macros 821 * @{ 822 */ 823 824 /** @brief Reset UART handle states. 825 * @param __HANDLE__ UART handle. 826 * @retval None 827 */ 828 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 829 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 830 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 831 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 832 (__HANDLE__)->MspInitCallback = NULL; \ 833 (__HANDLE__)->MspDeInitCallback = NULL; \ 834 } while(0U) 835 #else 836 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 837 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 838 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 839 } while(0U) 840 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 841 842 /** @brief Flush the UART Data registers. 843 * @param __HANDLE__ specifies the UART Handle. 844 * @retval None 845 */ 846 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 847 do{ \ 848 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 849 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 850 } while(0U) 851 852 /** @brief Clear the specified UART pending flag. 853 * @param __HANDLE__ specifies the UART Handle. 854 * @param __FLAG__ specifies the flag to check. 855 * This parameter can be any combination of the following values: 856 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 857 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 858 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 859 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 860 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 861 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 862 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 863 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 864 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 865 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 866 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 867 * @retval None 868 */ 869 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 870 871 /** @brief Clear the UART PE pending flag. 872 * @param __HANDLE__ specifies the UART Handle. 873 * @retval None 874 */ 875 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 876 877 /** @brief Clear the UART FE pending flag. 878 * @param __HANDLE__ specifies the UART Handle. 879 * @retval None 880 */ 881 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 882 883 /** @brief Clear the UART NE pending flag. 884 * @param __HANDLE__ specifies the UART Handle. 885 * @retval None 886 */ 887 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 888 889 /** @brief Clear the UART ORE pending flag. 890 * @param __HANDLE__ specifies the UART Handle. 891 * @retval None 892 */ 893 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 894 895 /** @brief Clear the UART IDLE pending flag. 896 * @param __HANDLE__ specifies the UART Handle. 897 * @retval None 898 */ 899 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 900 901 #if defined(USART_CR1_FIFOEN) 902 /** @brief Clear the UART TX FIFO empty clear flag. 903 * @param __HANDLE__ specifies the UART Handle. 904 * @retval None 905 */ 906 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 907 #endif 908 909 /** @brief Check whether the specified UART flag is set or not. 910 * @param __HANDLE__ specifies the UART Handle. 911 * @param __FLAG__ specifies the flag to check. 912 * This parameter can be one of the following values: 913 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 914 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 915 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 916 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 917 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 918 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 919 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 920 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 921 * @arg @ref UART_FLAG_SBKF Send Break flag 922 * @arg @ref UART_FLAG_CMF Character match flag 923 * @arg @ref UART_FLAG_BUSY Busy flag 924 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 925 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 926 * @arg @ref UART_FLAG_CTS CTS Change flag 927 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 928 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 929 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 930 * @arg @ref UART_FLAG_TC Transmission Complete flag 931 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 932 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 933 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 934 * @arg @ref UART_FLAG_ORE Overrun Error flag 935 * @arg @ref UART_FLAG_NE Noise Error flag 936 * @arg @ref UART_FLAG_FE Framing Error flag 937 * @arg @ref UART_FLAG_PE Parity Error flag 938 * @retval The new state of __FLAG__ (TRUE or FALSE). 939 */ 940 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 941 942 /** @brief Enable the specified UART interrupt. 943 * @param __HANDLE__ specifies the UART Handle. 944 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 945 * This parameter can be one of the following values: 946 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 947 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 948 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 949 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 950 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 951 * @arg @ref UART_IT_CM Character match interrupt 952 * @arg @ref UART_IT_CTS CTS change interrupt 953 * @arg @ref UART_IT_LBD LIN Break detection interrupt 954 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 955 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 956 * @arg @ref UART_IT_TC Transmission complete interrupt 957 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 958 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 959 * @arg @ref UART_IT_IDLE Idle line detection interrupt 960 * @arg @ref UART_IT_PE Parity Error interrupt 961 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 962 * @retval None 963 */ 964 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 965 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 966 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 967 968 969 /** @brief Disable the specified UART interrupt. 970 * @param __HANDLE__ specifies the UART Handle. 971 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 972 * This parameter can be one of the following values: 973 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 974 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 975 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 976 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 977 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 978 * @arg @ref UART_IT_CM Character match interrupt 979 * @arg @ref UART_IT_CTS CTS change interrupt 980 * @arg @ref UART_IT_LBD LIN Break detection interrupt 981 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 982 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 983 * @arg @ref UART_IT_TC Transmission complete interrupt 984 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 985 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 986 * @arg @ref UART_IT_IDLE Idle line detection interrupt 987 * @arg @ref UART_IT_PE Parity Error interrupt 988 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 989 * @retval None 990 */ 991 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 992 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 993 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 994 995 /** @brief Check whether the specified UART interrupt has occurred or not. 996 * @param __HANDLE__ specifies the UART Handle. 997 * @param __INTERRUPT__ specifies the UART interrupt to check. 998 * This parameter can be one of the following values: 999 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1000 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1001 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1002 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1003 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1004 * @arg @ref UART_IT_CM Character match interrupt 1005 * @arg @ref UART_IT_CTS CTS change interrupt 1006 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1007 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1008 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1009 * @arg @ref UART_IT_TC Transmission complete interrupt 1010 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1011 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1012 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1013 * @arg @ref UART_IT_PE Parity Error interrupt 1014 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1015 * @retval The new state of __INTERRUPT__ (SET or RESET). 1016 */ 1017 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1018 1019 /** @brief Check whether the specified UART interrupt source is enabled or not. 1020 * @param __HANDLE__ specifies the UART Handle. 1021 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1022 * This parameter can be one of the following values: 1023 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1024 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1025 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1026 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1027 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1028 * @arg @ref UART_IT_CM Character match interrupt 1029 * @arg @ref UART_IT_CTS CTS change interrupt 1030 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1031 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1032 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1033 * @arg @ref UART_IT_TC Transmission complete interrupt 1034 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1035 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1036 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1037 * @arg @ref UART_IT_PE Parity Error interrupt 1038 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1039 * @retval The new state of __INTERRUPT__ (SET or RESET). 1040 */ 1041 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \ 1042 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \ 1043 (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET) 1044 1045 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1046 * @param __HANDLE__ specifies the UART Handle. 1047 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1048 * to clear the corresponding interrupt 1049 * This parameter can be one of the following values: 1050 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1051 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1052 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1053 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1054 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1055 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1056 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1057 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1058 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1059 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1060 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1061 * @retval None 1062 */ 1063 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1064 1065 /** @brief Set a specific UART request flag. 1066 * @param __HANDLE__ specifies the UART Handle. 1067 * @param __REQ__ specifies the request flag to set 1068 * This parameter can be one of the following values: 1069 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1070 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1071 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1072 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1073 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1074 * @retval None 1075 */ 1076 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (__REQ__)) 1077 1078 /** @brief Enable the UART one bit sample method. 1079 * @param __HANDLE__ specifies the UART Handle. 1080 * @retval None 1081 */ 1082 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1083 1084 /** @brief Disable the UART one bit sample method. 1085 * @param __HANDLE__ specifies the UART Handle. 1086 * @retval None 1087 */ 1088 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1089 1090 /** @brief Enable UART. 1091 * @param __HANDLE__ specifies the UART Handle. 1092 * @retval None 1093 */ 1094 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1095 1096 /** @brief Disable UART. 1097 * @param __HANDLE__ specifies the UART Handle. 1098 * @retval None 1099 */ 1100 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1101 1102 /** @brief Enable CTS flow control. 1103 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1104 * without need to call HAL_UART_Init() function. 1105 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1106 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1107 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1108 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1109 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1110 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1111 * @param __HANDLE__ specifies the UART Handle. 1112 * @retval None 1113 */ 1114 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1115 do{ \ 1116 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1117 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1118 } while(0U) 1119 1120 /** @brief Disable CTS flow control. 1121 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1122 * without need to call HAL_UART_Init() function. 1123 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1124 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1125 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1126 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1127 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1128 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1129 * @param __HANDLE__ specifies the UART Handle. 1130 * @retval None 1131 */ 1132 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1133 do{ \ 1134 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1135 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1136 } while(0U) 1137 1138 /** @brief Enable RTS flow control. 1139 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1140 * without need to call HAL_UART_Init() function. 1141 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1142 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1143 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1144 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1145 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1146 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1147 * @param __HANDLE__ specifies the UART Handle. 1148 * @retval None 1149 */ 1150 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1151 do{ \ 1152 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1153 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1154 } while(0U) 1155 1156 /** @brief Disable RTS flow control. 1157 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1158 * without need to call HAL_UART_Init() function. 1159 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1160 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1161 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1162 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1163 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1164 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1165 * @param __HANDLE__ specifies the UART Handle. 1166 * @retval None 1167 */ 1168 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1169 do{ \ 1170 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1171 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1172 } while(0U) 1173 /** 1174 * @} 1175 */ 1176 1177 /* Private macros --------------------------------------------------------*/ 1178 /** @defgroup UART_Private_Macros UART Private Macros 1179 * @{ 1180 */ 1181 #if defined(USART_PRESC_PRESCALER) 1182 /** @brief Get UART clok division factor from clock prescaler value. 1183 * @param __CLOCKPRESCALER__ UART prescaler value. 1184 * @retval UART clock division factor 1185 */ 1186 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1187 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1188 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1189 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1190 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1191 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1192 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1193 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1194 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1195 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1196 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1197 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 1198 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 1199 1200 /** @brief BRR division operation to set BRR register with LPUART. 1201 * @param __PCLK__ LPUART clock. 1202 * @param __BAUD__ Baud rate set by the user. 1203 * @param __CLOCKPRESCALER__ UART prescaler value. 1204 * @retval Division result 1205 */ 1206 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((((uint64_t)(__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*256U)) + ((__BAUD__)/2U)) / (__BAUD__)) 1207 1208 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1209 * @param __PCLK__ UART clock. 1210 * @param __BAUD__ Baud rate set by the user. 1211 * @param __CLOCKPRESCALER__ UART prescaler value. 1212 * @retval Division result 1213 */ 1214 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1215 1216 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1217 * @param __PCLK__ UART clock. 1218 * @param __BAUD__ Baud rate set by the user. 1219 * @param __CLOCKPRESCALER__ UART prescaler value. 1220 * @retval Division result 1221 */ 1222 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__))) + ((__BAUD__)/2U)) / (__BAUD__)) 1223 #else 1224 1225 /** @brief BRR division operation to set BRR register with LPUART. 1226 * @param __PCLK__ LPUART clock. 1227 * @param __BAUD__ Baud rate set by the user. 1228 * @retval Division result 1229 */ 1230 #define UART_DIV_LPUART(__PCLK__, __BAUD__) (((((uint64_t)(__PCLK__)*256U)) + ((__BAUD__)/2U)) / (__BAUD__)) 1231 1232 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1233 * @param __PCLK__ UART clock. 1234 * @param __BAUD__ Baud rate set by the user. 1235 * @retval Division result 1236 */ 1237 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1238 1239 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1240 * @param __PCLK__ UART clock. 1241 * @param __BAUD__ Baud rate set by the user. 1242 * @retval Division result 1243 */ 1244 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) 1245 #endif 1246 1247 /** @brief Check whether or not UART instance is Low Power UART. 1248 * @param __HANDLE__ specifies the UART Handle. 1249 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1250 */ 1251 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1252 1253 /** @brief Check UART Baud rate. 1254 * @param __BAUDRATE__ Baudrate specified by the user. 1255 * The maximum Baud Rate is derived from the maximum clock on L4 1256 * divided by the smallest oversampling used on the USART (i.e. 8) 1257 * (i.e. 120 MHz on STM32L4Rx/L4Sx, 80 Mhz otherwise) 1258 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1259 */ 1260 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 1261 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 15000001U) 1262 #else 1263 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 10000001U) 1264 #endif 1265 1266 /** @brief Check UART assertion time. 1267 * @param __TIME__ 5-bit value assertion time. 1268 * @retval Test result (TRUE or FALSE). 1269 */ 1270 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1271 1272 /** @brief Check UART deassertion time. 1273 * @param __TIME__ 5-bit value deassertion time. 1274 * @retval Test result (TRUE or FALSE). 1275 */ 1276 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1277 1278 /** 1279 * @brief Ensure that UART frame number of stop bits is valid. 1280 * @param __STOPBITS__ UART frame number of stop bits. 1281 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1282 */ 1283 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1284 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1285 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1286 ((__STOPBITS__) == UART_STOPBITS_2)) 1287 1288 /** 1289 * @brief Ensure that LPUART frame number of stop bits is valid. 1290 * @param __STOPBITS__ LPUART frame number of stop bits. 1291 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1292 */ 1293 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1294 ((__STOPBITS__) == UART_STOPBITS_2)) 1295 1296 /** 1297 * @brief Ensure that UART frame parity is valid. 1298 * @param __PARITY__ UART frame parity. 1299 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1300 */ 1301 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1302 ((__PARITY__) == UART_PARITY_EVEN) || \ 1303 ((__PARITY__) == UART_PARITY_ODD)) 1304 1305 /** 1306 * @brief Ensure that UART hardware flow control is valid. 1307 * @param __CONTROL__ UART hardware flow control. 1308 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1309 */ 1310 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1311 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1312 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1313 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1314 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1315 1316 /** 1317 * @brief Ensure that UART communication mode is valid. 1318 * @param __MODE__ UART communication mode. 1319 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1320 */ 1321 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1322 1323 /** 1324 * @brief Ensure that UART state is valid. 1325 * @param __STATE__ UART state. 1326 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1327 */ 1328 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1329 ((__STATE__) == UART_STATE_ENABLE)) 1330 1331 /** 1332 * @brief Ensure that UART oversampling is valid. 1333 * @param __SAMPLING__ UART oversampling. 1334 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1335 */ 1336 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1337 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1338 1339 /** 1340 * @brief Ensure that UART frame sampling is valid. 1341 * @param __ONEBIT__ UART frame sampling. 1342 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1343 */ 1344 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1345 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1346 1347 /** 1348 * @brief Ensure that UART auto Baud rate detection mode is valid. 1349 * @param __MODE__ UART auto Baud rate detection mode. 1350 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1351 */ 1352 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1353 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1354 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1355 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1356 1357 /** 1358 * @brief Ensure that UART receiver timeout setting is valid. 1359 * @param __TIMEOUT__ UART receiver timeout setting. 1360 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1361 */ 1362 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1363 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1364 1365 /** 1366 * @brief Ensure that UART LIN state is valid. 1367 * @param __LIN__ UART LIN state. 1368 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1369 */ 1370 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1371 ((__LIN__) == UART_LIN_ENABLE)) 1372 1373 /** 1374 * @brief Ensure that UART LIN break detection length is valid. 1375 * @param __LENGTH__ UART LIN break detection length. 1376 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1377 */ 1378 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1379 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1380 1381 /** 1382 * @brief Ensure that UART DMA TX state is valid. 1383 * @param __DMATX__ UART DMA TX state. 1384 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1385 */ 1386 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1387 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1388 1389 /** 1390 * @brief Ensure that UART DMA RX state is valid. 1391 * @param __DMARX__ UART DMA RX state. 1392 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1393 */ 1394 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1395 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1396 1397 /** 1398 * @brief Ensure that UART half-duplex state is valid. 1399 * @param __HDSEL__ UART half-duplex state. 1400 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1401 */ 1402 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1403 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1404 1405 /** 1406 * @brief Ensure that UART wake-up method is valid. 1407 * @param __WAKEUP__ UART wake-up method . 1408 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1409 */ 1410 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1411 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1412 1413 /** 1414 * @brief Ensure that UART request parameter is valid. 1415 * @param __PARAM__ UART request parameter. 1416 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1417 */ 1418 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1419 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1420 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1421 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1422 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1423 1424 /** 1425 * @brief Ensure that UART advanced features initialization is valid. 1426 * @param __INIT__ UART advanced features initialization. 1427 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1428 */ 1429 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1430 UART_ADVFEATURE_TXINVERT_INIT | \ 1431 UART_ADVFEATURE_RXINVERT_INIT | \ 1432 UART_ADVFEATURE_DATAINVERT_INIT | \ 1433 UART_ADVFEATURE_SWAP_INIT | \ 1434 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1435 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1436 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1437 UART_ADVFEATURE_MSBFIRST_INIT)) 1438 1439 /** 1440 * @brief Ensure that UART frame TX inversion setting is valid. 1441 * @param __TXINV__ UART frame TX inversion setting. 1442 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1443 */ 1444 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1445 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1446 1447 /** 1448 * @brief Ensure that UART frame RX inversion setting is valid. 1449 * @param __RXINV__ UART frame RX inversion setting. 1450 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1451 */ 1452 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1453 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1454 1455 /** 1456 * @brief Ensure that UART frame data inversion setting is valid. 1457 * @param __DATAINV__ UART frame data inversion setting. 1458 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1459 */ 1460 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1461 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1462 1463 /** 1464 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1465 * @param __SWAP__ UART frame RX/TX pins swap setting. 1466 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1467 */ 1468 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1469 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1470 1471 /** 1472 * @brief Ensure that UART frame overrun setting is valid. 1473 * @param __OVERRUN__ UART frame overrun setting. 1474 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1475 */ 1476 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1477 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1478 1479 /** 1480 * @brief Ensure that UART auto Baud rate state is valid. 1481 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1482 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1483 */ 1484 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1485 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1486 1487 /** 1488 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1489 * @param __DMA__ UART DMA enabling or disabling on error setting. 1490 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1491 */ 1492 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1493 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1494 1495 /** 1496 * @brief Ensure that UART frame MSB first setting is valid. 1497 * @param __MSBFIRST__ UART frame MSB first setting. 1498 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1499 */ 1500 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1501 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1502 1503 /** 1504 * @brief Ensure that UART stop mode state is valid. 1505 * @param __STOPMODE__ UART stop mode state. 1506 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1507 */ 1508 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1509 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1510 1511 /** 1512 * @brief Ensure that UART mute mode state is valid. 1513 * @param __MUTE__ UART mute mode state. 1514 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1515 */ 1516 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1517 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1518 1519 /** 1520 * @brief Ensure that UART wake-up selection is valid. 1521 * @param __WAKE__ UART wake-up selection. 1522 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1523 */ 1524 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1525 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1526 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1527 1528 /** 1529 * @brief Ensure that UART driver enable polarity is valid. 1530 * @param __POLARITY__ UART driver enable polarity. 1531 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1532 */ 1533 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1534 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1535 1536 #if defined(USART_PRESC_PRESCALER) 1537 /** 1538 * @brief Ensure that UART Prescaler is valid. 1539 * @param __CLOCKPRESCALER__ UART Prescaler value. 1540 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1541 */ 1542 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1543 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1544 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1545 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1546 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1547 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1548 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1549 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1550 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1551 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1552 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1553 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1554 #endif 1555 1556 /** 1557 * @} 1558 */ 1559 1560 /* Include UART HAL Extended module */ 1561 #include "stm32l4xx_hal_uart_ex.h" 1562 1563 1564 /* Exported functions --------------------------------------------------------*/ 1565 /** @addtogroup UART_Exported_Functions UART Exported Functions 1566 * @{ 1567 */ 1568 1569 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1570 * @{ 1571 */ 1572 1573 /* Initialization and de-initialization functions ****************************/ 1574 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1575 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1576 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1577 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1578 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1579 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1580 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1581 1582 /* Callbacks Register/UnRegister functions ***********************************/ 1583 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1584 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback); 1585 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1586 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1587 1588 /** 1589 * @} 1590 */ 1591 1592 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1593 * @{ 1594 */ 1595 1596 /* IO operation functions *****************************************************/ 1597 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1598 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1599 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1600 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1601 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1602 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1603 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1604 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1605 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1606 /* Transfer Abort functions */ 1607 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1608 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1609 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1610 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1611 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1612 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1613 1614 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1615 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1616 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1617 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1618 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1619 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1620 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1621 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1622 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1623 1624 /** 1625 * @} 1626 */ 1627 1628 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1629 * @{ 1630 */ 1631 1632 /* Peripheral Control functions ************************************************/ 1633 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1634 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1635 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1636 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1637 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1638 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1639 /** 1640 * @} 1641 */ 1642 1643 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1644 * @{ 1645 */ 1646 1647 /* Peripheral State and Errors functions **************************************************/ 1648 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); 1649 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); 1650 1651 /** 1652 * @} 1653 */ 1654 1655 /** 1656 * @} 1657 */ 1658 1659 /* Private functions -----------------------------------------------------------*/ 1660 /** @addtogroup UART_Private_Functions UART Private Functions 1661 * @{ 1662 */ 1663 1664 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1665 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1666 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout); 1667 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1668 1669 /** 1670 * @} 1671 */ 1672 1673 /** 1674 * @} 1675 */ 1676 1677 /** 1678 * @} 1679 */ 1680 1681 #ifdef __cplusplus 1682 } 1683 #endif 1684 1685 #endif /* __STM32L4xx_HAL_UART_H */ 1686 1687 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 1688
