1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_swpmi.h 4 * @author MCD Application Team 5 * @brief Header file of SWPMI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef STM32L4xx_HAL_SWPMI_H 38 #define STM32L4xx_HAL_SWPMI_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 /* Includes ------------------------------------------------------------------*/ 45 #include "stm32l4xx_hal_def.h" 46 47 /** @addtogroup STM32L4xx_HAL_Driver 48 * @{ 49 */ 50 51 #if defined(SWPMI1) 52 53 /** @addtogroup SWPMI 54 * @{ 55 */ 56 57 /* Exported types ------------------------------------------------------------*/ 58 /** @defgroup SWPMI_Exported_Types SWPMI Exported Types 59 * @{ 60 */ 61 62 /** 63 * @brief SWPMI Init Structure definition 64 */ 65 typedef struct 66 { 67 uint32_t VoltageClass; /*!< Specifies the SWP Voltage Class. 68 This parameter can be a value of @ref SWPMI_Voltage_Class */ 69 70 uint32_t BitRate; /*!< Specifies the SWPMI Bitrate. 71 This parameter must be a number between 0 and 63U. 72 The Bitrate is computed using the following formula: 73 SWPMI_freq = SWPMI_clk / (((BitRate) + 1) * 4) 74 */ 75 76 uint32_t TxBufferingMode; /*!< Specifies the transmission buffering mode. 77 This parameter can be a value of @ref SWPMI_Tx_Buffering_Mode */ 78 79 uint32_t RxBufferingMode; /*!< Specifies the reception buffering mode. 80 This parameter can be a value of @ref SWPMI_Rx_Buffering_Mode */ 81 82 }SWPMI_InitTypeDef; 83 84 85 /** 86 * @brief HAL SWPMI State structures definition 87 */ 88 typedef enum 89 { 90 HAL_SWPMI_STATE_RESET = 0x00, /*!< Peripheral Reset state */ 91 HAL_SWPMI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ 92 HAL_SWPMI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ 93 HAL_SWPMI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ 94 HAL_SWPMI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ 95 HAL_SWPMI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */ 96 HAL_SWPMI_STATE_TIMEOUT = 0x03, /*!< Timeout state */ 97 HAL_SWPMI_STATE_ERROR = 0x04 /*!< Error */ 98 }HAL_SWPMI_StateTypeDef; 99 100 /** 101 * @brief SWPMI handle Structure definition 102 */ 103 typedef struct __SWPMI_HandleTypeDef 104 { 105 SWPMI_TypeDef *Instance; /*!< SWPMI registers base address */ 106 107 SWPMI_InitTypeDef Init; /*!< SWPMI communication parameters */ 108 109 uint32_t *pTxBuffPtr; /*!< Pointer to SWPMI Tx transfer Buffer */ 110 111 uint32_t TxXferSize; /*!< SWPMI Tx Transfer size */ 112 113 uint32_t TxXferCount; /*!< SWPMI Tx Transfer Counter */ 114 115 uint32_t *pRxBuffPtr; /*!< Pointer to SWPMI Rx transfer Buffer */ 116 117 uint32_t RxXferSize; /*!< SWPMI Rx Transfer size */ 118 119 uint32_t RxXferCount; /*!< SWPMI Rx Transfer Counter */ 120 121 DMA_HandleTypeDef *hdmatx; /*!< SWPMI Tx DMA Handle parameters */ 122 123 DMA_HandleTypeDef *hdmarx; /*!< SWPMI Rx DMA Handle parameters */ 124 125 HAL_LockTypeDef Lock; /*!< SWPMI object */ 126 127 __IO HAL_SWPMI_StateTypeDef State; /*!< SWPMI communication state */ 128 129 __IO uint32_t ErrorCode; /*!< SWPMI Error code */ 130 131 #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1) 132 void (*RxCpltCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI receive complete callback */ 133 void (*RxHalfCpltCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI receive half complete callback */ 134 void (*TxCpltCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI transmit complete callback */ 135 void (*TxHalfCpltCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI transmit half complete callback */ 136 void (*ErrorCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI error callback */ 137 void (*MspInitCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI MSP init callback */ 138 void (*MspDeInitCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI MSP de-init callback */ 139 #endif 140 141 }SWPMI_HandleTypeDef; 142 143 #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1) 144 /** 145 * @brief SWPMI callback ID enumeration definition 146 */ 147 typedef enum 148 { 149 HAL_SWPMI_RX_COMPLETE_CB_ID = 0x00U, /*!< SWPMI receive complete callback ID */ 150 HAL_SWPMI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SWPMI receive half complete callback ID */ 151 HAL_SWPMI_TX_COMPLETE_CB_ID = 0x02U, /*!< SWPMI transmit complete callback ID */ 152 HAL_SWPMI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SWPMI transmit half complete callback ID */ 153 HAL_SWPMI_ERROR_CB_ID = 0x04U, /*!< SWPMI error callback ID */ 154 HAL_SWPMI_MSPINIT_CB_ID = 0x05U, /*!< SWPMI MSP init callback ID */ 155 HAL_SWPMI_MSPDEINIT_CB_ID = 0x06U /*!< SWPMI MSP de-init callback ID */ 156 }HAL_SWPMI_CallbackIDTypeDef; 157 158 /** 159 * @brief SWPMI callback pointer definition 160 */ 161 typedef void (*pSWPMI_CallbackTypeDef)(SWPMI_HandleTypeDef *hswpmi); 162 #endif 163 164 /** 165 * @} 166 */ 167 168 /* Exported constants --------------------------------------------------------*/ 169 /** @defgroup SWPMI_Exported_Constants SWPMI Exported Constants 170 * @{ 171 */ 172 173 /** 174 * @defgroup SWPMI_Error_Code SWPMI Error Code Bitmap 175 * @{ 176 */ 177 #define HAL_SWPMI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ 178 #define HAL_SWPMI_ERROR_CRC ((uint32_t)0x00000004) /*!< frame error */ 179 #define HAL_SWPMI_ERROR_OVR ((uint32_t)0x00000008) /*!< Overrun error */ 180 #define HAL_SWPMI_ERROR_UDR ((uint32_t)0x0000000C) /*!< Underrun error */ 181 #define HAL_SWPMI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */ 182 #define HAL_SWPMI_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Transfer timeout */ 183 #define HAL_SWPMI_ERROR_TXBEF_TIMEOUT ((uint32_t)0x00000040) /*!< End Tx buffer timeout */ 184 #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1) 185 #define HAL_SWPMI_ERROR_INVALID_CALLBACK ((uint32_t)0x00000100) /*!< Invalid callback error */ 186 #endif 187 /** 188 * @} 189 */ 190 191 /** @defgroup SWPMI_Voltage_Class SWPMI Voltage Class 192 * @{ 193 */ 194 #define SWPMI_VOLTAGE_CLASS_C ((uint32_t)0x00000000) 195 #define SWPMI_VOLTAGE_CLASS_B SWPMI_OR_CLASS 196 /** 197 * @} 198 */ 199 200 /** @defgroup SWPMI_Tx_Buffering_Mode SWPMI Tx Buffering Mode 201 * @{ 202 */ 203 #define SWPMI_TX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000) 204 #define SWPMI_TX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000) 205 #define SWPMI_TX_MULTI_SOFTWAREBUFFER SWPMI_CR_TXMODE 206 /** 207 * @} 208 */ 209 210 /** @defgroup SWPMI_Rx_Buffering_Mode SWPMI Rx Buffering Mode 211 * @{ 212 */ 213 #define SWPMI_RX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000) 214 #define SWPMI_RX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000) 215 #define SWPMI_RX_MULTI_SOFTWAREBUFFER SWPMI_CR_RXMODE 216 /** 217 * @} 218 */ 219 220 /** @defgroup SWPMI_Flags SWPMI Status Flags 221 * Elements values convention: 0xXXXXXXXX 222 * - 0xXXXXXXXX : Flag mask in the ISR register 223 * @{ 224 */ 225 #define SWPMI_FLAG_RXBFF SWPMI_ISR_RXBFF 226 #define SWPMI_FLAG_TXBEF SWPMI_ISR_TXBEF 227 #define SWPMI_FLAG_RXBERF SWPMI_ISR_RXBERF 228 #define SWPMI_FLAG_RXOVRF SWPMI_ISR_RXOVRF 229 #define SWPMI_FLAG_TXUNRF SWPMI_ISR_TXUNRF 230 #define SWPMI_FLAG_RXNE SWPMI_ISR_RXNE 231 #define SWPMI_FLAG_TXE SWPMI_ISR_TXE 232 #define SWPMI_FLAG_TCF SWPMI_ISR_TCF 233 #define SWPMI_FLAG_SRF SWPMI_ISR_SRF 234 #define SWPMI_FLAG_SUSP SWPMI_ISR_SUSP 235 #define SWPMI_FLAG_DEACTF SWPMI_ISR_DEACTF 236 /** 237 * @} 238 */ 239 240 /** @defgroup SWPMI_Interrupt_definition SWPMI Interrupts Definition 241 * Elements values convention: 0xXXXX 242 * - 0xXXXX : Flag mask in the IER register 243 * @{ 244 */ 245 #define SWPMI_IT_SRIE SWPMI_IER_SRIE 246 #define SWPMI_IT_TCIE SWPMI_IER_TCIE 247 #define SWPMI_IT_TIE SWPMI_IER_TIE 248 #define SWPMI_IT_RIE SWPMI_IER_RIE 249 #define SWPMI_IT_TXUNRIE SWPMI_IER_TXUNRIE 250 #define SWPMI_IT_RXOVRIE SWPMI_IER_RXOVRIE 251 #define SWPMI_IT_RXBERIE SWPMI_IER_RXBERIE 252 #define SWPMI_IT_TXBEIE SWPMI_IER_TXBEIE 253 #define SWPMI_IT_RXBFIE SWPMI_IER_RXBFIE 254 /** 255 * @} 256 */ 257 258 /** 259 * @} 260 */ 261 262 /* Exported macros -----------------------------------------------------------*/ 263 /** @defgroup SWPMI_Exported_Macros SWPMI Exported Macros 264 * @{ 265 */ 266 267 /** @brief Reset SWPMI handle state. 268 * @param __HANDLE__ specifies the SWPMI Handle. 269 * @retval None 270 */ 271 #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1) 272 #define __HAL_SWPMI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 273 (__HANDLE__)->State = HAL_SWPMI_STATE_RESET; \ 274 (__HANDLE__)->MspInitCallback = NULL; \ 275 (__HANDLE__)->MspDeInitCallback = NULL; \ 276 } while(0) 277 #else 278 #define __HAL_SWPMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SWPMI_STATE_RESET) 279 #endif 280 281 /** 282 * @brief Enable the SWPMI peripheral. 283 * @param __HANDLE__ SWPMI handle 284 * @retval None 285 */ 286 #define __HAL_SWPMI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT) 287 288 /** 289 * @brief Disable the SWPMI peripheral. 290 * @param __HANDLE__ SWPMI handle 291 * @retval None 292 */ 293 #define __HAL_SWPMI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT) 294 295 /** @brief Check whether the specified SWPMI flag is set or not. 296 * @param __HANDLE__ specifies the SWPMI Handle. 297 * @param __FLAG__: specifies the flag to check. 298 * This parameter can be one of the following values: 299 * @arg SWPMI_FLAG_RXBFF Receive buffer full flag. 300 * @arg SWPMI_FLAG_TXBEF Transmit buffer empty flag. 301 * @arg SWPMI_FLAG_RXBERF Receive CRC error flag. 302 * @arg SWPMI_FLAG_RXOVRF Receive overrun error flag. 303 * @arg SWPMI_FLAG_TXUNRF Transmit underrun error flag. 304 * @arg SWPMI_FLAG_RXNE Receive data register not empty. 305 * @arg SWPMI_FLAG_TXE Transmit data register empty. 306 * @arg SWPMI_FLAG_TCF Transfer complete flag. 307 * @arg SWPMI_FLAG_SRF Slave resume flag. 308 * @arg SWPMI_FLAG_SUSP SUSPEND flag. 309 * @arg SWPMI_FLAG_DEACTF DEACTIVATED flag. 310 * @retval The new state of __FLAG__ (TRUE or FALSE). 311 */ 312 #define __HAL_SWPMI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->ISR, (__FLAG__)) == (__FLAG__)) 313 314 /** @brief Clear the specified SWPMI ISR flag. 315 * @param __HANDLE__ specifies the SWPMI Handle. 316 * @param __FLAG__: specifies the flag to clear. 317 * This parameter can be one of the following values: 318 * @arg SWPMI_FLAG_RXBFF Receive buffer full flag. 319 * @arg SWPMI_FLAG_TXBEF Transmit buffer empty flag. 320 * @arg SWPMI_FLAG_RXBERF Receive CRC error flag. 321 * @arg SWPMI_FLAG_RXOVRF Receive overrun error flag. 322 * @arg SWPMI_FLAG_TXUNRF Transmit underrun error flag. 323 * @arg SWPMI_FLAG_TCF Transfer complete flag. 324 * @arg SWPMI_FLAG_SRF Slave resume flag. 325 * @retval None 326 */ 327 #define __HAL_SWPMI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->ICR, (__FLAG__)) 328 329 /** @brief Enable the specified SWPMI interrupt. 330 * @param __HANDLE__ specifies the SWPMI Handle. 331 * @param __INTERRUPT__ specifies the SWPMI interrupt source to enable. 332 * This parameter can be one of the following values: 333 * @arg SWPMI_IT_SRIE Slave resume interrupt. 334 * @arg SWPMI_IT_TCIE Transmit complete interrupt. 335 * @arg SWPMI_IT_TIE Transmit interrupt. 336 * @arg SWPMI_IT_RIE Receive interrupt. 337 * @arg SWPMI_IT_TXUNRIE Transmit underrun error interrupt. 338 * @arg SWPMI_IT_RXOVRIE Receive overrun error interrupt. 339 * @arg SWPMI_IT_RXBEIE Receive CRC error interrupt. 340 * @arg SWPMI_IT_TXBEIE Transmit buffer empty interrupt. 341 * @arg SWPMI_IT_RXBFIE Receive buffer full interrupt. 342 * @retval None 343 */ 344 #define __HAL_SWPMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__)) 345 346 /** @brief Disable the specified SWPMI interrupt. 347 * @param __HANDLE__ specifies the SWPMI Handle. 348 * @param __INTERRUPT__ specifies the SWPMI interrupt source to disable. 349 * This parameter can be one of the following values: 350 * @arg SWPMI_IT_SRIE Slave resume interrupt. 351 * @arg SWPMI_IT_TCIE Transmit complete interrupt. 352 * @arg SWPMI_IT_TIE Transmit interrupt. 353 * @arg SWPMI_IT_RIE Receive interrupt. 354 * @arg SWPMI_IT_TXUNRIE Transmit underrun error interrupt. 355 * @arg SWPMI_IT_RXOVRIE Receive overrun error interrupt. 356 * @arg SWPMI_IT_RXBEIE Receive CRC error interrupt. 357 * @arg SWPMI_IT_TXBEIE Transmit buffer empty interrupt. 358 * @arg SWPMI_IT_RXBFIE Receive buffer full interrupt. 359 * @retval None 360 */ 361 #define __HAL_SWPMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__)) 362 363 /** @brief Check whether the specified SWPMI interrupt has occurred or not. 364 * @param __HANDLE__ specifies the SWPMI Handle. 365 * @param __IT__ specifies the SWPMI interrupt to check. 366 * This parameter can be one of the following values: 367 * @arg SWPMI_IT_SRIE Slave resume interrupt. 368 * @arg SWPMI_IT_TCIE Transmit complete interrupt. 369 * @arg SWPMI_IT_TIE Transmit interrupt. 370 * @arg SWPMI_IT_RIE Receive interrupt. 371 * @arg SWPMI_IT_TXUNRIE Transmit underrun error interrupt. 372 * @arg SWPMI_IT_RXOVRIE Receive overrun error interrupt. 373 * @arg SWPMI_IT_RXBERIE Receive CRC error interrupt. 374 * @arg SWPMI_IT_TXBEIE Transmit buffer empty interrupt. 375 * @arg SWPMI_IT_RXBFIE Receive buffer full interrupt. 376 * @retval The new state of __IT__ (TRUE or FALSE). 377 */ 378 #define __HAL_SWPMI_GET_IT(__HANDLE__, __IT__) (READ_BIT((__HANDLE__)->Instance->ISR,(__IT__)) == (__IT__)) 379 380 /** @brief Check whether the specified SWPMI interrupt source is enabled or not. 381 * @param __HANDLE__ specifies the SWPMI Handle. 382 * @param __IT__ specifies the SWPMI interrupt source to check. 383 * This parameter can be one of the following values: 384 * @arg SWPMI_IT_SRIE Slave resume interrupt. 385 * @arg SWPMI_IT_TCIE Transmit complete interrupt. 386 * @arg SWPMI_IT_TIE Transmit interrupt. 387 * @arg SWPMI_IT_RIE Receive interrupt. 388 * @arg SWPMI_IT_TXUNRIE Transmit underrun error interrupt. 389 * @arg SWPMI_IT_RXOVRIE Receive overrun error interrupt. 390 * @arg SWPMI_IT_RXBERIE Receive CRC error interrupt. 391 * @arg SWPMI_IT_TXBEIE Transmit buffer empty interrupt. 392 * @arg SWPMI_IT_RXBFIE Receive buffer full interrupt. 393 * @retval The new state of __IT__ (TRUE or FALSE). 394 */ 395 #define __HAL_SWPMI_GET_IT_SOURCE(__HANDLE__, __IT__) ((READ_BIT((__HANDLE__)->Instance->IER, (__IT__)) == (__IT__)) ? SET : RESET) 396 397 /** 398 * @} 399 */ 400 401 /* Exported functions --------------------------------------------------------*/ 402 /** @defgroup SWPMI_Exported_Functions SWPMI Exported Functions 403 * @{ 404 */ 405 /* Initialization/de-initialization functions ********************************/ 406 HAL_StatusTypeDef HAL_SWPMI_Init(SWPMI_HandleTypeDef *hswpmi); 407 HAL_StatusTypeDef HAL_SWPMI_DeInit(SWPMI_HandleTypeDef *hswpmi); 408 void HAL_SWPMI_MspInit(SWPMI_HandleTypeDef *hswpmi); 409 void HAL_SWPMI_MspDeInit(SWPMI_HandleTypeDef *hswpmi); 410 411 #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1) 412 /* SWPMI callbacks register/unregister functions ********************************/ 413 HAL_StatusTypeDef HAL_SWPMI_RegisterCallback(SWPMI_HandleTypeDef *hswpmi, 414 HAL_SWPMI_CallbackIDTypeDef CallbackID, 415 pSWPMI_CallbackTypeDef pCallback); 416 HAL_StatusTypeDef HAL_SWPMI_UnRegisterCallback(SWPMI_HandleTypeDef *hswpmi, 417 HAL_SWPMI_CallbackIDTypeDef CallbackID); 418 #endif 419 420 /* IO operation functions *****************************************************/ 421 HAL_StatusTypeDef HAL_SWPMI_Transmit(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout); 422 HAL_StatusTypeDef HAL_SWPMI_Receive(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout); 423 HAL_StatusTypeDef HAL_SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); 424 HAL_StatusTypeDef HAL_SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); 425 HAL_StatusTypeDef HAL_SWPMI_Transmit_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); 426 HAL_StatusTypeDef HAL_SWPMI_Receive_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); 427 HAL_StatusTypeDef HAL_SWPMI_DMAStop(SWPMI_HandleTypeDef *hswpmi); 428 HAL_StatusTypeDef HAL_SWPMI_EnableLoopback(SWPMI_HandleTypeDef *hswpmi); 429 HAL_StatusTypeDef HAL_SWPMI_DisableLoopback(SWPMI_HandleTypeDef *hswpmi); 430 void HAL_SWPMI_IRQHandler(SWPMI_HandleTypeDef *hswpmi); 431 void HAL_SWPMI_TxCpltCallback(SWPMI_HandleTypeDef *hswpmi); 432 void HAL_SWPMI_TxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi); 433 void HAL_SWPMI_RxCpltCallback(SWPMI_HandleTypeDef *hswpmi); 434 void HAL_SWPMI_RxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi); 435 void HAL_SWPMI_ErrorCallback(SWPMI_HandleTypeDef *hswpmi); 436 437 /* Peripheral Control and State functions ************************************/ 438 HAL_SWPMI_StateTypeDef HAL_SWPMI_GetState(SWPMI_HandleTypeDef *hswpmi); 439 uint32_t HAL_SWPMI_GetError(SWPMI_HandleTypeDef *hswpmi); 440 441 /** 442 * @} 443 */ 444 445 /* Private types -------------------------------------------------------------*/ 446 /** @defgroup SWPMI_Private_Types SWPMI Private Types 447 * @{ 448 */ 449 450 /** 451 * @} 452 */ 453 454 /* Private variables ---------------------------------------------------------*/ 455 /** @defgroup SWPMI_Private_Variables SWPMI Private Variables 456 * @{ 457 */ 458 459 /** 460 * @} 461 */ 462 463 /* Private constants ---------------------------------------------------------*/ 464 /** @defgroup SWPMI_Private_Constants SWPMI Private Constants 465 * @{ 466 */ 467 468 /** 469 * @} 470 */ 471 472 /* Private macros ------------------------------------------------------------*/ 473 /** @defgroup SWPMI_Private_Macros SWPMI Private Macros 474 * @{ 475 */ 476 477 478 #define IS_SWPMI_VOLTAGE_CLASS(__CLASS__) (((__CLASS__) == SWPMI_VOLTAGE_CLASS_C) || \ 479 ((__CLASS__) == SWPMI_VOLTAGE_CLASS_B)) 480 481 #define IS_SWPMI_BITRATE_VALUE(__VALUE__) (((__VALUE__) <= 63U)) 482 483 484 #define IS_SWPMI_TX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_TX_NO_SOFTWAREBUFFER) || \ 485 ((__MODE__) == SWPMI_TX_MULTI_SOFTWAREBUFFER)) 486 487 488 #define IS_SWPMI_RX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_RX_NO_SOFTWAREBUFFER) || \ 489 ((__MODE__) == SWPMI_RX_MULTI_SOFTWAREBUFFER)) 490 491 /** 492 * @} 493 */ 494 495 /** 496 * @} 497 */ 498 499 #endif /* SWPMI1 */ 500 501 /** 502 * @} 503 */ 504 505 #ifdef __cplusplus 506 } 507 #endif 508 509 #endif /* STM32L4xx_HAL_SWPMI_H */ 510 511 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 512
