1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_sai.h 4 * @author MCD Application Team 5 * @brief Header file of SAI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef STM32L4xx_HAL_SAI_H 38 #define STM32L4xx_HAL_SAI_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 #if !defined(STM32L412xx) && !defined(STM32L422xx) 45 46 /* Includes ------------------------------------------------------------------*/ 47 #include "stm32l4xx_hal_def.h" 48 49 /** @addtogroup STM32L4xx_HAL_Driver 50 * @{ 51 */ 52 53 /** @addtogroup SAI 54 * @{ 55 */ 56 57 /* Exported types ------------------------------------------------------------*/ 58 /** @defgroup SAI_Exported_Types SAI Exported Types 59 * @{ 60 */ 61 62 /** 63 * @brief HAL State structures definition 64 */ 65 typedef enum 66 { 67 HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */ 68 HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */ 69 HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */ 70 HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */ 71 HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */ 72 } HAL_SAI_StateTypeDef; 73 74 /** 75 * @brief SAI Callback prototype 76 */ 77 typedef void (*SAIcallback)(void); 78 79 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 80 /** @defgroup SAI_PDM_Structure_definition SAI PDM Structure definition 81 * @brief SAI PDM Init structure definition 82 * @{ 83 */ 84 typedef struct 85 { 86 FunctionalState Activation; /*!< Enable/disable PDM interface */ 87 uint32_t MicPairsNbr; /*!< Specifies the number of microphone pairs used. 88 This parameter must be a number between Min_Data = 1 and Max_Data = 3. */ 89 uint32_t ClockEnable; /*!< Specifies which clock must be enabled. 90 This parameter can be a values combination of @ref SAI_PDM_ClockEnable */ 91 } SAI_PdmInitTypeDef; 92 /** 93 * @} 94 */ 95 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 96 97 /** @defgroup SAI_Init_Structure_definition SAI Init Structure definition 98 * @brief SAI Init Structure definition 99 * @{ 100 */ 101 typedef struct 102 { 103 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode. 104 This parameter can be a value of @ref SAI_Block_Mode */ 105 106 uint32_t Synchro; /*!< Specifies SAI Block synchronization 107 This parameter can be a value of @ref SAI_Block_Synchronization */ 108 109 uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common 110 for BlockA and BlockB 111 This parameter can be a value of @ref SAI_Block_SyncExt 112 @note If both audio blocks of same SAI are used, this parameter has 113 to be set to the same value for each audio block */ 114 115 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven. 116 This parameter can be a value of @ref SAI_Block_Output_Drive 117 @note This value has to be set before enabling the audio block 118 but after the audio block configuration. */ 119 120 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not. 121 This parameter can be a value of @ref SAI_Block_NoDivider 122 @note For STM32L4Rx/STM32L4Sx devices : 123 If bit NOMCK in the SAI_xCR1 register is cleared, the frame length 124 should be aligned to a number equal to a power of 2, from 8 to 256. 125 If bit NOMCK in the SAI_xCR1 register is set, the frame length can 126 take any of the values without constraint. There is no MCLK_x clock 127 which can be output. 128 For other devices : 129 If bit NODIV in the SAI_xCR1 register is cleared, the frame length 130 should be aligned to a number equal to a power of 2, from 8 to 256. 131 If bit NODIV in the SAI_xCR1 register is set, the frame length can 132 take any of the values without constraint since the input clock of 133 the audio block should be equal to the bit clock. 134 There is no MCLK_x clock which can be output. */ 135 136 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold. 137 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */ 138 139 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling. 140 This parameter can be a value of @ref SAI_Audio_Frequency */ 141 142 uint32_t Mckdiv; /*!< Specifies the master clock divider. 143 This parameter must be a number between Min_Data = 0 and Max_Data = 63 on STM32L4Rx/STM32L4Sx devices. 144 This parameter must be a number between Min_Data = 0 and Max_Data = 15 on other devices. 145 @note This parameter is used only if AudioFrequency is set to 146 SAI_AUDIO_FREQUENCY_MCKDIV otherwise it is internally computed. */ 147 148 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 149 uint32_t MckOverSampling; /*!< Specifies the master clock oversampling. 150 This parameter can be a value of @ref SAI_Block_Mck_OverSampling */ 151 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 152 153 uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected. 154 This parameter can be a value of @ref SAI_Mono_Stereo_Mode */ 155 156 uint32_t CompandingMode; /*!< Specifies the companding mode type. 157 This parameter can be a value of @ref SAI_Block_Companding_Mode */ 158 159 uint32_t TriState; /*!< Specifies the companding mode type. 160 This parameter can be a value of @ref SAI_TRIState_Management */ 161 162 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 163 SAI_PdmInitTypeDef PdmInit; /*!< Specifies the PDM configuration. */ 164 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 165 166 /* This part of the structure is automatically filled if your are using the high level initialisation 167 function HAL_SAI_InitProtocol */ 168 169 uint32_t Protocol; /*!< Specifies the SAI Block protocol. 170 This parameter can be a value of @ref SAI_Block_Protocol */ 171 172 uint32_t DataSize; /*!< Specifies the SAI Block data size. 173 This parameter can be a value of @ref SAI_Block_Data_Size */ 174 175 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 176 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */ 177 178 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity. 179 This parameter can be a value of @ref SAI_Block_Clock_Strobing */ 180 } SAI_InitTypeDef; 181 /** 182 * @} 183 */ 184 185 /** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition 186 * @brief SAI Frame Init structure definition 187 * @{ 188 */ 189 typedef struct 190 { 191 192 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame. 193 This parameter must be a number between Min_Data = 8 and Max_Data = 256. 194 @note If master clock MCLK_x pin is declared as an output, the frame length 195 should be aligned to a number equal to power of 2 in order to keep 196 in an audio frame, an integer number of MCLK pulses by bit Clock. */ 197 198 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length. 199 This Parameter specifies the length in number of bit clock (SCK + 1) 200 of the active level of FS signal in audio frame. 201 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */ 202 203 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition. 204 This parameter can be a value of @ref SAI_Block_FS_Definition */ 205 206 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity. 207 This parameter can be a value of @ref SAI_Block_FS_Polarity */ 208 209 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset. 210 This parameter can be a value of @ref SAI_Block_FS_Offset */ 211 212 } SAI_FrameInitTypeDef; 213 /** 214 * @} 215 */ 216 217 /** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition 218 * @brief SAI Block Slot Init Structure definition 219 * @{ 220 */ 221 typedef struct 222 { 223 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot. 224 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */ 225 226 uint32_t SlotSize; /*!< Specifies the Slot Size. 227 This parameter can be a value of @ref SAI_Block_Slot_Size */ 228 229 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame. 230 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ 231 232 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated. 233 This parameter can be a value of @ref SAI_Block_Slot_Active */ 234 } SAI_SlotInitTypeDef; 235 /** 236 * @} 237 */ 238 239 /** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition 240 * @brief SAI handle Structure definition 241 * @{ 242 */ 243 typedef struct __SAI_HandleTypeDef 244 { 245 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */ 246 247 SAI_InitTypeDef Init; /*!< SAI communication parameters */ 248 249 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */ 250 251 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */ 252 253 uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */ 254 255 uint16_t XferSize; /*!< SAI transfer size */ 256 257 uint16_t XferCount; /*!< SAI transfer counter */ 258 259 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */ 260 261 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */ 262 263 SAIcallback mutecallback; /*!< SAI mute callback */ 264 265 void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */ 266 267 HAL_LockTypeDef Lock; /*!< SAI locking object */ 268 269 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */ 270 271 __IO uint32_t ErrorCode; /*!< SAI Error code */ 272 273 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 274 void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */ 275 void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */ 276 void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */ 277 void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */ 278 void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */ 279 void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */ 280 void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */ 281 #endif 282 } SAI_HandleTypeDef; 283 /** 284 * @} 285 */ 286 287 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 288 /** 289 * @brief SAI callback ID enumeration definition 290 */ 291 typedef enum 292 { 293 HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */ 294 HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */ 295 HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */ 296 HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */ 297 HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */ 298 HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */ 299 HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */ 300 } HAL_SAI_CallbackIDTypeDef; 301 302 /** 303 * @brief SAI callback pointer definition 304 */ 305 typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai); 306 #endif 307 308 /** 309 * @} 310 */ 311 312 /* Exported constants --------------------------------------------------------*/ 313 /** @defgroup SAI_Exported_Constants SAI Exported Constants 314 * @{ 315 */ 316 317 /** @defgroup SAI_Error_Code SAI Error Code 318 * @{ 319 */ 320 #define HAL_SAI_ERROR_NONE 0x00000000U /*!< No error */ 321 #define HAL_SAI_ERROR_OVR 0x00000001U /*!< Overrun Error */ 322 #define HAL_SAI_ERROR_UDR 0x00000002U /*!< Underrun error */ 323 #define HAL_SAI_ERROR_AFSDET 0x00000004U /*!< Anticipated Frame synchronisation detection */ 324 #define HAL_SAI_ERROR_LFSDET 0x00000008U /*!< Late Frame synchronisation detection */ 325 #define HAL_SAI_ERROR_CNREADY 0x00000010U /*!< codec not ready */ 326 #define HAL_SAI_ERROR_WCKCFG 0x00000020U /*!< Wrong clock configuration */ 327 #define HAL_SAI_ERROR_TIMEOUT 0x00000040U /*!< Timeout error */ 328 #define HAL_SAI_ERROR_DMA 0x00000080U /*!< DMA error */ 329 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 330 #define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */ 331 #endif 332 /** 333 * @} 334 */ 335 336 /** @defgroup SAI_Block_SyncExt SAI External synchronisation 337 * @{ 338 */ 339 #define SAI_SYNCEXT_DISABLE 0U 340 #define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1U 341 #define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2U 342 /** 343 * @} 344 */ 345 346 /** @defgroup SAI_Protocol SAI Supported protocol 347 * @{ 348 */ 349 #define SAI_I2S_STANDARD 0U 350 #define SAI_I2S_MSBJUSTIFIED 1U 351 #define SAI_I2S_LSBJUSTIFIED 2U 352 #define SAI_PCM_LONG 3U 353 #define SAI_PCM_SHORT 4U 354 /** 355 * @} 356 */ 357 358 /** @defgroup SAI_Protocol_DataSize SAI protocol data size 359 * @{ 360 */ 361 #define SAI_PROTOCOL_DATASIZE_16BIT 0U 362 #define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1U 363 #define SAI_PROTOCOL_DATASIZE_24BIT 2U 364 #define SAI_PROTOCOL_DATASIZE_32BIT 3U 365 /** 366 * @} 367 */ 368 369 /** @defgroup SAI_Audio_Frequency SAI Audio Frequency 370 * @{ 371 */ 372 #define SAI_AUDIO_FREQUENCY_192K 192000U 373 #define SAI_AUDIO_FREQUENCY_96K 96000U 374 #define SAI_AUDIO_FREQUENCY_48K 48000U 375 #define SAI_AUDIO_FREQUENCY_44K 44100U 376 #define SAI_AUDIO_FREQUENCY_32K 32000U 377 #define SAI_AUDIO_FREQUENCY_22K 22050U 378 #define SAI_AUDIO_FREQUENCY_16K 16000U 379 #define SAI_AUDIO_FREQUENCY_11K 11025U 380 #define SAI_AUDIO_FREQUENCY_8K 8000U 381 #define SAI_AUDIO_FREQUENCY_MCKDIV 0U 382 /** 383 * @} 384 */ 385 386 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 387 /** @defgroup SAI_Block_Mck_OverSampling SAI Block Master Clock OverSampling 388 * @{ 389 */ 390 #define SAI_MCK_OVERSAMPLING_DISABLE 0x00000000U 391 #define SAI_MCK_OVERSAMPLING_ENABLE SAI_xCR1_OSR 392 /** 393 * @} 394 */ 395 396 /** @defgroup SAI_PDM_ClockEnable SAI PDM Clock Enable 397 * @{ 398 */ 399 #define SAI_PDM_CLOCK1_ENABLE SAI_PDMCR_CKEN1 400 #define SAI_PDM_CLOCK2_ENABLE SAI_PDMCR_CKEN2 401 /** 402 * @} 403 */ 404 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 405 406 /** @defgroup SAI_Block_Mode SAI Block Mode 407 * @{ 408 */ 409 #define SAI_MODEMASTER_TX 0x00000000U 410 #define SAI_MODEMASTER_RX SAI_xCR1_MODE_0 411 #define SAI_MODESLAVE_TX SAI_xCR1_MODE_1 412 #define SAI_MODESLAVE_RX (SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0) 413 414 /** 415 * @} 416 */ 417 418 /** @defgroup SAI_Block_Protocol SAI Block Protocol 419 * @{ 420 */ 421 #define SAI_FREE_PROTOCOL 0x00000000U 422 #define SAI_SPDIF_PROTOCOL SAI_xCR1_PRTCFG_0 423 #define SAI_AC97_PROTOCOL SAI_xCR1_PRTCFG_1 424 /** 425 * @} 426 */ 427 428 /** @defgroup SAI_Block_Data_Size SAI Block Data Size 429 * @{ 430 */ 431 #define SAI_DATASIZE_8 SAI_xCR1_DS_1 432 #define SAI_DATASIZE_10 (SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 433 #define SAI_DATASIZE_16 SAI_xCR1_DS_2 434 #define SAI_DATASIZE_20 (SAI_xCR1_DS_2 | SAI_xCR1_DS_0) 435 #define SAI_DATASIZE_24 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1) 436 #define SAI_DATASIZE_32 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 437 /** 438 * @} 439 */ 440 441 /** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission 442 * @{ 443 */ 444 #define SAI_FIRSTBIT_MSB 0x00000000U 445 #define SAI_FIRSTBIT_LSB SAI_xCR1_LSBFIRST 446 /** 447 * @} 448 */ 449 450 /** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing 451 * @{ 452 */ 453 #define SAI_CLOCKSTROBING_FALLINGEDGE 0U 454 #define SAI_CLOCKSTROBING_RISINGEDGE 1U 455 /** 456 * @} 457 */ 458 459 /** @defgroup SAI_Block_Synchronization SAI Block Synchronization 460 * @{ 461 */ 462 #define SAI_ASYNCHRONOUS 0U /*!< Asynchronous */ 463 #define SAI_SYNCHRONOUS 1U /*!< Synchronous with other block of same SAI */ 464 #define SAI_SYNCHRONOUS_EXT_SAI1 2U /*!< Synchronous with other SAI, SAI1 */ 465 #define SAI_SYNCHRONOUS_EXT_SAI2 3U /*!< Synchronous with other SAI, SAI2 */ 466 /** 467 * @} 468 */ 469 470 /** @defgroup SAI_Block_Output_Drive SAI Block Output Drive 471 * @{ 472 */ 473 #define SAI_OUTPUTDRIVE_DISABLE 0x00000000U 474 #define SAI_OUTPUTDRIVE_ENABLE SAI_xCR1_OUTDRIV 475 /** 476 * @} 477 */ 478 479 /** @defgroup SAI_Block_NoDivider SAI Block NoDivider 480 * @{ 481 */ 482 #define SAI_MASTERDIVIDER_ENABLE 0x00000000U 483 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 484 #define SAI_MASTERDIVIDER_DISABLE SAI_xCR1_NOMCK 485 #else 486 #define SAI_MASTERDIVIDER_DISABLE SAI_xCR1_NODIV 487 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 488 /** 489 * @} 490 */ 491 492 /** @defgroup SAI_Block_FS_Definition SAI Block FS Definition 493 * @{ 494 */ 495 #define SAI_FS_STARTFRAME 0x00000000U 496 #define SAI_FS_CHANNEL_IDENTIFICATION SAI_xFRCR_FSDEF 497 /** 498 * @} 499 */ 500 501 /** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity 502 * @{ 503 */ 504 #define SAI_FS_ACTIVE_LOW 0x00000000U 505 #define SAI_FS_ACTIVE_HIGH SAI_xFRCR_FSPOL 506 /** 507 * @} 508 */ 509 510 /** @defgroup SAI_Block_FS_Offset SAI Block FS Offset 511 * @{ 512 */ 513 #define SAI_FS_FIRSTBIT 0x00000000U 514 #define SAI_FS_BEFOREFIRSTBIT SAI_xFRCR_FSOFF 515 /** 516 * @} 517 */ 518 519 /** @defgroup SAI_Block_Slot_Size SAI Block Slot Size 520 * @{ 521 */ 522 #define SAI_SLOTSIZE_DATASIZE 0x00000000U 523 #define SAI_SLOTSIZE_16B SAI_xSLOTR_SLOTSZ_0 524 #define SAI_SLOTSIZE_32B SAI_xSLOTR_SLOTSZ_1 525 /** 526 * @} 527 */ 528 529 /** @defgroup SAI_Block_Slot_Active SAI Block Slot Active 530 * @{ 531 */ 532 #define SAI_SLOT_NOTACTIVE 0x00000000U 533 #define SAI_SLOTACTIVE_0 0x00000001U 534 #define SAI_SLOTACTIVE_1 0x00000002U 535 #define SAI_SLOTACTIVE_2 0x00000004U 536 #define SAI_SLOTACTIVE_3 0x00000008U 537 #define SAI_SLOTACTIVE_4 0x00000010U 538 #define SAI_SLOTACTIVE_5 0x00000020U 539 #define SAI_SLOTACTIVE_6 0x00000040U 540 #define SAI_SLOTACTIVE_7 0x00000080U 541 #define SAI_SLOTACTIVE_8 0x00000100U 542 #define SAI_SLOTACTIVE_9 0x00000200U 543 #define SAI_SLOTACTIVE_10 0x00000400U 544 #define SAI_SLOTACTIVE_11 0x00000800U 545 #define SAI_SLOTACTIVE_12 0x00001000U 546 #define SAI_SLOTACTIVE_13 0x00002000U 547 #define SAI_SLOTACTIVE_14 0x00004000U 548 #define SAI_SLOTACTIVE_15 0x00008000U 549 #define SAI_SLOTACTIVE_ALL 0x0000FFFFU 550 /** 551 * @} 552 */ 553 554 /** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode 555 * @{ 556 */ 557 #define SAI_STEREOMODE 0x00000000U 558 #define SAI_MONOMODE SAI_xCR1_MONO 559 /** 560 * @} 561 */ 562 563 /** @defgroup SAI_TRIState_Management SAI TRIState Management 564 * @{ 565 */ 566 #define SAI_OUTPUT_NOTRELEASED 0x00000000U 567 #define SAI_OUTPUT_RELEASED SAI_xCR2_TRIS 568 /** 569 * @} 570 */ 571 572 /** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold 573 * @{ 574 */ 575 #define SAI_FIFOTHRESHOLD_EMPTY 0x00000000U 576 #define SAI_FIFOTHRESHOLD_1QF SAI_xCR2_FTH_0 577 #define SAI_FIFOTHRESHOLD_HF SAI_xCR2_FTH_1 578 #define SAI_FIFOTHRESHOLD_3QF (SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0) 579 #define SAI_FIFOTHRESHOLD_FULL SAI_xCR2_FTH_2 580 /** 581 * @} 582 */ 583 584 /** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode 585 * @{ 586 */ 587 #define SAI_NOCOMPANDING 0x00000000U 588 #define SAI_ULAW_1CPL_COMPANDING SAI_xCR2_COMP_1 589 #define SAI_ALAW_1CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0) 590 #define SAI_ULAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_CPL) 591 #define SAI_ALAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL) 592 /** 593 * @} 594 */ 595 596 /** @defgroup SAI_Block_Mute_Value SAI Block Mute Value 597 * @{ 598 */ 599 #define SAI_ZERO_VALUE 0x00000000U 600 #define SAI_LAST_SENT_VALUE SAI_xCR2_MUTEVAL 601 /** 602 * @} 603 */ 604 605 /** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition 606 * @{ 607 */ 608 #define SAI_IT_OVRUDR SAI_xIMR_OVRUDRIE 609 #define SAI_IT_MUTEDET SAI_xIMR_MUTEDETIE 610 #define SAI_IT_WCKCFG SAI_xIMR_WCKCFGIE 611 #define SAI_IT_FREQ SAI_xIMR_FREQIE 612 #define SAI_IT_CNRDY SAI_xIMR_CNRDYIE 613 #define SAI_IT_AFSDET SAI_xIMR_AFSDETIE 614 #define SAI_IT_LFSDET SAI_xIMR_LFSDETIE 615 /** 616 * @} 617 */ 618 619 /** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition 620 * @{ 621 */ 622 #define SAI_FLAG_OVRUDR SAI_xSR_OVRUDR 623 #define SAI_FLAG_MUTEDET SAI_xSR_MUTEDET 624 #define SAI_FLAG_WCKCFG SAI_xSR_WCKCFG 625 #define SAI_FLAG_FREQ SAI_xSR_FREQ 626 #define SAI_FLAG_CNRDY SAI_xSR_CNRDY 627 #define SAI_FLAG_AFSDET SAI_xSR_AFSDET 628 #define SAI_FLAG_LFSDET SAI_xSR_LFSDET 629 /** 630 * @} 631 */ 632 633 /** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level 634 * @{ 635 */ 636 #define SAI_FIFOSTATUS_EMPTY 0x00000000U 637 #define SAI_FIFOSTATUS_LESS1QUARTERFULL 0x00010000U 638 #define SAI_FIFOSTATUS_1QUARTERFULL 0x00020000U 639 #define SAI_FIFOSTATUS_HALFFULL 0x00030000U 640 #define SAI_FIFOSTATUS_3QUARTERFULL 0x00040000U 641 #define SAI_FIFOSTATUS_FULL 0x00050000U 642 /** 643 * @} 644 */ 645 646 /** 647 * @} 648 */ 649 650 /* Exported macro ------------------------------------------------------------*/ 651 /** @defgroup SAI_Exported_Macros SAI Exported Macros 652 * @brief macros to handle interrupts and specific configurations 653 * @{ 654 */ 655 656 /** @brief Reset SAI handle state. 657 * @param __HANDLE__ specifies the SAI Handle. 658 * @retval None 659 */ 660 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 661 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 662 (__HANDLE__)->State = HAL_SAI_STATE_RESET; \ 663 (__HANDLE__)->MspInitCallback = NULL; \ 664 (__HANDLE__)->MspDeInitCallback = NULL; \ 665 } while(0) 666 #else 667 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET) 668 #endif 669 670 /** @brief Enable the specified SAI interrupts. 671 * @param __HANDLE__ specifies the SAI Handle. 672 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 673 * This parameter can be one of the following values: 674 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 675 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 676 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 677 * @arg SAI_IT_FREQ: FIFO request interrupt enable 678 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 679 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 680 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 681 * @retval None 682 */ 683 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 684 685 /** @brief Disable the specified SAI interrupts. 686 * @param __HANDLE__ specifies the SAI Handle. 687 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 688 * This parameter can be one of the following values: 689 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 690 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 691 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 692 * @arg SAI_IT_FREQ: FIFO request interrupt enable 693 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 694 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 695 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 696 * @retval None 697 */ 698 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__))) 699 700 /** @brief Check whether the specified SAI interrupt source is enabled or not. 701 * @param __HANDLE__ specifies the SAI Handle. 702 * @param __INTERRUPT__ specifies the SAI interrupt source to check. 703 * This parameter can be one of the following values: 704 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 705 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 706 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 707 * @arg SAI_IT_FREQ: FIFO request interrupt enable 708 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 709 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 710 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 711 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). 712 */ 713 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 714 715 /** @brief Check whether the specified SAI flag is set or not. 716 * @param __HANDLE__ specifies the SAI Handle. 717 * @param __FLAG__ specifies the flag to check. 718 * This parameter can be one of the following values: 719 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag. 720 * @arg SAI_FLAG_MUTEDET: Mute detection flag. 721 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag. 722 * @arg SAI_FLAG_FREQ: FIFO request flag. 723 * @arg SAI_FLAG_CNRDY: Codec not ready flag. 724 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag. 725 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag. 726 * @retval The new state of __FLAG__ (TRUE or FALSE). 727 */ 728 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 729 730 /** @brief Clear the specified SAI pending flag. 731 * @param __HANDLE__ specifies the SAI Handle. 732 * @param __FLAG__ specifies the flag to check. 733 * This parameter can be any combination of the following values: 734 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun 735 * @arg SAI_FLAG_MUTEDET: Clear Mute detection 736 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration 737 * @arg SAI_FLAG_FREQ: Clear FIFO request 738 * @arg SAI_FLAG_CNRDY: Clear Codec not ready 739 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection 740 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection 741 * 742 * @retval None 743 */ 744 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__)) 745 746 /** @brief Enable SAI. 747 * @param __HANDLE__ specifies the SAI Handle. 748 * @retval None 749 */ 750 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN) 751 752 /** @brief Disable SAI. 753 * @param __HANDLE__ specifies the SAI Handle. 754 * @retval None 755 */ 756 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN) 757 758 /** 759 * @} 760 */ 761 762 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 763 /* Include SAI HAL Extension module */ 764 #include "stm32l4xx_hal_sai_ex.h" 765 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 766 767 /* Exported functions --------------------------------------------------------*/ 768 /** @addtogroup SAI_Exported_Functions 769 * @{ 770 */ 771 772 /* Initialization/de-initialization functions ********************************/ 773 /** @addtogroup SAI_Exported_Functions_Group1 774 * @{ 775 */ 776 HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot); 777 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai); 778 HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai); 779 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai); 780 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai); 781 782 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 783 /* SAI callbacks register/unregister functions ********************************/ 784 HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai, 785 HAL_SAI_CallbackIDTypeDef CallbackID, 786 pSAI_CallbackTypeDef pCallback); 787 HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai, 788 HAL_SAI_CallbackIDTypeDef CallbackID); 789 #endif 790 /** 791 * @} 792 */ 793 794 /* I/O operation functions ***************************************************/ 795 /** @addtogroup SAI_Exported_Functions_Group2 796 * @{ 797 */ 798 /* Blocking mode: Polling */ 799 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 800 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 801 802 /* Non-Blocking mode: Interrupt */ 803 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 804 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 805 806 /* Non-Blocking mode: DMA */ 807 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 808 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 809 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai); 810 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai); 811 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai); 812 813 /* Abort function */ 814 HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai); 815 816 /* Mute management */ 817 HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val); 818 HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai); 819 HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter); 820 HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai); 821 822 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 823 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai); 824 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai); 825 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai); 826 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai); 827 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai); 828 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai); 829 /** 830 * @} 831 */ 832 833 /** @addtogroup SAI_Exported_Functions_Group3 834 * @{ 835 */ 836 /* Peripheral State functions ************************************************/ 837 HAL_SAI_StateTypeDef HAL_SAI_GetState(SAI_HandleTypeDef *hsai); 838 uint32_t HAL_SAI_GetError(SAI_HandleTypeDef *hsai); 839 /** 840 * @} 841 */ 842 843 /** 844 * @} 845 */ 846 847 /* Private macros ------------------------------------------------------------*/ 848 /** @defgroup SAI_Private_Macros SAI Private Macros 849 * @{ 850 */ 851 #define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\ 852 ((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\ 853 ((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE)) 854 855 #define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\ 856 ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\ 857 ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\ 858 ((PROTOCOL) == SAI_PCM_LONG) ||\ 859 ((PROTOCOL) == SAI_PCM_SHORT)) 860 861 #define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\ 862 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\ 863 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\ 864 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT)) 865 866 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \ 867 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \ 868 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \ 869 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \ 870 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV)) 871 872 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 873 #define IS_SAI_BLOCK_MCK_OVERSAMPLING(VALUE) (((VALUE) == SAI_MCK_OVERSAMPLING_DISABLE) || \ 874 ((VALUE) == SAI_MCK_OVERSAMPLING_ENABLE)) 875 876 #define IS_SAI_PDM_MIC_PAIRS_NUMBER(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 3U)) 877 878 #define IS_SAI_PDM_CLOCK_ENABLE(CLOCK) (((CLOCK) != 0U) && \ 879 (((CLOCK) & ~(SAI_PDM_CLOCK1_ENABLE | SAI_PDM_CLOCK2_ENABLE)) == 0U)) 880 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 881 882 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ 883 ((MODE) == SAI_MODEMASTER_RX) || \ 884 ((MODE) == SAI_MODESLAVE_TX) || \ 885 ((MODE) == SAI_MODESLAVE_RX)) 886 887 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \ 888 ((PROTOCOL) == SAI_AC97_PROTOCOL) || \ 889 ((PROTOCOL) == SAI_SPDIF_PROTOCOL)) 890 891 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \ 892 ((DATASIZE) == SAI_DATASIZE_10) || \ 893 ((DATASIZE) == SAI_DATASIZE_16) || \ 894 ((DATASIZE) == SAI_DATASIZE_20) || \ 895 ((DATASIZE) == SAI_DATASIZE_24) || \ 896 ((DATASIZE) == SAI_DATASIZE_32)) 897 898 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \ 899 ((BIT) == SAI_FIRSTBIT_LSB)) 900 901 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \ 902 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE)) 903 904 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ 905 ((SYNCHRO) == SAI_SYNCHRONOUS) || \ 906 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \ 907 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2)) 908 909 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \ 910 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE)) 911 912 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \ 913 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE)) 914 915 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63U) 916 917 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ 918 ((VALUE) == SAI_LAST_SENT_VALUE)) 919 920 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ 921 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \ 922 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \ 923 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \ 924 ((MODE) == SAI_ALAW_2CPL_COMPANDING)) 925 926 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \ 927 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \ 928 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \ 929 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \ 930 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL)) 931 932 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ 933 ((STATE) == SAI_OUTPUT_RELEASED)) 934 935 #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ 936 ((MODE) == SAI_STEREOMODE)) 937 938 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL) 939 940 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1U <= (NUMBER)) && ((NUMBER) <= 16U)) 941 942 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \ 943 ((SIZE) == SAI_SLOTSIZE_16B) || \ 944 ((SIZE) == SAI_SLOTSIZE_32B)) 945 946 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24U) 947 948 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \ 949 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT)) 950 951 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \ 952 ((POLARITY) == SAI_FS_ACTIVE_HIGH)) 953 954 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \ 955 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION)) 956 957 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 958 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 63U) 959 #else 960 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 15U) 961 #endif 962 963 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8U <= (LENGTH)) && ((LENGTH) <= 256U)) 964 965 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1U <= (LENGTH)) && ((LENGTH) <= 128U)) 966 967 /** 968 * @} 969 */ 970 971 /* Private functions ---------------------------------------------------------*/ 972 /** @defgroup SAI_Private_Functions SAI Private Functions 973 * @{ 974 */ 975 976 /** 977 * @} 978 */ 979 980 /** 981 * @} 982 */ 983 984 /** 985 * @} 986 */ 987 988 #endif /* !STM32L412xx && !STM32L422xx */ 989 990 #ifdef __cplusplus 991 } 992 #endif 993 994 #endif /* STM32L4xx_HAL_SAI_H */ 995 996 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 997
