1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_i2c.h 4 * @author MCD Application Team 5 * @brief Header file of I2C HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef STM32L4xx_HAL_I2C_H 38 #define STM32L4xx_HAL_I2C_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 /* Includes ------------------------------------------------------------------*/ 45 #include "stm32l4xx_hal_def.h" 46 47 /** @addtogroup STM32L4xx_HAL_Driver 48 * @{ 49 */ 50 51 /** @addtogroup I2C 52 * @{ 53 */ 54 55 /* Exported types ------------------------------------------------------------*/ 56 /** @defgroup I2C_Exported_Types I2C Exported Types 57 * @{ 58 */ 59 60 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition 61 * @brief I2C Configuration Structure definition 62 * @{ 63 */ 64 typedef struct 65 { 66 uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. 67 This parameter calculated by referring to I2C initialization 68 section in Reference manual */ 69 70 uint32_t OwnAddress1; /*!< Specifies the first device own address. 71 This parameter can be a 7-bit or 10-bit address. */ 72 73 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. 74 This parameter can be a value of @ref I2C_ADDRESSING_MODE */ 75 76 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. 77 This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ 78 79 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected 80 This parameter can be a 7-bit address. */ 81 82 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected 83 This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ 84 85 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. 86 This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ 87 88 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. 89 This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ 90 91 } I2C_InitTypeDef; 92 93 /** 94 * @} 95 */ 96 97 /** @defgroup HAL_state_structure_definition HAL state structure definition 98 * @brief HAL State structure definition 99 * @note HAL I2C State value coding follow below described bitmap :\n 100 * b7-b6 Error information\n 101 * 00 : No Error\n 102 * 01 : Abort (Abort user request on going)\n 103 * 10 : Timeout\n 104 * 11 : Error\n 105 * b5 IP initilisation status\n 106 * 0 : Reset (IP not initialized)\n 107 * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n 108 * b4 (not used)\n 109 * x : Should be set to 0\n 110 * b3\n 111 * 0 : Ready or Busy (No Listen mode ongoing)\n 112 * 1 : Listen (IP in Address Listen Mode)\n 113 * b2 Intrinsic process state\n 114 * 0 : Ready\n 115 * 1 : Busy (IP busy with some configuration or internal operations)\n 116 * b1 Rx state\n 117 * 0 : Ready (no Rx operation ongoing)\n 118 * 1 : Busy (Rx operation ongoing)\n 119 * b0 Tx state\n 120 * 0 : Ready (no Tx operation ongoing)\n 121 * 1 : Busy (Tx operation ongoing) 122 * @{ 123 */ 124 typedef enum 125 { 126 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 127 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ 128 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ 129 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ 130 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 131 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ 132 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission 133 process is ongoing */ 134 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception 135 process is ongoing */ 136 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ 137 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ 138 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ 139 140 } HAL_I2C_StateTypeDef; 141 142 /** 143 * @} 144 */ 145 146 /** @defgroup HAL_mode_structure_definition HAL mode structure definition 147 * @brief HAL Mode structure definition 148 * @note HAL I2C Mode value coding follow below described bitmap :\n 149 * b7 (not used)\n 150 * x : Should be set to 0\n 151 * b6\n 152 * 0 : None\n 153 * 1 : Memory (HAL I2C communication is in Memory Mode)\n 154 * b5\n 155 * 0 : None\n 156 * 1 : Slave (HAL I2C communication is in Slave Mode)\n 157 * b4\n 158 * 0 : None\n 159 * 1 : Master (HAL I2C communication is in Master Mode)\n 160 * b3-b2-b1-b0 (not used)\n 161 * xxxx : Should be set to 0000 162 * @{ 163 */ 164 typedef enum 165 { 166 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ 167 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ 168 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ 169 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ 170 171 } HAL_I2C_ModeTypeDef; 172 173 /** 174 * @} 175 */ 176 177 /** @defgroup I2C_Error_Code_definition I2C Error Code definition 178 * @brief I2C Error Code definition 179 * @{ 180 */ 181 #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */ 182 #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */ 183 #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ 184 #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */ 185 #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */ 186 #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 187 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ 188 #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ 189 #define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */ 190 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 191 #define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ 192 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 193 #define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */ 194 /** 195 * @} 196 */ 197 198 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition 199 * @brief I2C handle Structure definition 200 * @{ 201 */ 202 typedef struct __I2C_HandleTypeDef 203 { 204 I2C_TypeDef *Instance; /*!< I2C registers base address */ 205 206 I2C_InitTypeDef Init; /*!< I2C communication parameters */ 207 208 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ 209 210 uint16_t XferSize; /*!< I2C transfer size */ 211 212 __IO uint16_t XferCount; /*!< I2C transfer counter */ 213 214 __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can 215 be a value of @ref I2C_XFEROPTIONS */ 216 217 __IO uint32_t PreviousState; /*!< I2C communication Previous state */ 218 219 HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */ 220 221 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ 222 223 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ 224 225 HAL_LockTypeDef Lock; /*!< I2C locking object */ 226 227 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ 228 229 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ 230 231 __IO uint32_t ErrorCode; /*!< I2C Error code */ 232 233 __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */ 234 235 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 236 void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */ 237 void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */ 238 void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */ 239 void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */ 240 void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */ 241 void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */ 242 void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */ 243 void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */ 244 void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */ 245 246 void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */ 247 248 void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */ 249 void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */ 250 251 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 252 } I2C_HandleTypeDef; 253 254 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 255 /** 256 * @brief HAL I2C Callback ID enumeration definition 257 */ 258 typedef enum 259 { 260 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */ 261 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */ 262 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */ 263 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */ 264 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */ 265 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */ 266 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */ 267 HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */ 268 HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */ 269 270 HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */ 271 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */ 272 273 } HAL_I2C_CallbackIDTypeDef; 274 275 /** 276 * @brief HAL I2C Callback pointer definition 277 */ 278 typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */ 279 typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */ 280 281 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 282 /** 283 * @} 284 */ 285 286 /** 287 * @} 288 */ 289 /* Exported constants --------------------------------------------------------*/ 290 291 /** @defgroup I2C_Exported_Constants I2C Exported Constants 292 * @{ 293 */ 294 295 /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options 296 * @{ 297 */ 298 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE) 299 #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 300 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 301 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 302 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 303 #define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE) 304 305 /* List of XferOptions in usage of : 306 * 1- Restart condition in all use cases (direction change or not) 307 */ 308 #define I2C_OTHER_FRAME (0x000000AAU) 309 #define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U) 310 /** 311 * @} 312 */ 313 314 /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode 315 * @{ 316 */ 317 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U) 318 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U) 319 /** 320 * @} 321 */ 322 323 /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode 324 * @{ 325 */ 326 #define I2C_DUALADDRESS_DISABLE (0x00000000U) 327 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN 328 /** 329 * @} 330 */ 331 332 /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks 333 * @{ 334 */ 335 #define I2C_OA2_NOMASK ((uint8_t)0x00U) 336 #define I2C_OA2_MASK01 ((uint8_t)0x01U) 337 #define I2C_OA2_MASK02 ((uint8_t)0x02U) 338 #define I2C_OA2_MASK03 ((uint8_t)0x03U) 339 #define I2C_OA2_MASK04 ((uint8_t)0x04U) 340 #define I2C_OA2_MASK05 ((uint8_t)0x05U) 341 #define I2C_OA2_MASK06 ((uint8_t)0x06U) 342 #define I2C_OA2_MASK07 ((uint8_t)0x07U) 343 /** 344 * @} 345 */ 346 347 /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode 348 * @{ 349 */ 350 #define I2C_GENERALCALL_DISABLE (0x00000000U) 351 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN 352 /** 353 * @} 354 */ 355 356 /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode 357 * @{ 358 */ 359 #define I2C_NOSTRETCH_DISABLE (0x00000000U) 360 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH 361 /** 362 * @} 363 */ 364 365 /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size 366 * @{ 367 */ 368 #define I2C_MEMADD_SIZE_8BIT (0x00000001U) 369 #define I2C_MEMADD_SIZE_16BIT (0x00000002U) 370 /** 371 * @} 372 */ 373 374 /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View 375 * @{ 376 */ 377 #define I2C_DIRECTION_TRANSMIT (0x00000000U) 378 #define I2C_DIRECTION_RECEIVE (0x00000001U) 379 /** 380 * @} 381 */ 382 383 /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode 384 * @{ 385 */ 386 #define I2C_RELOAD_MODE I2C_CR2_RELOAD 387 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND 388 #define I2C_SOFTEND_MODE (0x00000000U) 389 /** 390 * @} 391 */ 392 393 /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode 394 * @{ 395 */ 396 #define I2C_NO_STARTSTOP (0x00000000U) 397 #define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) 398 #define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) 399 #define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) 400 /** 401 * @} 402 */ 403 404 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition 405 * @brief I2C Interrupt definition 406 * Elements values convention: 0xXXXXXXXX 407 * - XXXXXXXX : Interrupt control mask 408 * @{ 409 */ 410 #define I2C_IT_ERRI I2C_CR1_ERRIE 411 #define I2C_IT_TCI I2C_CR1_TCIE 412 #define I2C_IT_STOPI I2C_CR1_STOPIE 413 #define I2C_IT_NACKI I2C_CR1_NACKIE 414 #define I2C_IT_ADDRI I2C_CR1_ADDRIE 415 #define I2C_IT_RXI I2C_CR1_RXIE 416 #define I2C_IT_TXI I2C_CR1_TXIE 417 /** 418 * @} 419 */ 420 421 /** @defgroup I2C_Flag_definition I2C Flag definition 422 * @{ 423 */ 424 #define I2C_FLAG_TXE I2C_ISR_TXE 425 #define I2C_FLAG_TXIS I2C_ISR_TXIS 426 #define I2C_FLAG_RXNE I2C_ISR_RXNE 427 #define I2C_FLAG_ADDR I2C_ISR_ADDR 428 #define I2C_FLAG_AF I2C_ISR_NACKF 429 #define I2C_FLAG_STOPF I2C_ISR_STOPF 430 #define I2C_FLAG_TC I2C_ISR_TC 431 #define I2C_FLAG_TCR I2C_ISR_TCR 432 #define I2C_FLAG_BERR I2C_ISR_BERR 433 #define I2C_FLAG_ARLO I2C_ISR_ARLO 434 #define I2C_FLAG_OVR I2C_ISR_OVR 435 #define I2C_FLAG_PECERR I2C_ISR_PECERR 436 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT 437 #define I2C_FLAG_ALERT I2C_ISR_ALERT 438 #define I2C_FLAG_BUSY I2C_ISR_BUSY 439 #define I2C_FLAG_DIR I2C_ISR_DIR 440 /** 441 * @} 442 */ 443 444 /** 445 * @} 446 */ 447 448 /* Exported macros -----------------------------------------------------------*/ 449 450 /** @defgroup I2C_Exported_Macros I2C Exported Macros 451 * @{ 452 */ 453 454 /** @brief Reset I2C handle state. 455 * @param __HANDLE__ specifies the I2C Handle. 456 * @retval None 457 */ 458 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 459 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ 460 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \ 461 (__HANDLE__)->MspInitCallback = NULL; \ 462 (__HANDLE__)->MspDeInitCallback = NULL; \ 463 } while(0) 464 #else 465 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) 466 #endif 467 468 /** @brief Enable the specified I2C interrupt. 469 * @param __HANDLE__ specifies the I2C Handle. 470 * @param __INTERRUPT__ specifies the interrupt source to enable. 471 * This parameter can be one of the following values: 472 * @arg @ref I2C_IT_ERRI Errors interrupt enable 473 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 474 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 475 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 476 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 477 * @arg @ref I2C_IT_RXI RX interrupt enable 478 * @arg @ref I2C_IT_TXI TX interrupt enable 479 * 480 * @retval None 481 */ 482 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) 483 484 /** @brief Disable the specified I2C interrupt. 485 * @param __HANDLE__ specifies the I2C Handle. 486 * @param __INTERRUPT__ specifies the interrupt source to disable. 487 * This parameter can be one of the following values: 488 * @arg @ref I2C_IT_ERRI Errors interrupt enable 489 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 490 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 491 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 492 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 493 * @arg @ref I2C_IT_RXI RX interrupt enable 494 * @arg @ref I2C_IT_TXI TX interrupt enable 495 * 496 * @retval None 497 */ 498 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) 499 500 /** @brief Check whether the specified I2C interrupt source is enabled or not. 501 * @param __HANDLE__ specifies the I2C Handle. 502 * @param __INTERRUPT__ specifies the I2C interrupt source to check. 503 * This parameter can be one of the following values: 504 * @arg @ref I2C_IT_ERRI Errors interrupt enable 505 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 506 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 507 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 508 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 509 * @arg @ref I2C_IT_RXI RX interrupt enable 510 * @arg @ref I2C_IT_TXI TX interrupt enable 511 * 512 * @retval The new state of __INTERRUPT__ (SET or RESET). 513 */ 514 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 515 516 /** @brief Check whether the specified I2C flag is set or not. 517 * @param __HANDLE__ specifies the I2C Handle. 518 * @param __FLAG__ specifies the flag to check. 519 * This parameter can be one of the following values: 520 * @arg @ref I2C_FLAG_TXE Transmit data register empty 521 * @arg @ref I2C_FLAG_TXIS Transmit interrupt status 522 * @arg @ref I2C_FLAG_RXNE Receive data register not empty 523 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 524 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 525 * @arg @ref I2C_FLAG_STOPF STOP detection flag 526 * @arg @ref I2C_FLAG_TC Transfer complete (master mode) 527 * @arg @ref I2C_FLAG_TCR Transfer complete reload 528 * @arg @ref I2C_FLAG_BERR Bus error 529 * @arg @ref I2C_FLAG_ARLO Arbitration lost 530 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 531 * @arg @ref I2C_FLAG_PECERR PEC error in reception 532 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 533 * @arg @ref I2C_FLAG_ALERT SMBus alert 534 * @arg @ref I2C_FLAG_BUSY Bus busy 535 * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode) 536 * 537 * @retval The new state of __FLAG__ (SET or RESET). 538 */ 539 #define I2C_FLAG_MASK (0x0001FFFFU) 540 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET) 541 542 /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit. 543 * @param __HANDLE__ specifies the I2C Handle. 544 * @param __FLAG__ specifies the flag to clear. 545 * This parameter can be any combination of the following values: 546 * @arg @ref I2C_FLAG_TXE Transmit data register empty 547 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 548 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 549 * @arg @ref I2C_FLAG_STOPF STOP detection flag 550 * @arg @ref I2C_FLAG_BERR Bus error 551 * @arg @ref I2C_FLAG_ARLO Arbitration lost 552 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 553 * @arg @ref I2C_FLAG_PECERR PEC error in reception 554 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 555 * @arg @ref I2C_FLAG_ALERT SMBus alert 556 * 557 * @retval None 558 */ 559 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \ 560 : ((__HANDLE__)->Instance->ICR = (__FLAG__))) 561 562 /** @brief Enable the specified I2C peripheral. 563 * @param __HANDLE__ specifies the I2C Handle. 564 * @retval None 565 */ 566 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 567 568 /** @brief Disable the specified I2C peripheral. 569 * @param __HANDLE__ specifies the I2C Handle. 570 * @retval None 571 */ 572 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 573 574 /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode. 575 * @param __HANDLE__ specifies the I2C Handle. 576 * @retval None 577 */ 578 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) 579 /** 580 * @} 581 */ 582 583 /* Include I2C HAL Extended module */ 584 #include "stm32l4xx_hal_i2c_ex.h" 585 586 /* Exported functions --------------------------------------------------------*/ 587 /** @addtogroup I2C_Exported_Functions 588 * @{ 589 */ 590 591 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions 592 * @{ 593 */ 594 /* Initialization and de-initialization functions******************************/ 595 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); 596 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); 597 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); 598 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); 599 600 /* Callbacks Register/UnRegister functions ***********************************/ 601 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 602 HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback); 603 HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID); 604 605 HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback); 606 HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c); 607 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 608 /** 609 * @} 610 */ 611 612 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions 613 * @{ 614 */ 615 /* IO operation functions ****************************************************/ 616 /******* Blocking mode: Polling */ 617 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); 618 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); 619 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); 620 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); 621 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 622 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 623 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); 624 625 /******* Non-Blocking mode: Interrupt */ 626 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 627 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 628 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 629 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 630 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 631 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 632 633 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 634 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 635 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 636 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 637 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); 638 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); 639 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); 640 641 /******* Non-Blocking mode: DMA */ 642 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 643 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 644 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 645 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 646 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 647 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 648 649 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 650 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 651 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 652 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 653 /** 654 * @} 655 */ 656 657 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 658 * @{ 659 */ 660 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 661 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); 662 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); 663 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); 664 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); 665 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); 666 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); 667 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 668 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); 669 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); 670 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); 671 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); 672 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); 673 /** 674 * @} 675 */ 676 677 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions 678 * @{ 679 */ 680 /* Peripheral State, Mode and Error functions *********************************/ 681 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); 682 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); 683 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); 684 685 /** 686 * @} 687 */ 688 689 /** 690 * @} 691 */ 692 693 /* Private constants ---------------------------------------------------------*/ 694 /** @defgroup I2C_Private_Constants I2C Private Constants 695 * @{ 696 */ 697 698 /** 699 * @} 700 */ 701 702 /* Private macros ------------------------------------------------------------*/ 703 /** @defgroup I2C_Private_Macro I2C Private Macros 704 * @{ 705 */ 706 707 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ 708 ((MODE) == I2C_ADDRESSINGMODE_10BIT)) 709 710 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ 711 ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) 712 713 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ 714 ((MASK) == I2C_OA2_MASK01) || \ 715 ((MASK) == I2C_OA2_MASK02) || \ 716 ((MASK) == I2C_OA2_MASK03) || \ 717 ((MASK) == I2C_OA2_MASK04) || \ 718 ((MASK) == I2C_OA2_MASK05) || \ 719 ((MASK) == I2C_OA2_MASK06) || \ 720 ((MASK) == I2C_OA2_MASK07)) 721 722 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ 723 ((CALL) == I2C_GENERALCALL_ENABLE)) 724 725 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ 726 ((STRETCH) == I2C_NOSTRETCH_ENABLE)) 727 728 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ 729 ((SIZE) == I2C_MEMADD_SIZE_16BIT)) 730 731 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ 732 ((MODE) == I2C_AUTOEND_MODE) || \ 733 ((MODE) == I2C_SOFTEND_MODE)) 734 735 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ 736 ((REQUEST) == I2C_GENERATE_START_READ) || \ 737 ((REQUEST) == I2C_GENERATE_START_WRITE) || \ 738 ((REQUEST) == I2C_NO_STARTSTOP)) 739 740 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ 741 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ 742 ((REQUEST) == I2C_NEXT_FRAME) || \ 743 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ 744 ((REQUEST) == I2C_LAST_FRAME) || \ 745 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \ 746 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) 747 748 #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \ 749 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME)) 750 751 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) 752 753 #define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)) 754 #define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)) 755 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) 756 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)) 757 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)) 758 759 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) 760 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) 761 762 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U))) 763 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) 764 765 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ 766 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) 767 768 #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) 769 #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) 770 /** 771 * @} 772 */ 773 774 /* Private Functions ---------------------------------------------------------*/ 775 /** @defgroup I2C_Private_Functions I2C Private Functions 776 * @{ 777 */ 778 /* Private functions are defined in stm32l4xx_hal_i2c.c file */ 779 /** 780 * @} 781 */ 782 783 /** 784 * @} 785 */ 786 787 /** 788 * @} 789 */ 790 791 #ifdef __cplusplus 792 } 793 #endif 794 795 796 #endif /* STM32L4xx_HAL_I2C_H */ 797 798 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 799
