1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_dfsdm.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Digital Filter for Sigma-Delta Modulators
7 * (DFSDM) peripherals:
8 * + Initialization and configuration of channels and filters
9 * + Regular channels configuration
10 * + Injected channels configuration
11 * + Regular/Injected Channels DMA Configuration
12 * + Interrupts and flags management
13 * + Analog watchdog feature
14 * + Short-circuit detector feature
15 * + Extremes detector feature
16 * + Clock absence detector feature
17 * + Break generation on analog watchdog or short-circuit event
18 *
19 @verbatim
20 ==============================================================================
21 ##### How to use this driver #####
22 ==============================================================================
23 [..]
24 *** Channel initialization ***
25 ==============================
26 [..]
27 (#) User has first to initialize channels (before filters initialization).
28 (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
29 (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
30 (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
31 (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
32 (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
33 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
34 (#) Configure the output clock, input, serial interface, analog watchdog,
35 offset and data right bit shift parameters for this channel using the
36 HAL_DFSDM_ChannelInit() function.
37
38 *** Channel clock absence detector ***
39 ======================================
40 [..]
41 (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
42 HAL_DFSDM_ChannelCkabStart_IT().
43 (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
44 absence.
45 (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
46 clock absence is detected.
47 (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
48 HAL_DFSDM_ChannelCkabStop_IT().
49 (#) Please note that the same mode (polling or interrupt) has to be used
50 for all channels because the channels are sharing the same interrupt.
51 (#) Please note also that in interrupt mode, if clock absence detector is
52 stopped for one channel, interrupt will be disabled for all channels.
53
54 *** Channel short circuit detector ***
55 ======================================
56 [..]
57 (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
58 or HAL_DFSDM_ChannelScdStart_IT().
59 (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
60 circuit.
61 (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
62 short circuit is detected.
63 (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
64 or HAL_DFSDM_ChannelScdStop_IT().
65 (#) Please note that the same mode (polling or interrupt) has to be used
66 for all channels because the channels are sharing the same interrupt.
67 (#) Please note also that in interrupt mode, if short circuit detector is
68 stopped for one channel, interrupt will be disabled for all channels.
69
70 *** Channel analog watchdog value ***
71 =====================================
72 [..]
73 (#) Get analog watchdog filter value of a channel using
74 HAL_DFSDM_ChannelGetAwdValue().
75
76 *** Channel offset value ***
77 =====================================
78 [..]
79 (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
80
81 *** Filter initialization ***
82 =============================
83 [..]
84 (#) After channel initialization, user has to init filters.
85 (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
86 (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
87 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
88 Please note that DFSDMz_FLT0 global interrupt could be already
89 enabled if interrupt is used for channel.
90 (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
91 with DFSDMz filter handle using __HAL_LINKDMA().
92 (#) Configure the regular conversion, injected conversion and filter
93 parameters for this filter using the HAL_DFSDM_FilterInit() function.
94
95 *** Filter regular channel conversion ***
96 =========================================
97 [..]
98 (#) Select regular channel and enable/disable continuous mode using
99 HAL_DFSDM_FilterConfigRegChannel().
100 (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
101 HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
102 HAL_DFSDM_FilterRegularMsbStart_DMA().
103 (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
104 the end of regular conversion.
105 (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
106 at the end of regular conversion.
107 (#) Get value of regular conversion and corresponding channel using
108 HAL_DFSDM_FilterGetRegularValue().
109 (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
110 HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
111 half transfer and at the transfer complete. Please note that
112 HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
113 circular mode.
114 (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
115 HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
116
117 *** Filter injected channels conversion ***
118 ===========================================
119 [..]
120 (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
121 (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
122 HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
123 HAL_DFSDM_FilterInjectedMsbStart_DMA().
124 (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
125 the end of injected conversion.
126 (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
127 at the end of injected conversion.
128 (#) Get value of injected conversion and corresponding channel using
129 HAL_DFSDM_FilterGetInjectedValue().
130 (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
131 HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
132 half transfer and at the transfer complete. Please note that
133 HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
134 circular mode.
135 (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
136 HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
137
138 *** Filter analog watchdog ***
139 ==============================
140 [..]
141 (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
142 (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
143 (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
144
145 *** Filter extreme detector ***
146 ===============================
147 [..]
148 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
149 (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
150 (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
151 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
152
153 *** Filter conversion time ***
154 ==============================
155 [..]
156 (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
157
158 *** Callback registration ***
159 =============================
160
161 The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS when set to 1
162 allows the user to configure dynamically the driver callbacks.
163 Use functions @ref HAL_DFSDM_Channel_RegisterCallback(),
164 @ref HAL_DFSDM_Filter_RegisterCallback() or
165 @ref HAL_DFSDM_Filter_RegisterAwdCallback() to register a user callback.
166
167 Function @ref HAL_DFSDM_Channel_RegisterCallback() allows to register
168 following callbacks:
169 (+) CkabCallback : DFSDM channel clock absence detection callback.
170 (+) ScdCallback : DFSDM channel short circuit detection callback.
171 (+) MspInitCallback : DFSDM channel MSP init callback.
172 (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
173 This function takes as parameters the HAL peripheral handle, the Callback ID
174 and a pointer to the user callback function.
175
176 Function @ref HAL_DFSDM_Filter_RegisterCallback() allows to register
177 following callbacks:
178 (+) RegConvCpltCallback : DFSDM filter regular conversion complete callback.
179 (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
180 (+) InjConvCpltCallback : DFSDM filter injected conversion complete callback.
181 (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
182 (+) ErrorCallback : DFSDM filter error callback.
183 (+) MspInitCallback : DFSDM filter MSP init callback.
184 (+) MspDeInitCallback : DFSDM filter MSP de-init callback.
185 This function takes as parameters the HAL peripheral handle, the Callback ID
186 and a pointer to the user callback function.
187
188 For specific DFSDM filter analog watchdog callback use dedicated register callback:
189 @ref HAL_DFSDM_Filter_RegisterAwdCallback().
190
191 Use functions @ref HAL_DFSDM_Channel_UnRegisterCallback() or
192 @ref HAL_DFSDM_Filter_UnRegisterCallback() to reset a callback to the default
193 weak function.
194
195 @ref HAL_DFSDM_Channel_UnRegisterCallback() takes as parameters the HAL peripheral handle,
196 and the Callback ID.
197 This function allows to reset following callbacks:
198 (+) CkabCallback : DFSDM channel clock absence detection callback.
199 (+) ScdCallback : DFSDM channel short circuit detection callback.
200 (+) MspInitCallback : DFSDM channel MSP init callback.
201 (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
202
203 @ref HAL_DFSDM_Filter_UnRegisterCallback() takes as parameters the HAL peripheral handle,
204 and the Callback ID.
205 This function allows to reset following callbacks:
206 (+) RegConvCpltCallback : DFSDM filter regular conversion complete callback.
207 (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
208 (+) InjConvCpltCallback : DFSDM filter injected conversion complete callback.
209 (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
210 (+) ErrorCallback : DFSDM filter error callback.
211 (+) MspInitCallback : DFSDM filter MSP init callback.
212 (+) MspDeInitCallback : DFSDM filter MSP de-init callback.
213
214 For specific DFSDM filter analog watchdog callback use dedicated unregister callback:
215 @ref HAL_DFSDM_Filter_UnRegisterAwdCallback().
216
217 By default, after the call of init function and if the state is RESET
218 all callbacks are reset to the corresponding legacy weak functions:
219 examples @ref HAL_DFSDM_ChannelScdCallback(), @ref HAL_DFSDM_FilterErrorCallback().
220 Exception done for MspInit and MspDeInit callbacks that are respectively
221 reset to the legacy weak functions in the init and de-init only when these
222 callbacks are null (not registered beforehand).
223 If not, MspInit or MspDeInit are not null, the init and de-init keep and use
224 the user MspInit/MspDeInit callbacks (registered beforehand)
225
226 Callbacks can be registered/unregistered in READY state only.
227 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
228 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
229 during the init/de-init.
230 In that case first register the MspInit/MspDeInit user callbacks using
231 @ref HAL_DFSDM_Channel_RegisterCallback() or
232 @ref HAL_DFSDM_Filter_RegisterCallback() before calling init or de-init function.
233
234 When The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS is set to 0 or
235 not defined, the callback registering feature is not available
236 and weak callbacks are used.
237
238 @endverbatim
239 ******************************************************************************
240 * @attention
241 *
242 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
243 *
244 * Redistribution and use in source and binary forms, with or without modification,
245 * are permitted provided that the following conditions are met:
246 * 1. Redistributions of source code must retain the above copyright notice,
247 * this list of conditions and the following disclaimer.
248 * 2. Redistributions in binary form must reproduce the above copyright notice,
249 * this list of conditions and the following disclaimer in the documentation
250 * and/or other materials provided with the distribution.
251 * 3. Neither the name of STMicroelectronics nor the names of its contributors
252 * may be used to endorse or promote products derived from this software
253 * without specific prior written permission.
254 *
255 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
256 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
257 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
258 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
259 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
260 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
261 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
262 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
263 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
264 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
265 *
266 ******************************************************************************
267 */
268
269 /* Includes ------------------------------------------------------------------*/
270 #include "stm32l4xx_hal.h"
271
272 /** @addtogroup STM32L4xx_HAL_Driver
273 * @{
274 */
275 #ifdef HAL_DFSDM_MODULE_ENABLED
276
277 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \
278 defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
279 defined(STM32L496xx) || defined(STM32L4A6xx) || \
280 defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
281
282 /** @defgroup DFSDM DFSDM
283 * @brief DFSDM HAL driver module
284 * @{
285 */
286
287 /* Private typedef -----------------------------------------------------------*/
288 /* Private define ------------------------------------------------------------*/
289 /** @defgroup DFSDM_Private_Define DFSDM Private Define
290 * @{
291 */
292 #define DFSDM_FLTCR1_MSB_RCH_OFFSET 8
293 #define DFSDM_MSB_MASK 0xFFFF0000U
294 #define DFSDM_LSB_MASK 0x0000FFFFU
295 #define DFSDM_CKAB_TIMEOUT 5000U
296 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx)
297 #define DFSDM1_CHANNEL_NUMBER 4U
298 #else /* STM32L451xx || STM32L452xx || STM32L462xx */
299 #define DFSDM1_CHANNEL_NUMBER 8U
300 #endif /* STM32L451xx || STM32L452xx || STM32L462xx */
301 /**
302 * @}
303 */
304
305 /* Private macro -------------------------------------------------------------*/
306 /* Private variables ---------------------------------------------------------*/
307 /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
308 * @{
309 */
310 static __IO uint32_t v_dfsdm1ChannelCounter = 0;
311 static DFSDM_Channel_HandleTypeDef *a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
312 /**
313 * @}
314 */
315
316 /* Private function prototypes -----------------------------------------------*/
317 /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
318 * @{
319 */
320 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
321 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance);
322 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
323 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
324 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
325 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
326 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
327 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
328 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
329 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
330 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
331 /**
332 * @}
333 */
334
335 /* Exported functions --------------------------------------------------------*/
336 /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
337 * @{
338 */
339
340 /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
341 * @brief Channel initialization and de-initialization functions
342 *
343 @verbatim
344 ==============================================================================
345 ##### Channel initialization and de-initialization functions #####
346 ==============================================================================
347 [..] This section provides functions allowing to:
348 (+) Initialize the DFSDM channel.
349 (+) De-initialize the DFSDM channel.
350 @endverbatim
351 * @{
352 */
353
354 /**
355 * @brief Initialize the DFSDM channel according to the specified parameters
356 * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
357 * @param hdfsdm_channel DFSDM channel handle.
358 * @retval HAL status.
359 */
HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)360 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
361 {
362 /* Check DFSDM Channel handle */
363 if (hdfsdm_channel == NULL)
364 {
365 return HAL_ERROR;
366 }
367
368 /* Check parameters */
369 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
370 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
371 assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
372 assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
373 assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
374 assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
375 assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
376 assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
377 assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
378 assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
379 assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
380
381 /* Check that channel has not been already initialized */
382 if (a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
383 {
384 return HAL_ERROR;
385 }
386
387 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
388 /* Reset callback pointers to the weak predefined callbacks */
389 hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
390 hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback;
391
392 /* Call MSP init function */
393 if (hdfsdm_channel->MspInitCallback == NULL)
394 {
395 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
396 }
397 hdfsdm_channel->MspInitCallback(hdfsdm_channel);
398 #else
399 /* Call MSP init function */
400 HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
401 #endif
402
403 /* Update the channel counter */
404 v_dfsdm1ChannelCounter++;
405
406 /* Configure output serial clock and enable global DFSDM interface only for first channel */
407 if (v_dfsdm1ChannelCounter == 1U)
408 {
409 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
410 /* Set the output serial clock source */
411 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
412 DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
413
414 /* Reset clock divider */
415 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
416 if (hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
417 {
418 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
419 /* Set the output clock divider */
420 DFSDM1_Channel0->CHCFGR1 |= (uint32_t)((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
421 DFSDM_CHCFGR1_CKOUTDIV_Pos);
422 }
423
424 /* enable the DFSDM global interface */
425 DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
426 }
427
428 /* Set channel input parameters */
429 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
430 DFSDM_CHCFGR1_CHINSEL);
431 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
432 hdfsdm_channel->Init.Input.DataPacking |
433 hdfsdm_channel->Init.Input.Pins);
434
435 /* Set serial interface parameters */
436 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
437 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
438 hdfsdm_channel->Init.SerialInterface.SpiClock);
439
440 /* Set analog watchdog parameters */
441 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
442 hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
443 ((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos));
444
445 /* Set channel offset and right bit shift */
446 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
447 hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |
448 (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
449
450 /* Enable DFSDM channel */
451 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
452
453 /* Set DFSDM Channel to ready state */
454 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
455
456 /* Store channel handle in DFSDM channel handle table */
457 a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
458
459 return HAL_OK;
460 }
461
462 /**
463 * @brief De-initialize the DFSDM channel.
464 * @param hdfsdm_channel DFSDM channel handle.
465 * @retval HAL status.
466 */
HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)467 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
468 {
469 /* Check DFSDM Channel handle */
470 if (hdfsdm_channel == NULL)
471 {
472 return HAL_ERROR;
473 }
474
475 /* Check parameters */
476 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
477
478 /* Check that channel has not been already deinitialized */
479 if (a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
480 {
481 return HAL_ERROR;
482 }
483
484 /* Disable the DFSDM channel */
485 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
486
487 /* Update the channel counter */
488 v_dfsdm1ChannelCounter--;
489
490 /* Disable global DFSDM at deinit of last channel */
491 if (v_dfsdm1ChannelCounter == 0U)
492 {
493 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
494 }
495
496 /* Call MSP deinit function */
497 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
498 if (hdfsdm_channel->MspDeInitCallback == NULL)
499 {
500 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
501 }
502 hdfsdm_channel->MspDeInitCallback(hdfsdm_channel);
503 #else
504 HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
505 #endif
506
507 /* Set DFSDM Channel in reset state */
508 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
509
510 /* Reset channel handle in DFSDM channel handle table */
511 a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
512
513 return HAL_OK;
514 }
515
516 /**
517 * @brief Initialize the DFSDM channel MSP.
518 * @param hdfsdm_channel DFSDM channel handle.
519 * @retval None
520 */
HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)521 __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
522 {
523 /* Prevent unused argument(s) compilation warning */
524 UNUSED(hdfsdm_channel);
525
526 /* NOTE : This function should not be modified, when the function is needed,
527 the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
528 */
529 }
530
531 /**
532 * @brief De-initialize the DFSDM channel MSP.
533 * @param hdfsdm_channel DFSDM channel handle.
534 * @retval None
535 */
HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)536 __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
537 {
538 /* Prevent unused argument(s) compilation warning */
539 UNUSED(hdfsdm_channel);
540
541 /* NOTE : This function should not be modified, when the function is needed,
542 the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
543 */
544 }
545
546 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
547 /**
548 * @brief Register a user DFSDM channel callback
549 * to be used instead of the weak predefined callback.
550 * @param hdfsdm_channel DFSDM channel handle.
551 * @param CallbackID ID of the callback to be registered.
552 * This parameter can be one of the following values:
553 * @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
554 * @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
555 * @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
556 * @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
557 * @param pCallback pointer to the callback function.
558 * @retval HAL status.
559 */
HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,pDFSDM_Channel_CallbackTypeDef pCallback)560 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
561 HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,
562 pDFSDM_Channel_CallbackTypeDef pCallback)
563 {
564 HAL_StatusTypeDef status = HAL_OK;
565
566 if (pCallback == NULL)
567 {
568 /* update return status */
569 status = HAL_ERROR;
570 }
571 else
572 {
573 if (HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
574 {
575 switch (CallbackID)
576 {
577 case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
578 hdfsdm_channel->CkabCallback = pCallback;
579 break;
580 case HAL_DFSDM_CHANNEL_SCD_CB_ID :
581 hdfsdm_channel->ScdCallback = pCallback;
582 break;
583 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
584 hdfsdm_channel->MspInitCallback = pCallback;
585 break;
586 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
587 hdfsdm_channel->MspDeInitCallback = pCallback;
588 break;
589 default :
590 /* update return status */
591 status = HAL_ERROR;
592 break;
593 }
594 }
595 else if (HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
596 {
597 switch (CallbackID)
598 {
599 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
600 hdfsdm_channel->MspInitCallback = pCallback;
601 break;
602 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
603 hdfsdm_channel->MspDeInitCallback = pCallback;
604 break;
605 default :
606 /* update return status */
607 status = HAL_ERROR;
608 break;
609 }
610 }
611 else
612 {
613 /* update return status */
614 status = HAL_ERROR;
615 }
616 }
617 return status;
618 }
619
620 /**
621 * @brief Unregister a user DFSDM channel callback.
622 * DFSDM channel callback is redirected to the weak predefined callback.
623 * @param hdfsdm_channel DFSDM channel handle.
624 * @param CallbackID ID of the callback to be unregistered.
625 * This parameter can be one of the following values:
626 * @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
627 * @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
628 * @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
629 * @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
630 * @retval HAL status.
631 */
HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)632 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
633 HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)
634 {
635 HAL_StatusTypeDef status = HAL_OK;
636
637 if (HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
638 {
639 switch (CallbackID)
640 {
641 case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
642 hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
643 break;
644 case HAL_DFSDM_CHANNEL_SCD_CB_ID :
645 hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback;
646 break;
647 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
648 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
649 break;
650 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
651 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
652 break;
653 default :
654 /* update return status */
655 status = HAL_ERROR;
656 break;
657 }
658 }
659 else if (HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
660 {
661 switch (CallbackID)
662 {
663 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
664 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
665 break;
666 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
667 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
668 break;
669 default :
670 /* update return status */
671 status = HAL_ERROR;
672 break;
673 }
674 }
675 else
676 {
677 /* update return status */
678 status = HAL_ERROR;
679 }
680 return status;
681 }
682 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
683
684 /**
685 * @}
686 */
687
688 /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
689 * @brief Channel operation functions
690 *
691 @verbatim
692 ==============================================================================
693 ##### Channel operation functions #####
694 ==============================================================================
695 [..] This section provides functions allowing to:
696 (+) Manage clock absence detector feature.
697 (+) Manage short circuit detector feature.
698 (+) Get analog watchdog value.
699 (+) Modify offset value.
700 @endverbatim
701 * @{
702 */
703
704 /**
705 * @brief This function allows to start clock absence detection in polling mode.
706 * @note Same mode has to be used for all channels.
707 * @note If clock is not available on this channel during 5 seconds,
708 * clock absence detection will not be activated and function
709 * will return HAL_TIMEOUT error.
710 * @param hdfsdm_channel DFSDM channel handle.
711 * @retval HAL status
712 */
HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)713 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
714 {
715 HAL_StatusTypeDef status = HAL_OK;
716 uint32_t channel;
717 uint32_t tickstart;
718
719 /* Check parameters */
720 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
721
722 /* Check DFSDM channel state */
723 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
724 {
725 /* Return error status */
726 status = HAL_ERROR;
727 }
728 else
729 {
730 /* Get channel number from channel instance */
731 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
732
733 /* Get timeout */
734 tickstart = HAL_GetTick();
735
736 /* Clear clock absence flag */
737 while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
738 {
739 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
740
741 /* Check the Timeout */
742 if ((HAL_GetTick() - tickstart) > DFSDM_CKAB_TIMEOUT)
743 {
744 /* Set timeout status */
745 status = HAL_TIMEOUT;
746 break;
747 }
748 }
749
750 if (status == HAL_OK)
751 {
752 /* Start clock absence detection */
753 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
754 }
755 }
756 /* Return function status */
757 return status;
758 }
759
760 /**
761 * @brief This function allows to poll for the clock absence detection.
762 * @param hdfsdm_channel DFSDM channel handle.
763 * @param Timeout Timeout value in milliseconds.
764 * @retval HAL status
765 */
HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Timeout)766 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
767 uint32_t Timeout)
768 {
769 uint32_t tickstart;
770 uint32_t channel;
771
772 /* Check parameters */
773 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
774
775 /* Check DFSDM channel state */
776 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
777 {
778 /* Return error status */
779 return HAL_ERROR;
780 }
781 else
782 {
783 /* Get channel number from channel instance */
784 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
785
786 /* Get timeout */
787 tickstart = HAL_GetTick();
788
789 /* Wait clock absence detection */
790 while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) == 0U)
791 {
792 /* Check the Timeout */
793 if (Timeout != HAL_MAX_DELAY)
794 {
795 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
796 {
797 /* Return timeout status */
798 return HAL_TIMEOUT;
799 }
800 }
801 }
802
803 /* Clear clock absence detection flag */
804 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
805
806 /* Return function status */
807 return HAL_OK;
808 }
809 }
810
811 /**
812 * @brief This function allows to stop clock absence detection in polling mode.
813 * @param hdfsdm_channel DFSDM channel handle.
814 * @retval HAL status
815 */
HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)816 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
817 {
818 HAL_StatusTypeDef status = HAL_OK;
819 uint32_t channel;
820
821 /* Check parameters */
822 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
823
824 /* Check DFSDM channel state */
825 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
826 {
827 /* Return error status */
828 status = HAL_ERROR;
829 }
830 else
831 {
832 /* Stop clock absence detection */
833 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
834
835 /* Clear clock absence flag */
836 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
837 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
838 }
839 /* Return function status */
840 return status;
841 }
842
843 /**
844 * @brief This function allows to start clock absence detection in interrupt mode.
845 * @note Same mode has to be used for all channels.
846 * @note If clock is not available on this channel during 5 seconds,
847 * clock absence detection will not be activated and function
848 * will return HAL_TIMEOUT error.
849 * @param hdfsdm_channel DFSDM channel handle.
850 * @retval HAL status
851 */
HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)852 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
853 {
854 HAL_StatusTypeDef status = HAL_OK;
855 uint32_t channel;
856 uint32_t tickstart;
857
858 /* Check parameters */
859 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
860
861 /* Check DFSDM channel state */
862 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
863 {
864 /* Return error status */
865 status = HAL_ERROR;
866 }
867 else
868 {
869 /* Get channel number from channel instance */
870 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
871
872 /* Get timeout */
873 tickstart = HAL_GetTick();
874
875 /* Clear clock absence flag */
876 while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
877 {
878 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
879
880 /* Check the Timeout */
881 if ((HAL_GetTick() - tickstart) > DFSDM_CKAB_TIMEOUT)
882 {
883 /* Set timeout status */
884 status = HAL_TIMEOUT;
885 break;
886 }
887 }
888
889 if (status == HAL_OK)
890 {
891 /* Activate clock absence detection interrupt */
892 DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
893
894 /* Start clock absence detection */
895 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
896 }
897 }
898 /* Return function status */
899 return status;
900 }
901
902 /**
903 * @brief Clock absence detection callback.
904 * @param hdfsdm_channel DFSDM channel handle.
905 * @retval None
906 */
HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)907 __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
908 {
909 /* Prevent unused argument(s) compilation warning */
910 UNUSED(hdfsdm_channel);
911
912 /* NOTE : This function should not be modified, when the callback is needed,
913 the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
914 */
915 }
916
917 /**
918 * @brief This function allows to stop clock absence detection in interrupt mode.
919 * @note Interrupt will be disabled for all channels
920 * @param hdfsdm_channel DFSDM channel handle.
921 * @retval HAL status
922 */
HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)923 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
924 {
925 HAL_StatusTypeDef status = HAL_OK;
926 uint32_t channel;
927
928 /* Check parameters */
929 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
930
931 /* Check DFSDM channel state */
932 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
933 {
934 /* Return error status */
935 status = HAL_ERROR;
936 }
937 else
938 {
939 /* Stop clock absence detection */
940 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
941
942 /* Clear clock absence flag */
943 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
944 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
945
946 /* Disable clock absence detection interrupt */
947 DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
948 }
949 /* Return function status */
950 return status;
951 }
952
953 /**
954 * @brief This function allows to start short circuit detection in polling mode.
955 * @note Same mode has to be used for all channels
956 * @param hdfsdm_channel DFSDM channel handle.
957 * @param Threshold Short circuit detector threshold.
958 * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
959 * @param BreakSignal Break signals assigned to short circuit event.
960 * This parameter can be a values combination of @ref DFSDM_BreakSignals.
961 * @retval HAL status
962 */
HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Threshold,uint32_t BreakSignal)963 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
964 uint32_t Threshold,
965 uint32_t BreakSignal)
966 {
967 HAL_StatusTypeDef status = HAL_OK;
968
969 /* Check parameters */
970 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
971 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
972 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
973
974 /* Check DFSDM channel state */
975 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
976 {
977 /* Return error status */
978 status = HAL_ERROR;
979 }
980 else
981 {
982 /* Configure threshold and break signals */
983 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
984 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
985 Threshold);
986
987 /* Start short circuit detection */
988 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
989 }
990 /* Return function status */
991 return status;
992 }
993
994 /**
995 * @brief This function allows to poll for the short circuit detection.
996 * @param hdfsdm_channel DFSDM channel handle.
997 * @param Timeout Timeout value in milliseconds.
998 * @retval HAL status
999 */
HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Timeout)1000 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1001 uint32_t Timeout)
1002 {
1003 uint32_t tickstart;
1004 uint32_t channel;
1005
1006 /* Check parameters */
1007 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1008
1009 /* Check DFSDM channel state */
1010 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1011 {
1012 /* Return error status */
1013 return HAL_ERROR;
1014 }
1015 else
1016 {
1017 /* Get channel number from channel instance */
1018 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1019
1020 /* Get timeout */
1021 tickstart = HAL_GetTick();
1022
1023 /* Wait short circuit detection */
1024 while (((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0U)
1025 {
1026 /* Check the Timeout */
1027 if (Timeout != HAL_MAX_DELAY)
1028 {
1029 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1030 {
1031 /* Return timeout status */
1032 return HAL_TIMEOUT;
1033 }
1034 }
1035 }
1036
1037 /* Clear short circuit detection flag */
1038 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1039
1040 /* Return function status */
1041 return HAL_OK;
1042 }
1043 }
1044
1045 /**
1046 * @brief This function allows to stop short circuit detection in polling mode.
1047 * @param hdfsdm_channel DFSDM channel handle.
1048 * @retval HAL status
1049 */
HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1050 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1051 {
1052 HAL_StatusTypeDef status = HAL_OK;
1053 uint32_t channel;
1054
1055 /* Check parameters */
1056 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1057
1058 /* Check DFSDM channel state */
1059 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1060 {
1061 /* Return error status */
1062 status = HAL_ERROR;
1063 }
1064 else
1065 {
1066 /* Stop short circuit detection */
1067 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
1068
1069 /* Clear short circuit detection flag */
1070 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1071 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1072 }
1073 /* Return function status */
1074 return status;
1075 }
1076
1077 /**
1078 * @brief This function allows to start short circuit detection in interrupt mode.
1079 * @note Same mode has to be used for all channels
1080 * @param hdfsdm_channel DFSDM channel handle.
1081 * @param Threshold Short circuit detector threshold.
1082 * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
1083 * @param BreakSignal Break signals assigned to short circuit event.
1084 * This parameter can be a values combination of @ref DFSDM_BreakSignals.
1085 * @retval HAL status
1086 */
HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Threshold,uint32_t BreakSignal)1087 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1088 uint32_t Threshold,
1089 uint32_t BreakSignal)
1090 {
1091 HAL_StatusTypeDef status = HAL_OK;
1092
1093 /* Check parameters */
1094 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1095 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
1096 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
1097
1098 /* Check DFSDM channel state */
1099 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1100 {
1101 /* Return error status */
1102 status = HAL_ERROR;
1103 }
1104 else
1105 {
1106 /* Activate short circuit detection interrupt */
1107 DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
1108
1109 /* Configure threshold and break signals */
1110 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
1111 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
1112 Threshold);
1113
1114 /* Start short circuit detection */
1115 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
1116 }
1117 /* Return function status */
1118 return status;
1119 }
1120
1121 /**
1122 * @brief Short circuit detection callback.
1123 * @param hdfsdm_channel DFSDM channel handle.
1124 * @retval None
1125 */
HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1126 __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1127 {
1128 /* Prevent unused argument(s) compilation warning */
1129 UNUSED(hdfsdm_channel);
1130
1131 /* NOTE : This function should not be modified, when the callback is needed,
1132 the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
1133 */
1134 }
1135
1136 /**
1137 * @brief This function allows to stop short circuit detection in interrupt mode.
1138 * @note Interrupt will be disabled for all channels
1139 * @param hdfsdm_channel DFSDM channel handle.
1140 * @retval HAL status
1141 */
HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1142 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1143 {
1144 HAL_StatusTypeDef status = HAL_OK;
1145 uint32_t channel;
1146
1147 /* Check parameters */
1148 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1149
1150 /* Check DFSDM channel state */
1151 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1152 {
1153 /* Return error status */
1154 status = HAL_ERROR;
1155 }
1156 else
1157 {
1158 /* Stop short circuit detection */
1159 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
1160
1161 /* Clear short circuit detection flag */
1162 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1163 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1164
1165 /* Disable short circuit detection interrupt */
1166 DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
1167 }
1168 /* Return function status */
1169 return status;
1170 }
1171
1172 /**
1173 * @brief This function allows to get channel analog watchdog value.
1174 * @param hdfsdm_channel DFSDM channel handle.
1175 * @retval Channel analog watchdog value.
1176 */
HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1177 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1178 {
1179 return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
1180 }
1181
1182 /**
1183 * @brief This function allows to modify channel offset value.
1184 * @param hdfsdm_channel DFSDM channel handle.
1185 * @param Offset DFSDM channel offset.
1186 * This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
1187 * @retval HAL status.
1188 */
HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,int32_t Offset)1189 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1190 int32_t Offset)
1191 {
1192 HAL_StatusTypeDef status = HAL_OK;
1193
1194 /* Check parameters */
1195 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1196 assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
1197
1198 /* Check DFSDM channel state */
1199 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1200 {
1201 /* Return error status */
1202 status = HAL_ERROR;
1203 }
1204 else
1205 {
1206 /* Modify channel offset */
1207 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
1208 hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos);
1209 }
1210 /* Return function status */
1211 return status;
1212 }
1213
1214 /**
1215 * @}
1216 */
1217
1218 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
1219 * @brief Channel state function
1220 *
1221 @verbatim
1222 ==============================================================================
1223 ##### Channel state function #####
1224 ==============================================================================
1225 [..] This section provides function allowing to:
1226 (+) Get channel handle state.
1227 @endverbatim
1228 * @{
1229 */
1230
1231 /**
1232 * @brief This function allows to get the current DFSDM channel handle state.
1233 * @param hdfsdm_channel DFSDM channel handle.
1234 * @retval DFSDM channel state.
1235 */
HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1236 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1237 {
1238 /* Return DFSDM channel handle state */
1239 return hdfsdm_channel->State;
1240 }
1241
1242 /**
1243 * @}
1244 */
1245
1246 /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
1247 * @brief Filter initialization and de-initialization functions
1248 *
1249 @verbatim
1250 ==============================================================================
1251 ##### Filter initialization and de-initialization functions #####
1252 ==============================================================================
1253 [..] This section provides functions allowing to:
1254 (+) Initialize the DFSDM filter.
1255 (+) De-initialize the DFSDM filter.
1256 @endverbatim
1257 * @{
1258 */
1259
1260 /**
1261 * @brief Initialize the DFSDM filter according to the specified parameters
1262 * in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
1263 * @param hdfsdm_filter DFSDM filter handle.
1264 * @retval HAL status.
1265 */
HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1266 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1267 {
1268 /* Check DFSDM Channel handle */
1269 if (hdfsdm_filter == NULL)
1270 {
1271 return HAL_ERROR;
1272 }
1273
1274 /* Check parameters */
1275 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1276 assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
1277 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
1278 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
1279 assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
1280 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
1281 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
1282 assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
1283 assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
1284 assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
1285
1286 /* Check parameters compatibility */
1287 if ((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
1288 ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
1289 (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
1290 {
1291 return HAL_ERROR;
1292 }
1293
1294 /* Initialize DFSDM filter variables with default values */
1295 hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
1296 hdfsdm_filter->InjectedChannelsNbr = 1;
1297 hdfsdm_filter->InjConvRemaining = 1;
1298 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
1299
1300 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1301 /* Reset callback pointers to the weak predefined callbacks */
1302 hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback;
1303 hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback;
1304 hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
1305 hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback;
1306 hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
1307 hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback;
1308
1309 /* Call MSP init function */
1310 if (hdfsdm_filter->MspInitCallback == NULL)
1311 {
1312 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1313 }
1314 hdfsdm_filter->MspInitCallback(hdfsdm_filter);
1315 #else
1316 /* Call MSP init function */
1317 HAL_DFSDM_FilterMspInit(hdfsdm_filter);
1318 #endif
1319
1320 /* Set regular parameters */
1321 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
1322 if (hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
1323 {
1324 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
1325 }
1326 else
1327 {
1328 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
1329 }
1330
1331 if (hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
1332 {
1333 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
1334 }
1335 else
1336 {
1337 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
1338 }
1339
1340 /* Set injected parameters */
1341 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
1342 if (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
1343 {
1344 assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
1345 assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
1346 hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
1347 }
1348
1349 if (hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
1350 {
1351 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
1352 }
1353 else
1354 {
1355 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
1356 }
1357
1358 if (hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
1359 {
1360 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
1361 }
1362 else
1363 {
1364 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
1365 }
1366
1367 /* Set filter parameters */
1368 hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
1369 hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
1370 ((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_Pos) |
1371 (hdfsdm_filter->Init.FilterParam.IntOversampling - 1U));
1372
1373 /* Store regular and injected triggers and injected scan mode*/
1374 hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
1375 hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
1376 hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
1377 hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
1378
1379 /* Enable DFSDM filter */
1380 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
1381
1382 /* Set DFSDM filter to ready state */
1383 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
1384
1385 return HAL_OK;
1386 }
1387
1388 /**
1389 * @brief De-initializes the DFSDM filter.
1390 * @param hdfsdm_filter DFSDM filter handle.
1391 * @retval HAL status.
1392 */
HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1393 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1394 {
1395 /* Check DFSDM filter handle */
1396 if (hdfsdm_filter == NULL)
1397 {
1398 return HAL_ERROR;
1399 }
1400
1401 /* Check parameters */
1402 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1403
1404 /* Disable the DFSDM filter */
1405 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
1406
1407 /* Call MSP deinit function */
1408 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1409 if (hdfsdm_filter->MspDeInitCallback == NULL)
1410 {
1411 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1412 }
1413 hdfsdm_filter->MspDeInitCallback(hdfsdm_filter);
1414 #else
1415 HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
1416 #endif
1417
1418 /* Set DFSDM filter in reset state */
1419 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
1420
1421 return HAL_OK;
1422 }
1423
1424 /**
1425 * @brief Initializes the DFSDM filter MSP.
1426 * @param hdfsdm_filter DFSDM filter handle.
1427 * @retval None
1428 */
HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1429 __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1430 {
1431 /* Prevent unused argument(s) compilation warning */
1432 UNUSED(hdfsdm_filter);
1433
1434 /* NOTE : This function should not be modified, when the function is needed,
1435 the HAL_DFSDM_FilterMspInit could be implemented in the user file.
1436 */
1437 }
1438
1439 /**
1440 * @brief De-initializes the DFSDM filter MSP.
1441 * @param hdfsdm_filter DFSDM filter handle.
1442 * @retval None
1443 */
HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1444 __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1445 {
1446 /* Prevent unused argument(s) compilation warning */
1447 UNUSED(hdfsdm_filter);
1448
1449 /* NOTE : This function should not be modified, when the function is needed,
1450 the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
1451 */
1452 }
1453
1454 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1455 /**
1456 * @brief Register a user DFSDM filter callback
1457 * to be used instead of the weak predefined callback.
1458 * @param hdfsdm_filter DFSDM filter handle.
1459 * @param CallbackID ID of the callback to be registered.
1460 * This parameter can be one of the following values:
1461 * @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
1462 * @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
1463 * @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
1464 * @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
1465 * @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
1466 * @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
1467 * @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
1468 * @param pCallback pointer to the callback function.
1469 * @retval HAL status.
1470 */
HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,pDFSDM_Filter_CallbackTypeDef pCallback)1471 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1472 HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,
1473 pDFSDM_Filter_CallbackTypeDef pCallback)
1474 {
1475 HAL_StatusTypeDef status = HAL_OK;
1476
1477 if (pCallback == NULL)
1478 {
1479 /* update the error code */
1480 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1481 /* update return status */
1482 status = HAL_ERROR;
1483 }
1484 else
1485 {
1486 if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1487 {
1488 switch (CallbackID)
1489 {
1490 case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
1491 hdfsdm_filter->RegConvCpltCallback = pCallback;
1492 break;
1493 case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
1494 hdfsdm_filter->RegConvHalfCpltCallback = pCallback;
1495 break;
1496 case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
1497 hdfsdm_filter->InjConvCpltCallback = pCallback;
1498 break;
1499 case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
1500 hdfsdm_filter->InjConvHalfCpltCallback = pCallback;
1501 break;
1502 case HAL_DFSDM_FILTER_ERROR_CB_ID :
1503 hdfsdm_filter->ErrorCallback = pCallback;
1504 break;
1505 case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1506 hdfsdm_filter->MspInitCallback = pCallback;
1507 break;
1508 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1509 hdfsdm_filter->MspDeInitCallback = pCallback;
1510 break;
1511 default :
1512 /* update the error code */
1513 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1514 /* update return status */
1515 status = HAL_ERROR;
1516 break;
1517 }
1518 }
1519 else if (HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
1520 {
1521 switch (CallbackID)
1522 {
1523 case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1524 hdfsdm_filter->MspInitCallback = pCallback;
1525 break;
1526 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1527 hdfsdm_filter->MspDeInitCallback = pCallback;
1528 break;
1529 default :
1530 /* update the error code */
1531 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1532 /* update return status */
1533 status = HAL_ERROR;
1534 break;
1535 }
1536 }
1537 else
1538 {
1539 /* update the error code */
1540 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1541 /* update return status */
1542 status = HAL_ERROR;
1543 }
1544 }
1545 return status;
1546 }
1547
1548 /**
1549 * @brief Unregister a user DFSDM filter callback.
1550 * DFSDM filter callback is redirected to the weak predefined callback.
1551 * @param hdfsdm_filter DFSDM filter handle.
1552 * @param CallbackID ID of the callback to be unregistered.
1553 * This parameter can be one of the following values:
1554 * @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
1555 * @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
1556 * @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
1557 * @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
1558 * @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
1559 * @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
1560 * @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
1561 * @retval HAL status.
1562 */
HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)1563 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1564 HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)
1565 {
1566 HAL_StatusTypeDef status = HAL_OK;
1567
1568 if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1569 {
1570 switch (CallbackID)
1571 {
1572 case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
1573 hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback;
1574 break;
1575 case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
1576 hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
1577 break;
1578 case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
1579 hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback;
1580 break;
1581 case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
1582 hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
1583 break;
1584 case HAL_DFSDM_FILTER_ERROR_CB_ID :
1585 hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback;
1586 break;
1587 case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1588 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1589 break;
1590 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1591 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1592 break;
1593 default :
1594 /* update the error code */
1595 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1596 /* update return status */
1597 status = HAL_ERROR;
1598 break;
1599 }
1600 }
1601 else if (HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
1602 {
1603 switch (CallbackID)
1604 {
1605 case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1606 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1607 break;
1608 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1609 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1610 break;
1611 default :
1612 /* update the error code */
1613 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1614 /* update return status */
1615 status = HAL_ERROR;
1616 break;
1617 }
1618 }
1619 else
1620 {
1621 /* update the error code */
1622 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1623 /* update return status */
1624 status = HAL_ERROR;
1625 }
1626 return status;
1627 }
1628
1629 /**
1630 * @brief Register a user DFSDM filter analog watchdog callback
1631 * to be used instead of the weak predefined callback.
1632 * @param hdfsdm_filter DFSDM filter handle.
1633 * @param pCallback pointer to the DFSDM filter analog watchdog callback function.
1634 * @retval HAL status.
1635 */
HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,pDFSDM_Filter_AwdCallbackTypeDef pCallback)1636 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1637 pDFSDM_Filter_AwdCallbackTypeDef pCallback)
1638 {
1639 HAL_StatusTypeDef status = HAL_OK;
1640
1641 if (pCallback == NULL)
1642 {
1643 /* update the error code */
1644 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1645 /* update return status */
1646 status = HAL_ERROR;
1647 }
1648 else
1649 {
1650 if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1651 {
1652 hdfsdm_filter->AwdCallback = pCallback;
1653 }
1654 else
1655 {
1656 /* update the error code */
1657 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1658 /* update return status */
1659 status = HAL_ERROR;
1660 }
1661 }
1662 return status;
1663 }
1664
1665 /**
1666 * @brief Unregister a user DFSDM filter analog watchdog callback.
1667 * DFSDM filter AWD callback is redirected to the weak predefined callback.
1668 * @param hdfsdm_filter DFSDM filter handle.
1669 * @retval HAL status.
1670 */
HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1671 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1672 {
1673 HAL_StatusTypeDef status = HAL_OK;
1674
1675 if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1676 {
1677 hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback;
1678 }
1679 else
1680 {
1681 /* update the error code */
1682 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1683 /* update return status */
1684 status = HAL_ERROR;
1685 }
1686 return status;
1687 }
1688 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
1689
1690 /**
1691 * @}
1692 */
1693
1694 /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
1695 * @brief Filter control functions
1696 *
1697 @verbatim
1698 ==============================================================================
1699 ##### Filter control functions #####
1700 ==============================================================================
1701 [..] This section provides functions allowing to:
1702 (+) Select channel and enable/disable continuous mode for regular conversion.
1703 (+) Select channels for injected conversion.
1704 @endverbatim
1705 * @{
1706 */
1707
1708 /**
1709 * @brief This function allows to select channel and to enable/disable
1710 * continuous mode for regular conversion.
1711 * @param hdfsdm_filter DFSDM filter handle.
1712 * @param Channel Channel for regular conversion.
1713 * This parameter can be a value of @ref DFSDM_Channel_Selection.
1714 * @param ContinuousMode Enable/disable continuous mode for regular conversion.
1715 * This parameter can be a value of @ref DFSDM_ContinuousMode.
1716 * @retval HAL status
1717 */
HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel,uint32_t ContinuousMode)1718 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1719 uint32_t Channel,
1720 uint32_t ContinuousMode)
1721 {
1722 HAL_StatusTypeDef status = HAL_OK;
1723
1724 /* Check parameters */
1725 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1726 assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
1727 assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
1728
1729 /* Check DFSDM filter state */
1730 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1731 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1732 {
1733 /* Configure channel and continuous mode for regular conversion */
1734 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
1735 if (ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
1736 {
1737 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t)(((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
1738 DFSDM_FLTCR1_RCONT);
1739 }
1740 else
1741 {
1742 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t)((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
1743 }
1744 /* Store continuous mode information */
1745 hdfsdm_filter->RegularContMode = ContinuousMode;
1746 }
1747 else
1748 {
1749 status = HAL_ERROR;
1750 }
1751
1752 /* Return function status */
1753 return status;
1754 }
1755
1756 /**
1757 * @brief This function allows to select channels for injected conversion.
1758 * @param hdfsdm_filter DFSDM filter handle.
1759 * @param Channel Channels for injected conversion.
1760 * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
1761 * @retval HAL status
1762 */
HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel)1763 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1764 uint32_t Channel)
1765 {
1766 HAL_StatusTypeDef status = HAL_OK;
1767
1768 /* Check parameters */
1769 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1770 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
1771
1772 /* Check DFSDM filter state */
1773 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1774 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1775 {
1776 /* Configure channel for injected conversion */
1777 hdfsdm_filter->Instance->FLTJCHGR = (uint32_t)(Channel & DFSDM_LSB_MASK);
1778 /* Store number of injected channels */
1779 hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
1780 /* Update number of injected channels remaining */
1781 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
1782 hdfsdm_filter->InjectedChannelsNbr : 1U;
1783 }
1784 else
1785 {
1786 status = HAL_ERROR;
1787 }
1788 /* Return function status */
1789 return status;
1790 }
1791
1792 /**
1793 * @}
1794 */
1795
1796 /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
1797 * @brief Filter operation functions
1798 *
1799 @verbatim
1800 ==============================================================================
1801 ##### Filter operation functions #####
1802 ==============================================================================
1803 [..] This section provides functions allowing to:
1804 (+) Start conversion of regular/injected channel.
1805 (+) Poll for the end of regular/injected conversion.
1806 (+) Stop conversion of regular/injected channel.
1807 (+) Start conversion of regular/injected channel and enable interrupt.
1808 (+) Call the callback functions at the end of regular/injected conversions.
1809 (+) Stop conversion of regular/injected channel and disable interrupt.
1810 (+) Start conversion of regular/injected channel and enable DMA transfer.
1811 (+) Stop conversion of regular/injected channel and disable DMA transfer.
1812 (+) Start analog watchdog and enable interrupt.
1813 (+) Call the callback function when analog watchdog occurs.
1814 (+) Stop analog watchdog and disable interrupt.
1815 (+) Start extreme detector.
1816 (+) Stop extreme detector.
1817 (+) Get result of regular channel conversion.
1818 (+) Get result of injected channel conversion.
1819 (+) Get extreme detector maximum and minimum values.
1820 (+) Get conversion time.
1821 (+) Handle DFSDM interrupt request.
1822 @endverbatim
1823 * @{
1824 */
1825
1826 /**
1827 * @brief This function allows to start regular conversion in polling mode.
1828 * @note This function should be called only when DFSDM filter instance is
1829 * in idle state or if injected conversion is ongoing.
1830 * @param hdfsdm_filter DFSDM filter handle.
1831 * @retval HAL status
1832 */
HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1833 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1834 {
1835 HAL_StatusTypeDef status = HAL_OK;
1836
1837 /* Check parameters */
1838 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1839
1840 /* Check DFSDM filter state */
1841 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1842 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
1843 {
1844 /* Start regular conversion */
1845 DFSDM_RegConvStart(hdfsdm_filter);
1846 }
1847 else
1848 {
1849 status = HAL_ERROR;
1850 }
1851 /* Return function status */
1852 return status;
1853 }
1854
1855 /**
1856 * @brief This function allows to poll for the end of regular conversion.
1857 * @note This function should be called only if regular conversion is ongoing.
1858 * @param hdfsdm_filter DFSDM filter handle.
1859 * @param Timeout Timeout value in milliseconds.
1860 * @retval HAL status
1861 */
HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Timeout)1862 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1863 uint32_t Timeout)
1864 {
1865 uint32_t tickstart;
1866
1867 /* Check parameters */
1868 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1869
1870 /* Check DFSDM filter state */
1871 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1872 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1873 {
1874 /* Return error status */
1875 return HAL_ERROR;
1876 }
1877 else
1878 {
1879 /* Get timeout */
1880 tickstart = HAL_GetTick();
1881
1882 /* Wait end of regular conversion */
1883 while ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
1884 {
1885 /* Check the Timeout */
1886 if (Timeout != HAL_MAX_DELAY)
1887 {
1888 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1889 {
1890 /* Return timeout status */
1891 return HAL_TIMEOUT;
1892 }
1893 }
1894 }
1895 /* Check if overrun occurs */
1896 if ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
1897 {
1898 /* Update error code and call error callback */
1899 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
1900 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1901 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
1902 #else
1903 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
1904 #endif
1905
1906 /* Clear regular overrun flag */
1907 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
1908 }
1909 /* Update DFSDM filter state only if not continuous conversion and SW trigger */
1910 if ((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
1911 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
1912 {
1913 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
1914 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
1915 }
1916 /* Return function status */
1917 return HAL_OK;
1918 }
1919 }
1920
1921 /**
1922 * @brief This function allows to stop regular conversion in polling mode.
1923 * @note This function should be called only if regular conversion is ongoing.
1924 * @param hdfsdm_filter DFSDM filter handle.
1925 * @retval HAL status
1926 */
HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1927 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1928 {
1929 HAL_StatusTypeDef status = HAL_OK;
1930
1931 /* Check parameters */
1932 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1933
1934 /* Check DFSDM filter state */
1935 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1936 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1937 {
1938 /* Return error status */
1939 status = HAL_ERROR;
1940 }
1941 else
1942 {
1943 /* Stop regular conversion */
1944 DFSDM_RegConvStop(hdfsdm_filter);
1945 }
1946 /* Return function status */
1947 return status;
1948 }
1949
1950 /**
1951 * @brief This function allows to start regular conversion in interrupt mode.
1952 * @note This function should be called only when DFSDM filter instance is
1953 * in idle state or if injected conversion is ongoing.
1954 * @param hdfsdm_filter DFSDM filter handle.
1955 * @retval HAL status
1956 */
HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1957 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1958 {
1959 HAL_StatusTypeDef status = HAL_OK;
1960
1961 /* Check parameters */
1962 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1963
1964 /* Check DFSDM filter state */
1965 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1966 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
1967 {
1968 /* Enable interrupts for regular conversions */
1969 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
1970
1971 /* Start regular conversion */
1972 DFSDM_RegConvStart(hdfsdm_filter);
1973 }
1974 else
1975 {
1976 status = HAL_ERROR;
1977 }
1978 /* Return function status */
1979 return status;
1980 }
1981
1982 /**
1983 * @brief This function allows to stop regular conversion in interrupt mode.
1984 * @note This function should be called only if regular conversion is ongoing.
1985 * @param hdfsdm_filter DFSDM filter handle.
1986 * @retval HAL status
1987 */
HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1988 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1989 {
1990 HAL_StatusTypeDef status = HAL_OK;
1991
1992 /* Check parameters */
1993 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1994
1995 /* Check DFSDM filter state */
1996 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1997 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1998 {
1999 /* Return error status */
2000 status = HAL_ERROR;
2001 }
2002 else
2003 {
2004 /* Disable interrupts for regular conversions */
2005 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
2006
2007 /* Stop regular conversion */
2008 DFSDM_RegConvStop(hdfsdm_filter);
2009 }
2010 /* Return function status */
2011 return status;
2012 }
2013
2014 /**
2015 * @brief This function allows to start regular conversion in DMA mode.
2016 * @note This function should be called only when DFSDM filter instance is
2017 * in idle state or if injected conversion is ongoing.
2018 * Please note that data on buffer will contain signed regular conversion
2019 * value on 24 most significant bits and corresponding channel on 3 least
2020 * significant bits.
2021 * @param hdfsdm_filter DFSDM filter handle.
2022 * @param pData The destination buffer address.
2023 * @param Length The length of data to be transferred from DFSDM filter to memory.
2024 * @retval HAL status
2025 */
HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int32_t * pData,uint32_t Length)2026 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2027 int32_t *pData,
2028 uint32_t Length)
2029 {
2030 HAL_StatusTypeDef status = HAL_OK;
2031
2032 /* Check parameters */
2033 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2034
2035 /* Check destination address and length */
2036 if ((pData == NULL) || (Length == 0U))
2037 {
2038 status = HAL_ERROR;
2039 }
2040 /* Check that DMA is enabled for regular conversion */
2041 else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
2042 {
2043 status = HAL_ERROR;
2044 }
2045 /* Check parameters compatibility */
2046 else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2047 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2048 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
2049 (Length != 1U))
2050 {
2051 status = HAL_ERROR;
2052 }
2053 else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2054 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2055 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
2056 {
2057 status = HAL_ERROR;
2058 }
2059 /* Check DFSDM filter state */
2060 else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2061 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2062 {
2063 /* Set callbacks on DMA handler */
2064 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
2065 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
2066 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ? \
2067 DFSDM_DMARegularHalfConvCplt : NULL;
2068
2069 /* Start DMA in interrupt mode */
2070 if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
2071 (uint32_t) pData, Length) != HAL_OK)
2072 {
2073 /* Set DFSDM filter in error state */
2074 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2075 status = HAL_ERROR;
2076 }
2077 else
2078 {
2079 /* Start regular conversion */
2080 DFSDM_RegConvStart(hdfsdm_filter);
2081 }
2082 }
2083 else
2084 {
2085 status = HAL_ERROR;
2086 }
2087 /* Return function status */
2088 return status;
2089 }
2090
2091 /**
2092 * @brief This function allows to start regular conversion in DMA mode and to get
2093 * only the 16 most significant bits of conversion.
2094 * @note This function should be called only when DFSDM filter instance is
2095 * in idle state or if injected conversion is ongoing.
2096 * Please note that data on buffer will contain signed 16 most significant
2097 * bits of regular conversion.
2098 * @param hdfsdm_filter DFSDM filter handle.
2099 * @param pData The destination buffer address.
2100 * @param Length The length of data to be transferred from DFSDM filter to memory.
2101 * @retval HAL status
2102 */
HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int16_t * pData,uint32_t Length)2103 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2104 int16_t *pData,
2105 uint32_t Length)
2106 {
2107 HAL_StatusTypeDef status = HAL_OK;
2108
2109 /* Check parameters */
2110 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2111
2112 /* Check destination address and length */
2113 if ((pData == NULL) || (Length == 0U))
2114 {
2115 status = HAL_ERROR;
2116 }
2117 /* Check that DMA is enabled for regular conversion */
2118 else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
2119 {
2120 status = HAL_ERROR;
2121 }
2122 /* Check parameters compatibility */
2123 else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2124 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2125 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
2126 (Length != 1U))
2127 {
2128 status = HAL_ERROR;
2129 }
2130 else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2131 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2132 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
2133 {
2134 status = HAL_ERROR;
2135 }
2136 /* Check DFSDM filter state */
2137 else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2138 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2139 {
2140 /* Set callbacks on DMA handler */
2141 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
2142 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
2143 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ? \
2144 DFSDM_DMARegularHalfConvCplt : NULL;
2145
2146 /* Start DMA in interrupt mode */
2147 if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \
2148 (uint32_t) pData, Length) != HAL_OK)
2149 {
2150 /* Set DFSDM filter in error state */
2151 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2152 status = HAL_ERROR;
2153 }
2154 else
2155 {
2156 /* Start regular conversion */
2157 DFSDM_RegConvStart(hdfsdm_filter);
2158 }
2159 }
2160 else
2161 {
2162 status = HAL_ERROR;
2163 }
2164 /* Return function status */
2165 return status;
2166 }
2167
2168 /**
2169 * @brief This function allows to stop regular conversion in DMA mode.
2170 * @note This function should be called only if regular conversion is ongoing.
2171 * @param hdfsdm_filter DFSDM filter handle.
2172 * @retval HAL status
2173 */
HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2174 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2175 {
2176 HAL_StatusTypeDef status = HAL_OK;
2177
2178 /* Check parameters */
2179 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2180
2181 /* Check DFSDM filter state */
2182 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
2183 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2184 {
2185 /* Return error status */
2186 status = HAL_ERROR;
2187 }
2188 else
2189 {
2190 /* Stop current DMA transfer */
2191 if (HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
2192 {
2193 /* Set DFSDM filter in error state */
2194 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2195 status = HAL_ERROR;
2196 }
2197 else
2198 {
2199 /* Stop regular conversion */
2200 DFSDM_RegConvStop(hdfsdm_filter);
2201 }
2202 }
2203 /* Return function status */
2204 return status;
2205 }
2206
2207 /**
2208 * @brief This function allows to get regular conversion value.
2209 * @param hdfsdm_filter DFSDM filter handle.
2210 * @param Channel Corresponding channel of regular conversion.
2211 * @retval Regular conversion value
2212 */
HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2213 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2214 uint32_t *Channel)
2215 {
2216 uint32_t reg;
2217 int32_t value;
2218
2219 /* Check parameters */
2220 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2221 assert_param(Channel != (void *)0);
2222
2223 /* Get value of data register for regular channel */
2224 reg = hdfsdm_filter->Instance->FLTRDATAR;
2225
2226 /* Extract channel and regular conversion value */
2227 *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
2228 /* Regular conversion value is a signed value located on 24 MSB of register */
2229 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2230 reg &= DFSDM_FLTRDATAR_RDATA;
2231 value = ((int32_t)reg) / 256;
2232
2233 /* return regular conversion value */
2234 return value;
2235 }
2236
2237 /**
2238 * @brief This function allows to start injected conversion in polling mode.
2239 * @note This function should be called only when DFSDM filter instance is
2240 * in idle state or if regular conversion is ongoing.
2241 * @param hdfsdm_filter DFSDM filter handle.
2242 * @retval HAL status
2243 */
HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2244 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2245 {
2246 HAL_StatusTypeDef status = HAL_OK;
2247
2248 /* Check parameters */
2249 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2250
2251 /* Check DFSDM filter state */
2252 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2253 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2254 {
2255 /* Start injected conversion */
2256 DFSDM_InjConvStart(hdfsdm_filter);
2257 }
2258 else
2259 {
2260 status = HAL_ERROR;
2261 }
2262 /* Return function status */
2263 return status;
2264 }
2265
2266 /**
2267 * @brief This function allows to poll for the end of injected conversion.
2268 * @note This function should be called only if injected conversion is ongoing.
2269 * @param hdfsdm_filter DFSDM filter handle.
2270 * @param Timeout Timeout value in milliseconds.
2271 * @retval HAL status
2272 */
HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Timeout)2273 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2274 uint32_t Timeout)
2275 {
2276 uint32_t tickstart;
2277
2278 /* Check parameters */
2279 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2280
2281 /* Check DFSDM filter state */
2282 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2283 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2284 {
2285 /* Return error status */
2286 return HAL_ERROR;
2287 }
2288 else
2289 {
2290 /* Get timeout */
2291 tickstart = HAL_GetTick();
2292
2293 /* Wait end of injected conversions */
2294 while ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
2295 {
2296 /* Check the Timeout */
2297 if (Timeout != HAL_MAX_DELAY)
2298 {
2299 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
2300 {
2301 /* Return timeout status */
2302 return HAL_TIMEOUT;
2303 }
2304 }
2305 }
2306 /* Check if overrun occurs */
2307 if ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
2308 {
2309 /* Update error code and call error callback */
2310 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
2311 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2312 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2313 #else
2314 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2315 #endif
2316
2317 /* Clear injected overrun flag */
2318 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
2319 }
2320
2321 /* Update remaining injected conversions */
2322 hdfsdm_filter->InjConvRemaining--;
2323 if (hdfsdm_filter->InjConvRemaining == 0U)
2324 {
2325 /* Update DFSDM filter state only if trigger is software */
2326 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2327 {
2328 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
2329 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
2330 }
2331
2332 /* end of injected sequence, reset the value */
2333 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2334 hdfsdm_filter->InjectedChannelsNbr : 1U;
2335 }
2336
2337 /* Return function status */
2338 return HAL_OK;
2339 }
2340 }
2341
2342 /**
2343 * @brief This function allows to stop injected conversion in polling mode.
2344 * @note This function should be called only if injected conversion is ongoing.
2345 * @param hdfsdm_filter DFSDM filter handle.
2346 * @retval HAL status
2347 */
HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2348 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2349 {
2350 HAL_StatusTypeDef status = HAL_OK;
2351
2352 /* Check parameters */
2353 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2354
2355 /* Check DFSDM filter state */
2356 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2357 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2358 {
2359 /* Return error status */
2360 status = HAL_ERROR;
2361 }
2362 else
2363 {
2364 /* Stop injected conversion */
2365 DFSDM_InjConvStop(hdfsdm_filter);
2366 }
2367 /* Return function status */
2368 return status;
2369 }
2370
2371 /**
2372 * @brief This function allows to start injected conversion in interrupt mode.
2373 * @note This function should be called only when DFSDM filter instance is
2374 * in idle state or if regular conversion is ongoing.
2375 * @param hdfsdm_filter DFSDM filter handle.
2376 * @retval HAL status
2377 */
HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2378 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2379 {
2380 HAL_StatusTypeDef status = HAL_OK;
2381
2382 /* Check parameters */
2383 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2384
2385 /* Check DFSDM filter state */
2386 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2387 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2388 {
2389 /* Enable interrupts for injected conversions */
2390 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
2391
2392 /* Start injected conversion */
2393 DFSDM_InjConvStart(hdfsdm_filter);
2394 }
2395 else
2396 {
2397 status = HAL_ERROR;
2398 }
2399 /* Return function status */
2400 return status;
2401 }
2402
2403 /**
2404 * @brief This function allows to stop injected conversion in interrupt mode.
2405 * @note This function should be called only if injected conversion is ongoing.
2406 * @param hdfsdm_filter DFSDM filter handle.
2407 * @retval HAL status
2408 */
HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2409 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2410 {
2411 HAL_StatusTypeDef status = HAL_OK;
2412
2413 /* Check parameters */
2414 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2415
2416 /* Check DFSDM filter state */
2417 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2418 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2419 {
2420 /* Return error status */
2421 status = HAL_ERROR;
2422 }
2423 else
2424 {
2425 /* Disable interrupts for injected conversions */
2426 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
2427
2428 /* Stop injected conversion */
2429 DFSDM_InjConvStop(hdfsdm_filter);
2430 }
2431 /* Return function status */
2432 return status;
2433 }
2434
2435 /**
2436 * @brief This function allows to start injected conversion in DMA mode.
2437 * @note This function should be called only when DFSDM filter instance is
2438 * in idle state or if regular conversion is ongoing.
2439 * Please note that data on buffer will contain signed injected conversion
2440 * value on 24 most significant bits and corresponding channel on 3 least
2441 * significant bits.
2442 * @param hdfsdm_filter DFSDM filter handle.
2443 * @param pData The destination buffer address.
2444 * @param Length The length of data to be transferred from DFSDM filter to memory.
2445 * @retval HAL status
2446 */
HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int32_t * pData,uint32_t Length)2447 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2448 int32_t *pData,
2449 uint32_t Length)
2450 {
2451 HAL_StatusTypeDef status = HAL_OK;
2452
2453 /* Check parameters */
2454 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2455
2456 /* Check destination address and length */
2457 if ((pData == NULL) || (Length == 0U))
2458 {
2459 status = HAL_ERROR;
2460 }
2461 /* Check that DMA is enabled for injected conversion */
2462 else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2463 {
2464 status = HAL_ERROR;
2465 }
2466 /* Check parameters compatibility */
2467 else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2468 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2469 (Length > hdfsdm_filter->InjConvRemaining))
2470 {
2471 status = HAL_ERROR;
2472 }
2473 else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2474 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2475 {
2476 status = HAL_ERROR;
2477 }
2478 /* Check DFSDM filter state */
2479 else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2480 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2481 {
2482 /* Set callbacks on DMA handler */
2483 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2484 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2485 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ? \
2486 DFSDM_DMAInjectedHalfConvCplt : NULL;
2487
2488 /* Start DMA in interrupt mode */
2489 if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
2490 (uint32_t) pData, Length) != HAL_OK)
2491 {
2492 /* Set DFSDM filter in error state */
2493 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2494 status = HAL_ERROR;
2495 }
2496 else
2497 {
2498 /* Start injected conversion */
2499 DFSDM_InjConvStart(hdfsdm_filter);
2500 }
2501 }
2502 else
2503 {
2504 status = HAL_ERROR;
2505 }
2506 /* Return function status */
2507 return status;
2508 }
2509
2510 /**
2511 * @brief This function allows to start injected conversion in DMA mode and to get
2512 * only the 16 most significant bits of conversion.
2513 * @note This function should be called only when DFSDM filter instance is
2514 * in idle state or if regular conversion is ongoing.
2515 * Please note that data on buffer will contain signed 16 most significant
2516 * bits of injected conversion.
2517 * @param hdfsdm_filter DFSDM filter handle.
2518 * @param pData The destination buffer address.
2519 * @param Length The length of data to be transferred from DFSDM filter to memory.
2520 * @retval HAL status
2521 */
HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int16_t * pData,uint32_t Length)2522 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2523 int16_t *pData,
2524 uint32_t Length)
2525 {
2526 HAL_StatusTypeDef status = HAL_OK;
2527
2528 /* Check parameters */
2529 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2530
2531 /* Check destination address and length */
2532 if ((pData == NULL) || (Length == 0U))
2533 {
2534 status = HAL_ERROR;
2535 }
2536 /* Check that DMA is enabled for injected conversion */
2537 else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2538 {
2539 status = HAL_ERROR;
2540 }
2541 /* Check parameters compatibility */
2542 else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2543 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2544 (Length > hdfsdm_filter->InjConvRemaining))
2545 {
2546 status = HAL_ERROR;
2547 }
2548 else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2549 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2550 {
2551 status = HAL_ERROR;
2552 }
2553 /* Check DFSDM filter state */
2554 else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2555 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2556 {
2557 /* Set callbacks on DMA handler */
2558 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2559 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2560 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ? \
2561 DFSDM_DMAInjectedHalfConvCplt : NULL;
2562
2563 /* Start DMA in interrupt mode */
2564 if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \
2565 (uint32_t) pData, Length) != HAL_OK)
2566 {
2567 /* Set DFSDM filter in error state */
2568 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2569 status = HAL_ERROR;
2570 }
2571 else
2572 {
2573 /* Start injected conversion */
2574 DFSDM_InjConvStart(hdfsdm_filter);
2575 }
2576 }
2577 else
2578 {
2579 status = HAL_ERROR;
2580 }
2581 /* Return function status */
2582 return status;
2583 }
2584
2585 /**
2586 * @brief This function allows to stop injected conversion in DMA mode.
2587 * @note This function should be called only if injected conversion is ongoing.
2588 * @param hdfsdm_filter DFSDM filter handle.
2589 * @retval HAL status
2590 */
HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2591 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2592 {
2593 HAL_StatusTypeDef status = HAL_OK;
2594
2595 /* Check parameters */
2596 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2597
2598 /* Check DFSDM filter state */
2599 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2600 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2601 {
2602 /* Return error status */
2603 status = HAL_ERROR;
2604 }
2605 else
2606 {
2607 /* Stop current DMA transfer */
2608 if (HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
2609 {
2610 /* Set DFSDM filter in error state */
2611 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2612 status = HAL_ERROR;
2613 }
2614 else
2615 {
2616 /* Stop regular conversion */
2617 DFSDM_InjConvStop(hdfsdm_filter);
2618 }
2619 }
2620 /* Return function status */
2621 return status;
2622 }
2623
2624 /**
2625 * @brief This function allows to get injected conversion value.
2626 * @param hdfsdm_filter DFSDM filter handle.
2627 * @param Channel Corresponding channel of injected conversion.
2628 * @retval Injected conversion value
2629 */
HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2630 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2631 uint32_t *Channel)
2632 {
2633 uint32_t reg;
2634 int32_t value;
2635
2636 /* Check parameters */
2637 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2638 assert_param(Channel != (void *)0);
2639
2640 /* Get value of data register for injected channel */
2641 reg = hdfsdm_filter->Instance->FLTJDATAR;
2642
2643 /* Extract channel and injected conversion value */
2644 *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
2645 /* Injected conversion value is a signed value located on 24 MSB of register */
2646 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2647 reg &= DFSDM_FLTJDATAR_JDATA;
2648 value = ((int32_t)reg) / 256;
2649
2650 /* return regular conversion value */
2651 return value;
2652 }
2653
2654 /**
2655 * @brief This function allows to start filter analog watchdog in interrupt mode.
2656 * @param hdfsdm_filter DFSDM filter handle.
2657 * @param awdParam DFSDM filter analog watchdog parameters.
2658 * @retval HAL status
2659 */
HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,DFSDM_Filter_AwdParamTypeDef * awdParam)2660 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2661 DFSDM_Filter_AwdParamTypeDef *awdParam)
2662 {
2663 HAL_StatusTypeDef status = HAL_OK;
2664
2665 /* Check parameters */
2666 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2667 assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
2668 assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
2669 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
2670 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
2671 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
2672 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
2673
2674 /* Check DFSDM filter state */
2675 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2676 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2677 {
2678 /* Return error status */
2679 status = HAL_ERROR;
2680 }
2681 else
2682 {
2683 /* Set analog watchdog data source */
2684 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2685 hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
2686
2687 /* Set thresholds and break signals */
2688 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2689 hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \
2690 awdParam->HighBreakSignal);
2691 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2692 hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \
2693 awdParam->LowBreakSignal);
2694
2695 /* Set channels and interrupt for analog watchdog */
2696 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
2697 hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \
2698 DFSDM_FLTCR2_AWDIE);
2699 }
2700 /* Return function status */
2701 return status;
2702 }
2703
2704 /**
2705 * @brief This function allows to stop filter analog watchdog in interrupt mode.
2706 * @param hdfsdm_filter DFSDM filter handle.
2707 * @retval HAL status
2708 */
HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2709 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2710 {
2711 HAL_StatusTypeDef status = HAL_OK;
2712
2713 /* Check parameters */
2714 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2715
2716 /* Check DFSDM filter state */
2717 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2718 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2719 {
2720 /* Return error status */
2721 status = HAL_ERROR;
2722 }
2723 else
2724 {
2725 /* Reset channels for analog watchdog and deactivate interrupt */
2726 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
2727
2728 /* Clear all analog watchdog flags */
2729 hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
2730
2731 /* Reset thresholds and break signals */
2732 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2733 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2734
2735 /* Reset analog watchdog data source */
2736 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2737 }
2738 /* Return function status */
2739 return status;
2740 }
2741
2742 /**
2743 * @brief This function allows to start extreme detector feature.
2744 * @param hdfsdm_filter DFSDM filter handle.
2745 * @param Channel Channels where extreme detector is enabled.
2746 * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
2747 * @retval HAL status
2748 */
HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel)2749 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2750 uint32_t Channel)
2751 {
2752 HAL_StatusTypeDef status = HAL_OK;
2753
2754 /* Check parameters */
2755 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2756 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
2757
2758 /* Check DFSDM filter state */
2759 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2760 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2761 {
2762 /* Return error status */
2763 status = HAL_ERROR;
2764 }
2765 else
2766 {
2767 /* Set channels for extreme detector */
2768 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2769 hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos);
2770 }
2771 /* Return function status */
2772 return status;
2773 }
2774
2775 /**
2776 * @brief This function allows to stop extreme detector feature.
2777 * @param hdfsdm_filter DFSDM filter handle.
2778 * @retval HAL status
2779 */
HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2780 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2781 {
2782 HAL_StatusTypeDef status = HAL_OK;
2783 __IO uint32_t reg1;
2784 __IO uint32_t reg2;
2785
2786 /* Check parameters */
2787 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2788
2789 /* Check DFSDM filter state */
2790 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2791 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2792 {
2793 /* Return error status */
2794 status = HAL_ERROR;
2795 }
2796 else
2797 {
2798 /* Reset channels for extreme detector */
2799 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2800
2801 /* Clear extreme detector values */
2802 reg1 = hdfsdm_filter->Instance->FLTEXMAX;
2803 reg2 = hdfsdm_filter->Instance->FLTEXMIN;
2804 UNUSED(reg1); /* To avoid GCC warning */
2805 UNUSED(reg2); /* To avoid GCC warning */
2806 }
2807 /* Return function status */
2808 return status;
2809 }
2810
2811 /**
2812 * @brief This function allows to get extreme detector maximum value.
2813 * @param hdfsdm_filter DFSDM filter handle.
2814 * @param Channel Corresponding channel.
2815 * @retval Extreme detector maximum value
2816 * This value is between Min_Data = -8388608 and Max_Data = 8388607.
2817 */
HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2818 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2819 uint32_t *Channel)
2820 {
2821 uint32_t reg;
2822 int32_t value;
2823
2824 /* Check parameters */
2825 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2826 assert_param(Channel != (void *)0);
2827
2828 /* Get value of extreme detector maximum register */
2829 reg = hdfsdm_filter->Instance->FLTEXMAX;
2830
2831 /* Extract channel and extreme detector maximum value */
2832 *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
2833 /* Extreme detector maximum value is a signed value located on 24 MSB of register */
2834 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2835 reg &= DFSDM_FLTEXMAX_EXMAX;
2836 value = ((int32_t)reg) / 256;
2837
2838 /* return extreme detector maximum value */
2839 return value;
2840 }
2841
2842 /**
2843 * @brief This function allows to get extreme detector minimum value.
2844 * @param hdfsdm_filter DFSDM filter handle.
2845 * @param Channel Corresponding channel.
2846 * @retval Extreme detector minimum value
2847 * This value is between Min_Data = -8388608 and Max_Data = 8388607.
2848 */
HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2849 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2850 uint32_t *Channel)
2851 {
2852 uint32_t reg;
2853 int32_t value;
2854
2855 /* Check parameters */
2856 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2857 assert_param(Channel != (void *)0);
2858
2859 /* Get value of extreme detector minimum register */
2860 reg = hdfsdm_filter->Instance->FLTEXMIN;
2861
2862 /* Extract channel and extreme detector minimum value */
2863 *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
2864 /* Extreme detector minimum value is a signed value located on 24 MSB of register */
2865 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2866 reg &= DFSDM_FLTEXMIN_EXMIN;
2867 value = ((int32_t)reg) / 256;
2868
2869 /* return extreme detector minimum value */
2870 return value;
2871 }
2872
2873 /**
2874 * @brief This function allows to get conversion time value.
2875 * @param hdfsdm_filter DFSDM filter handle.
2876 * @retval Conversion time value
2877 * @note To get time in second, this value has to be divided by DFSDM clock frequency.
2878 */
HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2879 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2880 {
2881 uint32_t reg;
2882 uint32_t value;
2883
2884 /* Check parameters */
2885 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2886
2887 /* Get value of conversion timer register */
2888 reg = hdfsdm_filter->Instance->FLTCNVTIMR;
2889
2890 /* Extract conversion time value */
2891 value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos);
2892
2893 /* return extreme detector minimum value */
2894 return value;
2895 }
2896
2897 /**
2898 * @brief This function handles the DFSDM interrupts.
2899 * @param hdfsdm_filter DFSDM filter handle.
2900 * @retval None
2901 */
HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2902 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2903 {
2904 /* Get FTLISR and FLTCR2 register values */
2905 const uint32_t temp_fltisr = hdfsdm_filter->Instance->FLTISR;
2906 const uint32_t temp_fltcr2 = hdfsdm_filter->Instance->FLTCR2;
2907
2908 /* Check if overrun occurs during regular conversion */
2909 if (((temp_fltisr & DFSDM_FLTISR_ROVRF) != 0U) && \
2910 ((temp_fltcr2 & DFSDM_FLTCR2_ROVRIE) != 0U))
2911 {
2912 /* Clear regular overrun flag */
2913 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
2914
2915 /* Update error code */
2916 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
2917
2918 /* Call error callback */
2919 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2920 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2921 #else
2922 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2923 #endif
2924 }
2925 /* Check if overrun occurs during injected conversion */
2926 else if (((temp_fltisr & DFSDM_FLTISR_JOVRF) != 0U) && \
2927 ((temp_fltcr2 & DFSDM_FLTCR2_JOVRIE) != 0U))
2928 {
2929 /* Clear injected overrun flag */
2930 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
2931
2932 /* Update error code */
2933 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
2934
2935 /* Call error callback */
2936 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2937 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2938 #else
2939 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2940 #endif
2941 }
2942 /* Check if end of regular conversion */
2943 else if (((temp_fltisr & DFSDM_FLTISR_REOCF) != 0U) && \
2944 ((temp_fltcr2 & DFSDM_FLTCR2_REOCIE) != 0U))
2945 {
2946 /* Call regular conversion complete callback */
2947 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2948 hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
2949 #else
2950 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
2951 #endif
2952
2953 /* End of conversion if mode is not continuous and software trigger */
2954 if ((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2955 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
2956 {
2957 /* Disable interrupts for regular conversions */
2958 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
2959
2960 /* Update DFSDM filter state */
2961 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
2962 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
2963 }
2964 }
2965 /* Check if end of injected conversion */
2966 else if (((temp_fltisr & DFSDM_FLTISR_JEOCF) != 0U) && \
2967 ((temp_fltcr2 & DFSDM_FLTCR2_JEOCIE) != 0U))
2968 {
2969 /* Call injected conversion complete callback */
2970 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2971 hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
2972 #else
2973 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
2974 #endif
2975
2976 /* Update remaining injected conversions */
2977 hdfsdm_filter->InjConvRemaining--;
2978 if (hdfsdm_filter->InjConvRemaining == 0U)
2979 {
2980 /* End of conversion if trigger is software */
2981 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2982 {
2983 /* Disable interrupts for injected conversions */
2984 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
2985
2986 /* Update DFSDM filter state */
2987 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
2988 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
2989 }
2990 /* end of injected sequence, reset the value */
2991 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2992 hdfsdm_filter->InjectedChannelsNbr : 1U;
2993 }
2994 }
2995 /* Check if analog watchdog occurs */
2996 else if (((temp_fltisr & DFSDM_FLTISR_AWDF) != 0U) && \
2997 ((temp_fltcr2 & DFSDM_FLTCR2_AWDIE) != 0U))
2998 {
2999 uint32_t reg;
3000 uint32_t threshold;
3001 uint32_t channel = 0;
3002
3003 /* Get channel and threshold */
3004 reg = hdfsdm_filter->Instance->FLTAWSR;
3005 threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
3006 if (threshold == DFSDM_AWD_HIGH_THRESHOLD)
3007 {
3008 reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos;
3009 }
3010 while (((reg & 1U) == 0U) && (channel < (DFSDM1_CHANNEL_NUMBER - 1U)))
3011 {
3012 channel++;
3013 reg = reg >> 1;
3014 }
3015 /* Clear analog watchdog flag */
3016 hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
3017 (1UL << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \
3018 (1UL << channel);
3019
3020 /* Call analog watchdog callback */
3021 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3022 hdfsdm_filter->AwdCallback(hdfsdm_filter, channel, threshold);
3023 #else
3024 HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
3025 #endif
3026 }
3027 /* Check if clock absence occurs */
3028 else if ((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
3029 ((temp_fltisr & DFSDM_FLTISR_CKABF) != 0U) && \
3030 ((temp_fltcr2 & DFSDM_FLTCR2_CKABIE) != 0U))
3031 {
3032 uint32_t reg;
3033 uint32_t channel = 0;
3034
3035 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);
3036
3037 while (channel < DFSDM1_CHANNEL_NUMBER)
3038 {
3039 /* Check if flag is set and corresponding channel is enabled */
3040 if (((reg & 1U) != 0U) && (a_dfsdm1ChannelHandle[channel] != NULL))
3041 {
3042 /* Check clock absence has been enabled for this channel */
3043 if ((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
3044 {
3045 /* Clear clock absence flag */
3046 hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
3047
3048 /* Call clock absence callback */
3049 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3050 a_dfsdm1ChannelHandle[channel]->CkabCallback(a_dfsdm1ChannelHandle[channel]);
3051 #else
3052 HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
3053 #endif
3054 }
3055 }
3056 channel++;
3057 reg = reg >> 1;
3058 }
3059 }
3060 /* Check if short circuit detection occurs */
3061 else if ((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
3062 ((temp_fltisr & DFSDM_FLTISR_SCDF) != 0U) && \
3063 ((temp_fltcr2 & DFSDM_FLTCR2_SCDIE) != 0U))
3064 {
3065 uint32_t reg;
3066 uint32_t channel = 0;
3067
3068 /* Get channel */
3069 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);
3070 while (((reg & 1U) == 0U) && (channel < (DFSDM1_CHANNEL_NUMBER - 1U)))
3071 {
3072 channel++;
3073 reg = reg >> 1;
3074 }
3075
3076 /* Clear short circuit detection flag */
3077 hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
3078
3079 /* Call short circuit detection callback */
3080 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3081 a_dfsdm1ChannelHandle[channel]->ScdCallback(a_dfsdm1ChannelHandle[channel]);
3082 #else
3083 HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
3084 #endif
3085 }
3086 }
3087
3088 /**
3089 * @brief Regular conversion complete callback.
3090 * @note In interrupt mode, user has to read conversion value in this function
3091 * using HAL_DFSDM_FilterGetRegularValue.
3092 * @param hdfsdm_filter DFSDM filter handle.
3093 * @retval None
3094 */
HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3095 __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3096 {
3097 /* Prevent unused argument(s) compilation warning */
3098 UNUSED(hdfsdm_filter);
3099
3100 /* NOTE : This function should not be modified, when the callback is needed,
3101 the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
3102 */
3103 }
3104
3105 /**
3106 * @brief Half regular conversion complete callback.
3107 * @param hdfsdm_filter DFSDM filter handle.
3108 * @retval None
3109 */
HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3110 __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3111 {
3112 /* Prevent unused argument(s) compilation warning */
3113 UNUSED(hdfsdm_filter);
3114
3115 /* NOTE : This function should not be modified, when the callback is needed,
3116 the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
3117 */
3118 }
3119
3120 /**
3121 * @brief Injected conversion complete callback.
3122 * @note In interrupt mode, user has to read conversion value in this function
3123 * using HAL_DFSDM_FilterGetInjectedValue.
3124 * @param hdfsdm_filter DFSDM filter handle.
3125 * @retval None
3126 */
HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3127 __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3128 {
3129 /* Prevent unused argument(s) compilation warning */
3130 UNUSED(hdfsdm_filter);
3131
3132 /* NOTE : This function should not be modified, when the callback is needed,
3133 the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
3134 */
3135 }
3136
3137 /**
3138 * @brief Half injected conversion complete callback.
3139 * @param hdfsdm_filter DFSDM filter handle.
3140 * @retval None
3141 */
HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3142 __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3143 {
3144 /* Prevent unused argument(s) compilation warning */
3145 UNUSED(hdfsdm_filter);
3146
3147 /* NOTE : This function should not be modified, when the callback is needed,
3148 the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
3149 */
3150 }
3151
3152 /**
3153 * @brief Filter analog watchdog callback.
3154 * @param hdfsdm_filter DFSDM filter handle.
3155 * @param Channel Corresponding channel.
3156 * @param Threshold Low or high threshold has been reached.
3157 * @retval None
3158 */
HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel,uint32_t Threshold)3159 __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
3160 uint32_t Channel, uint32_t Threshold)
3161 {
3162 /* Prevent unused argument(s) compilation warning */
3163 UNUSED(hdfsdm_filter);
3164 UNUSED(Channel);
3165 UNUSED(Threshold);
3166
3167 /* NOTE : This function should not be modified, when the callback is needed,
3168 the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
3169 */
3170 }
3171
3172 /**
3173 * @brief Error callback.
3174 * @param hdfsdm_filter DFSDM filter handle.
3175 * @retval None
3176 */
HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3177 __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3178 {
3179 /* Prevent unused argument(s) compilation warning */
3180 UNUSED(hdfsdm_filter);
3181
3182 /* NOTE : This function should not be modified, when the callback is needed,
3183 the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
3184 */
3185 }
3186
3187 /**
3188 * @}
3189 */
3190
3191 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
3192 * @brief Filter state functions
3193 *
3194 @verbatim
3195 ==============================================================================
3196 ##### Filter state functions #####
3197 ==============================================================================
3198 [..] This section provides functions allowing to:
3199 (+) Get the DFSDM filter state.
3200 (+) Get the DFSDM filter error.
3201 @endverbatim
3202 * @{
3203 */
3204
3205 /**
3206 * @brief This function allows to get the current DFSDM filter handle state.
3207 * @param hdfsdm_filter DFSDM filter handle.
3208 * @retval DFSDM filter state.
3209 */
HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3210 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3211 {
3212 /* Return DFSDM filter handle state */
3213 return hdfsdm_filter->State;
3214 }
3215
3216 /**
3217 * @brief This function allows to get the current DFSDM filter error.
3218 * @param hdfsdm_filter DFSDM filter handle.
3219 * @retval DFSDM filter error code.
3220 */
HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3221 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3222 {
3223 return hdfsdm_filter->ErrorCode;
3224 }
3225
3226 /**
3227 * @}
3228 */
3229
3230 /**
3231 * @}
3232 */
3233 /* End of exported functions -------------------------------------------------*/
3234
3235 /* Private functions ---------------------------------------------------------*/
3236 /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
3237 * @{
3238 */
3239
3240 /**
3241 * @brief DMA half transfer complete callback for regular conversion.
3242 * @param hdma DMA handle.
3243 * @retval None
3244 */
DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef * hdma)3245 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
3246 {
3247 /* Get DFSDM filter handle */
3248 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3249
3250 /* Call regular half conversion complete callback */
3251 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3252 hdfsdm_filter->RegConvHalfCpltCallback(hdfsdm_filter);
3253 #else
3254 HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
3255 #endif
3256 }
3257
3258 /**
3259 * @brief DMA transfer complete callback for regular conversion.
3260 * @param hdma DMA handle.
3261 * @retval None
3262 */
DFSDM_DMARegularConvCplt(DMA_HandleTypeDef * hdma)3263 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
3264 {
3265 /* Get DFSDM filter handle */
3266 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3267
3268 /* Call regular conversion complete callback */
3269 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3270 hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
3271 #else
3272 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
3273 #endif
3274 }
3275
3276 /**
3277 * @brief DMA half transfer complete callback for injected conversion.
3278 * @param hdma DMA handle.
3279 * @retval None
3280 */
DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef * hdma)3281 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
3282 {
3283 /* Get DFSDM filter handle */
3284 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3285
3286 /* Call injected half conversion complete callback */
3287 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3288 hdfsdm_filter->InjConvHalfCpltCallback(hdfsdm_filter);
3289 #else
3290 HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
3291 #endif
3292 }
3293
3294 /**
3295 * @brief DMA transfer complete callback for injected conversion.
3296 * @param hdma DMA handle.
3297 * @retval None
3298 */
DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef * hdma)3299 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
3300 {
3301 /* Get DFSDM filter handle */
3302 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3303
3304 /* Call injected conversion complete callback */
3305 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3306 hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
3307 #else
3308 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
3309 #endif
3310 }
3311
3312 /**
3313 * @brief DMA error callback.
3314 * @param hdma DMA handle.
3315 * @retval None
3316 */
DFSDM_DMAError(DMA_HandleTypeDef * hdma)3317 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
3318 {
3319 /* Get DFSDM filter handle */
3320 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3321
3322 /* Update error code */
3323 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
3324
3325 /* Call error callback */
3326 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3327 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
3328 #else
3329 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
3330 #endif
3331 }
3332
3333 /**
3334 * @brief This function allows to get the number of injected channels.
3335 * @param Channels bitfield of injected channels.
3336 * @retval Number of injected channels.
3337 */
DFSDM_GetInjChannelsNbr(uint32_t Channels)3338 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
3339 {
3340 uint32_t nbChannels = 0;
3341 uint32_t tmp;
3342
3343 /* Get the number of channels from bitfield */
3344 tmp = (uint32_t)(Channels & DFSDM_LSB_MASK);
3345 while (tmp != 0U)
3346 {
3347 if ((tmp & 1U) != 0U)
3348 {
3349 nbChannels++;
3350 }
3351 tmp = (uint32_t)(tmp >> 1);
3352 }
3353 return nbChannels;
3354 }
3355
3356 /**
3357 * @brief This function allows to get the channel number from channel instance.
3358 * @param Instance DFSDM channel instance.
3359 * @retval Channel number.
3360 */
DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef * Instance)3361 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance)
3362 {
3363 uint32_t channel;
3364
3365 /* Get channel from instance */
3366 if (Instance == DFSDM1_Channel0)
3367 {
3368 channel = 0;
3369 }
3370 else if (Instance == DFSDM1_Channel1)
3371 {
3372 channel = 1;
3373 }
3374 else if (Instance == DFSDM1_Channel2)
3375 {
3376 channel = 2;
3377 }
3378 else if (Instance == DFSDM1_Channel3)
3379 {
3380 channel = 3;
3381 }
3382 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
3383 defined(STM32L496xx) || defined(STM32L4A6xx) || \
3384 defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
3385 else if (Instance == DFSDM1_Channel4)
3386 {
3387 channel = 4;
3388 }
3389 else if (Instance == DFSDM1_Channel5)
3390 {
3391 channel = 5;
3392 }
3393 else if (Instance == DFSDM1_Channel6)
3394 {
3395 channel = 6;
3396 }
3397 else if (Instance == DFSDM1_Channel7)
3398 {
3399 channel = 7;
3400 }
3401 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
3402 else
3403 {
3404 channel = 0;
3405 }
3406
3407 return channel;
3408 }
3409
3410 /**
3411 * @brief This function allows to really start regular conversion.
3412 * @param hdfsdm_filter DFSDM filter handle.
3413 * @retval None
3414 */
DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3415 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3416 {
3417 /* Check regular trigger */
3418 if (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
3419 {
3420 /* Software start of regular conversion */
3421 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3422 }
3423 else /* synchronous trigger */
3424 {
3425 /* Disable DFSDM filter */
3426 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3427
3428 /* Set RSYNC bit in DFSDM_FLTCR1 register */
3429 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
3430
3431 /* Enable DFSDM filter */
3432 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3433
3434 /* If injected conversion was in progress, restart it */
3435 if (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
3436 {
3437 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3438 {
3439 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3440 }
3441 /* Update remaining injected conversions */
3442 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3443 hdfsdm_filter->InjectedChannelsNbr : 1U;
3444 }
3445 }
3446 /* Update DFSDM filter state */
3447 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
3448 HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
3449 }
3450
3451 /**
3452 * @brief This function allows to really stop regular conversion.
3453 * @param hdfsdm_filter DFSDM filter handle.
3454 * @retval None
3455 */
DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3456 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3457 {
3458 /* Disable DFSDM filter */
3459 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3460
3461 /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
3462 if (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3463 {
3464 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
3465 }
3466
3467 /* Enable DFSDM filter */
3468 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3469
3470 /* If injected conversion was in progress, restart it */
3471 if (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
3472 {
3473 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3474 {
3475 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3476 }
3477 /* Update remaining injected conversions */
3478 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3479 hdfsdm_filter->InjectedChannelsNbr : 1U;
3480 }
3481
3482 /* Update DFSDM filter state */
3483 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
3484 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
3485 }
3486
3487 /**
3488 * @brief This function allows to really start injected conversion.
3489 * @param hdfsdm_filter DFSDM filter handle.
3490 * @retval None
3491 */
DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3492 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3493 {
3494 /* Check injected trigger */
3495 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3496 {
3497 /* Software start of injected conversion */
3498 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3499 }
3500 else /* external or synchronous trigger */
3501 {
3502 /* Disable DFSDM filter */
3503 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3504
3505 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3506 {
3507 /* Set JSYNC bit in DFSDM_FLTCR1 register */
3508 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
3509 }
3510 else /* external trigger */
3511 {
3512 /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
3513 hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
3514 }
3515
3516 /* Enable DFSDM filter */
3517 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3518
3519 /* If regular conversion was in progress, restart it */
3520 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
3521 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3522 {
3523 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3524 }
3525 }
3526 /* Update DFSDM filter state */
3527 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
3528 HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
3529 }
3530
3531 /**
3532 * @brief This function allows to really stop injected conversion.
3533 * @param hdfsdm_filter DFSDM filter handle.
3534 * @retval None
3535 */
DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3536 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3537 {
3538 /* Disable DFSDM filter */
3539 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3540
3541 /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
3542 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3543 {
3544 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
3545 }
3546 else if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
3547 {
3548 /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
3549 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
3550 }
3551 else
3552 {
3553 /* Nothing to do */
3554 }
3555
3556 /* Enable DFSDM filter */
3557 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3558
3559 /* If regular conversion was in progress, restart it */
3560 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
3561 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3562 {
3563 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3564 }
3565
3566 /* Update remaining injected conversions */
3567 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3568 hdfsdm_filter->InjectedChannelsNbr : 1U;
3569
3570 /* Update DFSDM filter state */
3571 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
3572 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
3573 }
3574
3575 /**
3576 * @}
3577 */
3578 /* End of private functions --------------------------------------------------*/
3579
3580 /**
3581 * @}
3582 */
3583
3584 #endif /* STM32L451xx || STM32L452xx || STM32L462xx || STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
3585
3586 #endif /* HAL_DFSDM_MODULE_ENABLED */
3587
3588 /**
3589 * @}
3590 */
3591
3592 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
3593
