1 /*
2 * Copyright 2023 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6 #include "hal_clock_platform.h"
7
8 /*******************************************************************************
9 * Definitions
10 ******************************************************************************/
11
12 const hal_clk_id_e mux_tbl[HAL_CLOCK_PLATFORM_MAX_ID][HAL_CLOCK_PLATFORM_MUX_MAX_ID] = {
13 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid}, /* ext */
14 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
15 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
16 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
17 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
18 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
19 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
20 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
21 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
22 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
23 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
24 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
25 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
26 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
27 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
28 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
29 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
30 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
31 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
32 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
33 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
34 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
35 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
36 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
37 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
38 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
39 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
40 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
41 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
42 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
43 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
44 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
45 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
46 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
47 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
48 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
49 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
50 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
51 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
52 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid},
53 {hal_clock_invalid, hal_clock_invalid, hal_clock_invalid, hal_clock_invalid}, /* ext2 */
54
55 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* adc */
56 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* tmu */
57 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* bus_aon */
58 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* can1 */
59 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* i3c1 */
60 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* i3c1_slow */
61 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpi2c1 */
62 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpi2c2 */
63 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpspi1 */
64 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpspi2 */
65 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lptmr1 */
66 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpuart1 */
67 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpuart2 */
68 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* m33 */
69 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* m33_systick */
70 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_audiopll2, hal_clock_ext}, /* mqs1 */
71 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_audiopll2, hal_clock_ext}, /* pdm */
72 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_audiopll2, hal_clock_ext}, /* sai1 */
73 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* sentinel */
74 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_audiopll1, hal_clock_ext}, /* tpm2 */
75 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* tstmr1 */
76 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* cam_apb */
77 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* cam_axi */
78 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* cam_cm0 */
79 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* cam_isi */
80 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_videopll1, hal_clock_invalid}, /* mipi_phy_cfg */
81 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_videopll1, hal_clock_invalid}, /* mipi_phy_pll_bypass */
82 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_videopll1, hal_clock_invalid}, /* mipi_phy_pll_ref */
83 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_videopll1, hal_clock_invalid}, /* mipi_test_byte */
84 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* arm_a55 */
85 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* arm_a55_mtr_bus */
86 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* arm_a55_periph */
87 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* dram_alt */
88 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* dram_apb */
89 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* disp_apb */
90 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* disp_axi */
91 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* disp_dp */
92 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* disp_ocram */
93 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* disp_usb31 */
94 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_videopll1, hal_clock_invalid}, /* disp1_pix */
95 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_videopll2, hal_clock_syspll1dfs2}, /* disp2_pix */
96 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_videopll3, hal_clock_syspll1dfs2}, /* disp3_pix */
97 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* gpu_apb */
98 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* gpu */
99 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_videopll1, hal_clock_syspll1dfs2}, /* hsio_acscan_480m */
100 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* hsio_acscan_80m */
101 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* hsio */
102 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* hsio_pcie_aux */
103 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* hsio_pcie_test_160m */
104 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* hsio_pcie_test_400m */
105 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* hsio_pcie_test_500m */
106 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* hsio_usb_test_50m */
107 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* hsio_usb_test_60m */
108 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* bus_m7 */
109 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* m7 */
110 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* m7_systick */
111 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* bus_netcmix */
112 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* enet */
113 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* enet_phy_test_200m */
114 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* enet_phy_test_500m */
115 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* enet_phy_test_667m */
116 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* enet_ref */
117 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* enet_timer1 */
118 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_audiopll2, hal_clock_ext}, /* mqs2 */
119 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_audiopll2, hal_clock_ext}, /* sai2 */
120 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* noc_apb */
121 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* noc */
122 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* npu_apb */
123 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* npu */
124 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_osc32k, hal_clock_audiopll1}, /* ccm_cko1 */
125 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_osc32k, hal_clock_videopll1}, /* ccm_cko2 */
126 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_osc32k, hal_clock_videopll2}, /* ccm_cko3 */
127 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_osc32k, hal_clock_videopll1}, /* ccm_cko4 */
128 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* vpu_apb */
129 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* vpu */
130 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* vpu_dsp */
131 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* vpu_jpeg */
132 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* audio_xcvr */
133 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* bus_wakeup */
134 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* can2 */
135 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* can3 */
136 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* i3c2_slow */
137 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpi2c3 */
138 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpi2c4 */
139 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpi2c5 */
140 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpi2c6 */
141 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpi2c7 */
142 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpi2c8 */
143 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpspi3 */
144 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpspi4 */
145 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpspi5 */
146 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpspi6 */
147 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpspi7 */
148 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* lpspi8 */
149 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_audiopll2, hal_clock_ext}, /* sai3 */
150 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_audiopll2, hal_clock_ext}, /* sai4 */
151 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_audiopll2, hal_clock_ext}, /* sai5 */
152 {hal_clock_osc24m, hal_clock_audiopll1, hal_clock_audiopll2, hal_clock_ext}, /* spdif */
153 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* swo_trace */
154 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_audiopll1, hal_clock_ext}, /* tpm4 */
155 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_audiopll1, hal_clock_ext}, /* tpm5 */
156 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_audiopll1, hal_clock_ext}, /* tpm6 */
157 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* tstmr2 */
158 {hal_clock_osc24m, hal_clock_syspll1dfs0div2, hal_clock_syspll1dfs1div2, hal_clock_fro}, /* usb_phy_burunin */
159 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* usdhc1 */
160 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* usdhc2 */
161 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* usdhc3 */
162 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* v2x_pk */
163 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2}, /* wakeup_axi */
164 {hal_clock_osc24m, hal_clock_syspll1dfs0, hal_clock_syspll1dfs1, hal_clock_syspll1dfs2} /* xspi_slv_root */
165 };
166
167 /*******************************************************************************
168 * API
169 ******************************************************************************/
HAL_ClockPlatformGetMuxId(hal_clk_id_e clk_id,hal_clk_id_e pclk_id)170 uint32_t HAL_ClockPlatformGetMuxId(hal_clk_id_e clk_id, hal_clk_id_e pclk_id)
171 {
172 uint32_t mux_id = 0;
173 while (mux_id < HAL_CLOCK_PLATFORM_MUX_MAX_ID)
174 {
175 if (mux_tbl[clk_id][mux_id] == pclk_id)
176 {
177 break;
178 }
179 mux_id++;
180 }
181 return mux_id;
182 }
183
