1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_cryp.h 4 * @author MCD Application Team 5 * @brief Header file of CRYP HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file in 13 * the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 ****************************************************************************** 16 */ 17 18 /* Define to prevent recursive inclusion -------------------------------------*/ 19 #ifndef STM32L4xx_HAL_CRYP_H 20 #define STM32L4xx_HAL_CRYP_H 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "stm32l4xx_hal_def.h" 28 29 /** @addtogroup STM32L4xx_HAL_Driver 30 * @{ 31 */ 32 33 #if defined(AES) 34 35 /** @addtogroup CRYP 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup CRYP_Exported_Types CRYP Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief CRYP Configuration Structure definition 46 */ 47 typedef struct 48 { 49 uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string. 50 This parameter can be a value of @ref CRYP_Data_Type */ 51 52 uint32_t KeySize; /*!< 128 or 256-bit key length. 53 This parameter can be a value of @ref CRYP_Key_Size */ 54 55 uint32_t OperatingMode; /*!< AES operating mode. 56 This parameter can be a value of @ref CRYP_AES_OperatingMode */ 57 58 uint32_t ChainingMode; /*!< AES chaining mode. 59 This parameter can be a value of @ref CRYP_AES_ChainingMode */ 60 61 uint32_t KeyWriteFlag; /*!< Allows to bypass or not key write-up before decryption. 62 This parameter can be a value of @ref CRYP_Key_Write */ 63 64 uint32_t GCMCMACPhase; /*!< Indicates the processing phase of the Galois Counter Mode (GCM), 65 Galois Message Authentication Code (GMAC), Cipher Message 66 Authentication Code (CMAC) (when applicable) or Counter with Cipher 67 Mode (CCM) (when applicable). 68 This parameter can be a value of @ref CRYP_GCM_CMAC_Phase */ 69 70 uint8_t* pKey; /*!< Encryption/Decryption Key */ 71 72 uint8_t* pInitVect; /*!< Initialization Vector used for CTR, CBC, GCM/GMAC, CMAC (when applicable) 73 and CCM (when applicable) modes */ 74 75 uint8_t* Header; /*!< Header used in GCM/GMAC, CMAC (when applicable) and CCM (when applicable) modes */ 76 77 uint64_t HeaderSize; /*!< Header size in bytes */ 78 79 }CRYP_InitTypeDef; 80 81 /** 82 * @brief HAL CRYP State structures definition 83 */ 84 typedef enum 85 { 86 HAL_CRYP_STATE_RESET = 0x00, /*!< CRYP not yet initialized or disabled */ 87 HAL_CRYP_STATE_READY = 0x01, /*!< CRYP initialized and ready for use */ 88 HAL_CRYP_STATE_BUSY = 0x02, /*!< CRYP internal processing is ongoing */ 89 HAL_CRYP_STATE_TIMEOUT = 0x03, /*!< CRYP timeout state */ 90 HAL_CRYP_STATE_ERROR = 0x04, /*!< CRYP error state */ 91 HAL_CRYP_STATE_SUSPENDED = 0x05 /*!< CRYP suspended */ 92 }HAL_CRYP_STATETypeDef; 93 94 /** 95 * @brief HAL CRYP phase structures definition 96 */ 97 typedef enum 98 { 99 HAL_CRYP_PHASE_READY = 0x01, /*!< CRYP peripheral is ready for initialization. */ 100 HAL_CRYP_PHASE_PROCESS = 0x02, /*!< CRYP peripheral is in processing phase */ 101 HAL_CRYP_PHASE_START = 0x03, /*!< CRYP peripheral has been initialized but 102 GCM/GMAC(/CMAC)(/CCM) initialization phase has not started */ 103 HAL_CRYP_PHASE_INIT_OVER = 0x04, /*!< GCM/GMAC(/CMAC)(/CCM) init phase has been carried out */ 104 HAL_CRYP_PHASE_HEADER_OVER = 0x05, /*!< GCM/GMAC(/CMAC)(/CCM) header phase has been carried out */ 105 HAL_CRYP_PHASE_PAYLOAD_OVER = 0x06, /*!< GCM(/CCM) payload phase has been carried out */ 106 HAL_CRYP_PHASE_FINAL_OVER = 0x07, /*!< GCM/GMAC(/CMAC)(/CCM) final phase has been carried out */ 107 HAL_CRYP_PHASE_HEADER_SUSPENDED = 0x08, /*!< GCM/GMAC(/CMAC)(/CCM) header phase has been suspended */ 108 HAL_CRYP_PHASE_PAYLOAD_SUSPENDED = 0x09, /*!< GCM(/CCM) payload phase has been suspended */ 109 HAL_CRYP_PHASE_NOT_USED = 0x0a /*!< Phase is irrelevant to the current chaining mode */ 110 }HAL_PhaseTypeDef; 111 112 /** 113 * @brief HAL CRYP mode suspend definitions 114 */ 115 typedef enum 116 { 117 HAL_CRYP_SUSPEND_NONE = 0x00, /*!< CRYP peripheral suspension not requested */ 118 HAL_CRYP_SUSPEND = 0x01 /*!< CRYP peripheral suspension requested */ 119 }HAL_SuspendTypeDef; 120 121 122 /** 123 * @brief HAL CRYP Error Codes definition 124 */ 125 #define HAL_CRYP_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ 126 #define HAL_CRYP_WRITE_ERROR ((uint32_t)0x00000001) /*!< Write error */ 127 #define HAL_CRYP_READ_ERROR ((uint32_t)0x00000002) /*!< Read error */ 128 #define HAL_CRYP_DMA_ERROR ((uint32_t)0x00000004) /*!< DMA error */ 129 #define HAL_CRYP_BUSY_ERROR ((uint32_t)0x00000008) /*!< Busy flag error */ 130 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 131 #define HAL_CRYP_ERROR_INVALID_CALLBACK ((uint32_t)0x00000010U) /*!< Invalid Callback error */ 132 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 133 134 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 135 /** 136 * @brief HAL CRYP common Callback ID enumeration definition 137 */ 138 typedef enum 139 { 140 HAL_CRYP_INPUTCPLT_CB_ID = 0x01U, /*!< CRYP input DMA transfer completion callback ID */ 141 HAL_CRYP_OUTPUTCPLT_CB_ID = 0x02U, /*!< CRYP output DMA transfer completion callback ID */ 142 HAL_CRYP_COMPCPLT_CB_ID = 0x03U, /*!< CRYP computation completion callback ID */ 143 HAL_CRYP_ERROR_CB_ID = 0x04U, /*!< CRYP error callback ID */ 144 HAL_CRYP_MSPINIT_CB_ID = 0x05U, /*!< CRYP MspInit callback ID */ 145 HAL_CRYP_MSPDEINIT_CB_ID = 0x06U, /*!< CRYP MspDeInit callback ID */ 146 }HAL_CRYP_CallbackIDTypeDef; 147 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 148 149 /** 150 * @brief CRYP handle Structure definition 151 */ 152 typedef struct __CRYP_HandleTypeDef 153 { 154 AES_TypeDef *Instance; /*!< Register base address */ 155 156 CRYP_InitTypeDef Init; /*!< CRYP initialization parameters */ 157 158 uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) input buffer */ 159 160 uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) output buffer */ 161 162 uint32_t CrypInCount; /*!< Input data size in bytes or, after suspension, the remaining 163 number of bytes to process */ 164 165 uint32_t CrypOutCount; /*!< Output data size in bytes */ 166 167 HAL_PhaseTypeDef Phase; /*!< CRYP peripheral processing phase for GCM, GMAC, CMAC (when applicable) 168 or CCM (when applicable) modes. 169 Indicates the last phase carried out to ease 170 phase transitions */ 171 172 DMA_HandleTypeDef *hdmain; /*!< CRYP peripheral Input DMA handle parameters */ 173 174 DMA_HandleTypeDef *hdmaout; /*!< CRYP peripheral Output DMA handle parameters */ 175 176 HAL_LockTypeDef Lock; /*!< CRYP locking object */ 177 178 __IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */ 179 180 __IO uint32_t ErrorCode; /*!< CRYP peripheral error code */ 181 182 HAL_SuspendTypeDef SuspendRequest; /*!< CRYP peripheral suspension request flag */ 183 184 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 185 void (* InCpltCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP input DMA transfer completion callback */ 186 187 void (* OutCpltCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP output DMA transfer completion callback */ 188 189 void (* CompCpltCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP computation completion callback */ 190 191 void (* ErrorCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP error callback */ 192 193 void (* MspInitCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP Msp Init callback */ 194 195 void (* MspDeInitCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP Msp DeInit callback */ 196 197 #endif /* (USE_HAL_CRYP_REGISTER_CALLBACKS) */ 198 }CRYP_HandleTypeDef; 199 200 201 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 202 /** 203 * @brief HAL CRYP Callback pointer definition 204 */ 205 typedef void (*pCRYP_CallbackTypeDef)(CRYP_HandleTypeDef * hcryp); /*!< pointer to a CRYP common callback functions */ 206 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 207 /** 208 * @} 209 */ 210 211 212 /* Exported constants --------------------------------------------------------*/ 213 /** @defgroup CRYP_Exported_Constants CRYP Exported Constants 214 * @{ 215 */ 216 217 /** @defgroup CRYP_Key_Size Key size selection 218 * @{ 219 */ 220 #define CRYP_KEYSIZE_128B ((uint32_t)0x00000000) /*!< 128-bit long key */ 221 #define CRYP_KEYSIZE_256B AES_CR_KEYSIZE /*!< 256-bit long key */ 222 /** 223 * @} 224 */ 225 226 /** @defgroup CRYP_Data_Type AES Data Type selection 227 * @{ 228 */ 229 #define CRYP_DATATYPE_32B ((uint32_t)0x00000000) /*!< 32-bit data type (no swapping) */ 230 #define CRYP_DATATYPE_16B AES_CR_DATATYPE_0 /*!< 16-bit data type (half-word swapping) */ 231 #define CRYP_DATATYPE_8B AES_CR_DATATYPE_1 /*!< 8-bit data type (byte swapping) */ 232 #define CRYP_DATATYPE_1B AES_CR_DATATYPE /*!< 1-bit data type (bit swapping) */ 233 /** 234 * @} 235 */ 236 237 /** @defgroup CRYP_AES_State AES Enable state 238 * @{ 239 */ 240 #define CRYP_AES_DISABLE ((uint32_t)0x00000000) /*!< Disable AES */ 241 #define CRYP_AES_ENABLE AES_CR_EN /*!< Enable AES */ 242 /** 243 * @} 244 */ 245 246 /** @defgroup CRYP_AES_OperatingMode AES operating mode 247 * @{ 248 */ 249 #define CRYP_ALGOMODE_ENCRYPT ((uint32_t)0x00000000) /*!< Encryption mode */ 250 #define CRYP_ALGOMODE_KEYDERIVATION AES_CR_MODE_0 /*!< Key derivation mode */ 251 #define CRYP_ALGOMODE_DECRYPT AES_CR_MODE_1 /*!< Decryption */ 252 #define CRYP_ALGOMODE_KEYDERIVATION_DECRYPT AES_CR_MODE /*!< Key derivation and decryption */ 253 #define CRYP_ALGOMODE_TAG_GENERATION ((uint32_t)0x00000000) /*!< GMAC or CMAC (when applicable) authentication tag generation */ 254 /** 255 * @} 256 */ 257 258 /** @defgroup CRYP_AES_ChainingMode AES chaining mode 259 * @{ 260 */ 261 #define CRYP_CHAINMODE_AES_ECB ((uint32_t)0x00000000) /*!< Electronic codebook chaining algorithm */ 262 #define CRYP_CHAINMODE_AES_CBC AES_CR_CHMOD_0 /*!< Cipher block chaining algorithm */ 263 #define CRYP_CHAINMODE_AES_CTR AES_CR_CHMOD_1 /*!< Counter mode chaining algorithm */ 264 #define CRYP_CHAINMODE_AES_GCM_GMAC (AES_CR_CHMOD_0 | AES_CR_CHMOD_1) /*!< Galois counter mode - Galois message authentication code */ 265 #if defined(AES_CR_NPBLB) 266 #define CRYP_CHAINMODE_AES_CCM AES_CR_CHMOD_2 /*!< Counter with Cipher Mode */ 267 #else 268 #define CRYP_CHAINMODE_AES_CMAC AES_CR_CHMOD_2 /*!< Cipher message authentication code */ 269 #endif 270 /** 271 * @} 272 */ 273 274 /** @defgroup CRYP_Key_Write AES decryption key write-up flag 275 * @{ 276 */ 277 #define CRYP_KEY_WRITE_ENABLE ((uint32_t)0x00000000) /*!< Enable decryption key writing */ 278 #define CRYP_KEY_WRITE_DISABLE ((uint32_t)0x00000001) /*!< Disable decryption key writing */ 279 /** 280 * @} 281 */ 282 283 /** @defgroup CRYP_DMAIN DMA Input phase management enable state 284 * @{ 285 */ 286 #define CRYP_DMAIN_DISABLE ((uint32_t)0x00000000) /*!< Disable DMA Input phase management */ 287 #define CRYP_DMAIN_ENABLE AES_CR_DMAINEN /*!< Enable DMA Input phase management */ 288 /** 289 * @} 290 */ 291 292 /** @defgroup CRYP_DMAOUT DMA Output phase management enable state 293 * @{ 294 */ 295 #define CRYP_DMAOUT_DISABLE ((uint32_t)0x00000000) /*!< Disable DMA Output phase management */ 296 #define CRYP_DMAOUT_ENABLE AES_CR_DMAOUTEN /*!< Enable DMA Output phase management */ 297 /** 298 * @} 299 */ 300 301 302 /** @defgroup CRYP_GCM_CMAC_Phase GCM/GMAC and CCM/CMAC (when applicable) processing phase selection 303 * @{ 304 */ 305 #define CRYP_GCM_INIT_PHASE ((uint32_t)0x00000000) /*!< GCM/GMAC (or CCM) init phase */ 306 #define CRYP_GCMCMAC_HEADER_PHASE AES_CR_GCMPH_0 /*!< GCM/GMAC/CCM/CMAC header phase */ 307 #define CRYP_GCM_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< GCM/CCM payload phase */ 308 #define CRYP_GCMCMAC_FINAL_PHASE AES_CR_GCMPH /*!< GCM/GMAC/CCM/CMAC final phase */ 309 /* Definitions duplication for code readibility's sake: 310 supported or not supported chain modes are not specified for each phase */ 311 #define CRYP_INIT_PHASE ((uint32_t)0x00000000) /*!< Init phase */ 312 #define CRYP_HEADER_PHASE AES_CR_GCMPH_0 /*!< Header phase */ 313 #define CRYP_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< Payload phase */ 314 #define CRYP_FINAL_PHASE AES_CR_GCMPH /*!< Final phase */ 315 /** 316 * @} 317 */ 318 319 /** @defgroup CRYP_Flags AES status flags 320 * @{ 321 */ 322 323 #define CRYP_FLAG_BUSY AES_SR_BUSY /*!< GCM process suspension forbidden */ 324 #define CRYP_FLAG_WRERR AES_SR_WRERR /*!< Write Error */ 325 #define CRYP_FLAG_RDERR AES_SR_RDERR /*!< Read error */ 326 #define CRYP_FLAG_CCF AES_SR_CCF /*!< Computation completed */ 327 /** 328 * @} 329 */ 330 331 /** @defgroup CRYP_Clear_Flags AES clearing flags 332 * @{ 333 */ 334 335 #define CRYP_CCF_CLEAR AES_CR_CCFC /*!< Computation Complete Flag Clear */ 336 #define CRYP_ERR_CLEAR AES_CR_ERRC /*!< Error Flag Clear */ 337 /** 338 * @} 339 */ 340 341 /** @defgroup AES_Interrupts_Enable AES Interrupts Enable bits 342 * @{ 343 */ 344 #define CRYP_IT_CCFIE AES_CR_CCFIE /*!< Computation Complete interrupt enable */ 345 #define CRYP_IT_ERRIE AES_CR_ERRIE /*!< Error interrupt enable */ 346 /** 347 * @} 348 */ 349 350 /** @defgroup CRYP_Interrupts_Flags AES Interrupts flags 351 * @{ 352 */ 353 #define CRYP_IT_WRERR AES_SR_WRERR /*!< Write Error */ 354 #define CRYP_IT_RDERR AES_SR_RDERR /*!< Read Error */ 355 #define CRYP_IT_CCF AES_SR_CCF /*!< Computation completed */ 356 /** 357 * @} 358 */ 359 360 /** 361 * @} 362 */ 363 364 /* Exported macros -----------------------------------------------------------*/ 365 /** @defgroup CRYP_Exported_Macros CRYP Exported Macros 366 * @{ 367 */ 368 369 /** @brief Reset CRYP handle state. 370 * @param __HANDLE__ specifies the CRYP handle. 371 * @retval None 372 */ 373 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 374 #define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) do{\ 375 (__HANDLE__)->State = HAL_CRYP_STATE_RESET;\ 376 (__HANDLE__)->MspInitCallback = NULL; \ 377 (__HANDLE__)->MspDeInitCallback = NULL; \ 378 }while(0) 379 #else 380 #define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET) 381 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 382 383 /** 384 * @brief Enable the CRYP AES peripheral. 385 * @param __HANDLE__ specifies the CRYP handle. 386 * @retval None 387 */ 388 #define __HAL_CRYP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= AES_CR_EN) 389 390 /** 391 * @brief Disable the CRYP AES peripheral. 392 * @param __HANDLE__ specifies the CRYP handle. 393 * @retval None 394 */ 395 #define __HAL_CRYP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~AES_CR_EN) 396 397 /** 398 * @brief Set the algorithm operating mode. 399 * @param __HANDLE__ specifies the CRYP handle. 400 * @param __OPERATING_MODE__ specifies the operating mode 401 * This parameter can be one of the following values: 402 * @arg @ref CRYP_ALGOMODE_ENCRYPT encryption 403 * @arg @ref CRYP_ALGOMODE_KEYDERIVATION key derivation 404 * @arg @ref CRYP_ALGOMODE_DECRYPT decryption 405 * @arg @ref CRYP_ALGOMODE_KEYDERIVATION_DECRYPT key derivation and decryption 406 * @retval None 407 */ 408 #define __HAL_CRYP_SET_OPERATINGMODE(__HANDLE__, __OPERATING_MODE__) MODIFY_REG((__HANDLE__)->Instance->CR, AES_CR_MODE, (__OPERATING_MODE__)) 409 410 411 /** 412 * @brief Set the algorithm chaining mode. 413 * @param __HANDLE__ specifies the CRYP handle. 414 * @param __CHAINING_MODE__ specifies the chaining mode 415 * This parameter can be one of the following values: 416 * @arg @ref CRYP_CHAINMODE_AES_ECB Electronic CodeBook 417 * @arg @ref CRYP_CHAINMODE_AES_CBC Cipher Block Chaining 418 * @arg @ref CRYP_CHAINMODE_AES_CTR CounTeR mode 419 * @arg @ref CRYP_CHAINMODE_AES_GCM_GMAC Galois Counter Mode or Galois Message Authentication Code 420 * @arg @ref CRYP_CHAINMODE_AES_CMAC Cipher Message Authentication Code (or Counter with Cipher Mode when applicable) 421 * @retval None 422 */ 423 #define __HAL_CRYP_SET_CHAININGMODE(__HANDLE__, __CHAINING_MODE__) MODIFY_REG((__HANDLE__)->Instance->CR, AES_CR_CHMOD, (__CHAINING_MODE__)) 424 425 426 427 /** @brief Check whether the specified CRYP status flag is set or not. 428 * @param __HANDLE__ specifies the CRYP handle. 429 * @param __FLAG__ specifies the flag to check. 430 * This parameter can be one of the following values: 431 * @arg @ref CRYP_FLAG_BUSY GCM process suspension forbidden 432 * @arg @ref CRYP_IT_WRERR Write Error 433 * @arg @ref CRYP_IT_RDERR Read Error 434 * @arg @ref CRYP_IT_CCF Computation Complete 435 * @retval The state of __FLAG__ (TRUE or FALSE). 436 */ 437 #define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) 438 439 440 /** @brief Clear the CRYP pending status flag. 441 * @param __HANDLE__ specifies the CRYP handle. 442 * @param __FLAG__ specifies the flag to clear. 443 * This parameter can be one of the following values: 444 * @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear 445 * @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear 446 * @retval None 447 */ 448 #define __HAL_CRYP_CLEAR_FLAG(__HANDLE__, __FLAG__) SET_BIT((__HANDLE__)->Instance->CR, (__FLAG__)) 449 450 451 452 /** @brief Check whether the specified CRYP interrupt source is enabled or not. 453 * @param __HANDLE__ specifies the CRYP handle. 454 * @param __INTERRUPT__ CRYP interrupt source to check 455 * This parameter can be one of the following values: 456 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR) 457 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt 458 * @retval State of interruption (TRUE or FALSE). 459 */ 460 #define __HAL_CRYP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) 461 462 463 /** @brief Check whether the specified CRYP interrupt is set or not. 464 * @param __HANDLE__ specifies the CRYP handle. 465 * @param __INTERRUPT__ specifies the interrupt to check. 466 * This parameter can be one of the following values: 467 * @arg @ref CRYP_IT_WRERR Write Error 468 * @arg @ref CRYP_IT_RDERR Read Error 469 * @arg @ref CRYP_IT_CCF Computation Complete 470 * @retval The state of __INTERRUPT__ (TRUE or FALSE). 471 */ 472 #define __HAL_CRYP_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__)) 473 474 475 476 /** @brief Clear the CRYP pending interrupt. 477 * @param __HANDLE__ specifies the CRYP handle. 478 * @param __INTERRUPT__ specifies the IT to clear. 479 * This parameter can be one of the following values: 480 * @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear 481 * @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear 482 * @retval None 483 */ 484 #define __HAL_CRYP_CLEAR_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) 485 486 487 /** 488 * @brief Enable the CRYP interrupt. 489 * @param __HANDLE__ specifies the CRYP handle. 490 * @param __INTERRUPT__ CRYP Interrupt. 491 * This parameter can be one of the following values: 492 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR) 493 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt 494 * @retval None 495 */ 496 #define __HAL_CRYP_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 497 498 499 /** 500 * @brief Disable the CRYP interrupt. 501 * @param __HANDLE__ specifies the CRYP handle. 502 * @param __INTERRUPT__ CRYP Interrupt. 503 * This parameter can be one of the following values: 504 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR) 505 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt 506 * @retval None 507 */ 508 #define __HAL_CRYP_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 509 510 /** 511 * @} 512 */ 513 514 /* Private macros --------------------------------------------------------*/ 515 /** @addtogroup CRYP_Private_Macros CRYP Private Macros 516 * @{ 517 */ 518 519 /** 520 * @brief Verify the key size length. 521 * @param __KEYSIZE__ Ciphering/deciphering algorithm key size. 522 * @retval SET (__KEYSIZE__ is a valid value) or RESET (__KEYSIZE__ is invalid) 523 */ 524 #define IS_CRYP_KEYSIZE(__KEYSIZE__) (((__KEYSIZE__) == CRYP_KEYSIZE_128B) || \ 525 ((__KEYSIZE__) == CRYP_KEYSIZE_256B)) 526 527 /** 528 * @brief Verify the input data type. 529 * @param __DATATYPE__ Ciphering/deciphering algorithm input data type. 530 * @retval SET (__DATATYPE__ is valid) or RESET (__DATATYPE__ is invalid) 531 */ 532 #define IS_CRYP_DATATYPE(__DATATYPE__) (((__DATATYPE__) == CRYP_DATATYPE_32B) || \ 533 ((__DATATYPE__) == CRYP_DATATYPE_16B) || \ 534 ((__DATATYPE__) == CRYP_DATATYPE_8B) || \ 535 ((__DATATYPE__) == CRYP_DATATYPE_1B)) 536 537 /** 538 * @brief Verify the CRYP AES IP running mode. 539 * @param __MODE__ CRYP AES IP running mode. 540 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 541 */ 542 #define IS_CRYP_AES(__MODE__) (((__MODE__) == CRYP_AES_DISABLE) || \ 543 ((__MODE__) == CRYP_AES_ENABLE)) 544 545 /** 546 * @brief Verify the selected CRYP algorithm. 547 * @param __ALGOMODE__ Selected CRYP algorithm (ciphering, deciphering, key derivation or a combination of the latter). 548 * @retval SET (__ALGOMODE__ is valid) or RESET (__ALGOMODE__ is invalid) 549 */ 550 #define IS_CRYP_ALGOMODE(__ALGOMODE__) (((__ALGOMODE__) == CRYP_ALGOMODE_ENCRYPT) || \ 551 ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION) || \ 552 ((__ALGOMODE__) == CRYP_ALGOMODE_DECRYPT) || \ 553 ((__ALGOMODE__) == CRYP_ALGOMODE_TAG_GENERATION) || \ 554 ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION_DECRYPT)) 555 556 /** 557 * @brief Verify the selected CRYP chaining algorithm. 558 * @param __CHAINMODE__ Selected CRYP chaining algorithm. 559 * @retval SET (__CHAINMODE__ is valid) or RESET (__CHAINMODE__ is invalid) 560 */ 561 #if defined(AES_CR_NPBLB) 562 #define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \ 563 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \ 564 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \ 565 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \ 566 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CCM)) 567 #else 568 #define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \ 569 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \ 570 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \ 571 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \ 572 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CMAC)) 573 #endif 574 575 /** 576 * @brief Verify the deciphering key write option. 577 * @param __WRITE__ deciphering key write option. 578 * @retval SET (__WRITE__ is valid) or RESET (__WRITE__ is invalid) 579 */ 580 #define IS_CRYP_WRITE(__WRITE__) (((__WRITE__) == CRYP_KEY_WRITE_ENABLE) || \ 581 ((__WRITE__) == CRYP_KEY_WRITE_DISABLE)) 582 583 /** 584 * @brief Verify the CRYP input data DMA mode. 585 * @param __MODE__ CRYP input data DMA mode. 586 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 587 */ 588 #define IS_CRYP_DMAIN(__MODE__) (((__MODE__) == CRYP_DMAIN_DISABLE) || \ 589 ((__MODE__) == CRYP_DMAIN_ENABLE)) 590 591 /** 592 * @brief Verify the CRYP output data DMA mode. 593 * @param __MODE__ CRYP output data DMA mode. 594 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 595 */ 596 #define IS_CRYP_DMAOUT(__MODE__) (((__MODE__) == CRYP_DMAOUT_DISABLE) || \ 597 ((__MODE__) == CRYP_DMAOUT_ENABLE)) 598 599 /** 600 * @brief Verify the CRYP AES ciphering/deciphering/authentication algorithm phase. 601 * @param __PHASE__ CRYP AES ciphering/deciphering/authentication algorithm phase. 602 * @retval SET (__PHASE__ is valid) or RESET (__PHASE__ is invalid) 603 */ 604 #define IS_CRYP_GCMCMAC_PHASE(__PHASE__) (((__PHASE__) == CRYP_INIT_PHASE) || \ 605 ((__PHASE__) == CRYP_HEADER_PHASE) || \ 606 ((__PHASE__) == CRYP_PAYLOAD_PHASE) || \ 607 ((__PHASE__) == CRYP_FINAL_PHASE)) 608 609 /** 610 * @} 611 */ 612 613 /* Include CRYP HAL Extended module */ 614 #include "stm32l4xx_hal_cryp_ex.h" 615 616 /* Exported functions --------------------------------------------------------*/ 617 /** @addtogroup CRYP_Exported_Functions CRYP Exported Functions 618 * @{ 619 */ 620 621 /** @addtogroup CRYP_Exported_Functions_Group1 Initialization and deinitialization functions 622 * @{ 623 */ 624 625 /* Initialization/de-initialization functions ********************************/ 626 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp); 627 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp); 628 629 /* MSP initialization/de-initialization functions ****************************/ 630 void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp); 631 void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp); 632 633 /** 634 * @} 635 */ 636 637 /** @addtogroup CRYP_Exported_Functions_Group2 AES processing functions 638 * @{ 639 */ 640 641 /* AES encryption/decryption processing functions ****************************/ 642 643 /* AES encryption/decryption using polling ***********************************/ 644 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); 645 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); 646 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); 647 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); 648 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); 649 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); 650 651 /* AES encryption/decryption using interrupt *********************************/ 652 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 653 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 654 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 655 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 656 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 657 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 658 659 /* AES encryption/decryption using DMA ***************************************/ 660 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 661 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 662 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 663 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 664 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 665 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 666 667 /** 668 * @} 669 */ 670 671 /** @addtogroup CRYP_Exported_Functions_Group3 Callback functions 672 * @{ 673 */ 674 /* CallBack functions ********************************************************/ 675 void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp); 676 void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp); 677 void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp); 678 /* Callbacks Register/UnRegister functions ***********************************/ 679 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 680 HAL_StatusTypeDef HAL_CRYP_RegisterCallback(CRYP_HandleTypeDef *hcryp, HAL_CRYP_CallbackIDTypeDef CallbackID, pCRYP_CallbackTypeDef pCallback); 681 HAL_StatusTypeDef HAL_CRYP_UnRegisterCallback(CRYP_HandleTypeDef *hcryp, HAL_CRYP_CallbackIDTypeDef CallbackID); 682 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 683 684 /** 685 * @} 686 */ 687 688 /** @addtogroup CRYP_Exported_Functions_Group4 CRYP IRQ handler 689 * @{ 690 */ 691 692 /* AES interrupt handling function *******************************************/ 693 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp); 694 695 /** 696 * @} 697 */ 698 699 /** @addtogroup CRYP_Exported_Functions_Group5 Peripheral State functions 700 * @{ 701 */ 702 703 /* Peripheral State functions ************************************************/ 704 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp); 705 uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp); 706 707 /** 708 * @} 709 */ 710 711 /** 712 * @} 713 */ 714 715 /** 716 * @} 717 */ 718 719 #endif /* AES */ 720 721 /** 722 * @} 723 */ 724 725 #ifdef __cplusplus 726 } 727 #endif 728 729 #endif /* STM32L4xx_HAL_CRYP_H */ 730
