1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_can.h 4 * @author MCD Application Team 5 * @brief Header file of CAN HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef STM32L4xx_HAL_CAN_H 38 #define STM32L4xx_HAL_CAN_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 /* Includes ------------------------------------------------------------------*/ 45 #include "stm32l4xx_hal_def.h" 46 47 /** @addtogroup STM32L4xx_HAL_Driver 48 * @{ 49 */ 50 51 #if defined (CAN1) 52 /** @addtogroup CAN 53 * @{ 54 */ 55 56 /* Exported types ------------------------------------------------------------*/ 57 /** @defgroup CAN_Exported_Types CAN Exported Types 58 * @{ 59 */ 60 /** 61 * @brief HAL State structures definition 62 */ 63 typedef enum 64 { 65 HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */ 66 HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */ 67 HAL_CAN_STATE_LISTENING = 0x02U, /*!< CAN receive process is ongoing */ 68 HAL_CAN_STATE_SLEEP_PENDING = 0x03U, /*!< CAN sleep request is pending */ 69 HAL_CAN_STATE_SLEEP_ACTIVE = 0x04U, /*!< CAN sleep mode is active */ 70 HAL_CAN_STATE_ERROR = 0x05U /*!< CAN error state */ 71 72 } HAL_CAN_StateTypeDef; 73 74 /** 75 * @brief CAN init structure definition 76 */ 77 typedef struct 78 { 79 uint32_t Prescaler; /*!< Specifies the length of a time quantum. 80 This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */ 81 82 uint32_t Mode; /*!< Specifies the CAN operating mode. 83 This parameter can be a value of @ref CAN_operating_mode */ 84 85 uint32_t SyncJumpWidth; /*!< Specifies the maximum number of time quanta the CAN hardware 86 is allowed to lengthen or shorten a bit to perform resynchronization. 87 This parameter can be a value of @ref CAN_synchronisation_jump_width */ 88 89 uint32_t TimeSeg1; /*!< Specifies the number of time quanta in Bit Segment 1. 90 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */ 91 92 uint32_t TimeSeg2; /*!< Specifies the number of time quanta in Bit Segment 2. 93 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */ 94 95 FunctionalState TimeTriggeredMode; /*!< Enable or disable the time triggered communication mode. 96 This parameter can be set to ENABLE or DISABLE. */ 97 98 FunctionalState AutoBusOff; /*!< Enable or disable the automatic bus-off management. 99 This parameter can be set to ENABLE or DISABLE. */ 100 101 FunctionalState AutoWakeUp; /*!< Enable or disable the automatic wake-up mode. 102 This parameter can be set to ENABLE or DISABLE. */ 103 104 FunctionalState AutoRetransmission; /*!< Enable or disable the non-automatic retransmission mode. 105 This parameter can be set to ENABLE or DISABLE. */ 106 107 FunctionalState ReceiveFifoLocked; /*!< Enable or disable the Receive FIFO Locked mode. 108 This parameter can be set to ENABLE or DISABLE. */ 109 110 FunctionalState TransmitFifoPriority;/*!< Enable or disable the transmit FIFO priority. 111 This parameter can be set to ENABLE or DISABLE. */ 112 113 } CAN_InitTypeDef; 114 115 /** 116 * @brief CAN filter configuration structure definition 117 */ 118 typedef struct 119 { 120 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit 121 configuration, first one for a 16-bit configuration). 122 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 123 124 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit 125 configuration, second one for a 16-bit configuration). 126 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 127 128 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, 129 according to the mode (MSBs for a 32-bit configuration, 130 first one for a 16-bit configuration). 131 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 132 133 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, 134 according to the mode (LSBs for a 32-bit configuration, 135 second one for a 16-bit configuration). 136 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 137 138 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter. 139 This parameter can be a value of @ref CAN_filter_FIFO */ 140 141 uint32_t FilterBank; /*!< Specifies the filter bank which will be initialized. 142 For single CAN instance(14 dedicated filter banks), 143 this parameter must be a number between Min_Data = 0 and Max_Data = 13. 144 For dual CAN instances(28 filter banks shared), 145 this parameter must be a number between Min_Data = 0 and Max_Data = 27. */ 146 147 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. 148 This parameter can be a value of @ref CAN_filter_mode */ 149 150 uint32_t FilterScale; /*!< Specifies the filter scale. 151 This parameter can be a value of @ref CAN_filter_scale */ 152 153 uint32_t FilterActivation; /*!< Enable or disable the filter. 154 This parameter can be a value of @ref CAN_filter_activation */ 155 156 uint32_t SlaveStartFilterBank; /*!< Select the start filter bank for the slave CAN instance. 157 For single CAN instances, this parameter is meaningless. 158 For dual CAN instances, all filter banks with lower index are assigned to master 159 CAN instance, whereas all filter banks with greater index are assigned to slave 160 CAN instance. 161 This parameter must be a number between Min_Data = 0 and Max_Data = 27. */ 162 163 } CAN_FilterTypeDef; 164 165 /** 166 * @brief CAN Tx message header structure definition 167 */ 168 typedef struct 169 { 170 uint32_t StdId; /*!< Specifies the standard identifier. 171 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */ 172 173 uint32_t ExtId; /*!< Specifies the extended identifier. 174 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */ 175 176 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. 177 This parameter can be a value of @ref CAN_identifier_type */ 178 179 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. 180 This parameter can be a value of @ref CAN_remote_transmission_request */ 181 182 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. 183 This parameter must be a number between Min_Data = 0 and Max_Data = 8. */ 184 185 FunctionalState TransmitGlobalTime; /*!< Specifies whether the timestamp counter value captured on start 186 of frame transmission, is sent in DATA6 and DATA7 replacing pData[6] and pData[7]. 187 @note: Time Triggered Communication Mode must be enabled. 188 @note: DLC must be programmed as 8 bytes, in order these 2 bytes are sent. 189 This parameter can be set to ENABLE or DISABLE. */ 190 191 } CAN_TxHeaderTypeDef; 192 193 /** 194 * @brief CAN Rx message header structure definition 195 */ 196 typedef struct 197 { 198 uint32_t StdId; /*!< Specifies the standard identifier. 199 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */ 200 201 uint32_t ExtId; /*!< Specifies the extended identifier. 202 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */ 203 204 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. 205 This parameter can be a value of @ref CAN_identifier_type */ 206 207 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. 208 This parameter can be a value of @ref CAN_remote_transmission_request */ 209 210 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. 211 This parameter must be a number between Min_Data = 0 and Max_Data = 8. */ 212 213 uint32_t Timestamp; /*!< Specifies the timestamp counter value captured on start of frame reception. 214 @note: Time Triggered Communication Mode must be enabled. 215 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFFFF. */ 216 217 uint32_t FilterMatchIndex; /*!< Specifies the index of matching acceptance filter element. 218 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */ 219 220 } CAN_RxHeaderTypeDef; 221 222 /** 223 * @brief CAN handle Structure definition 224 */ 225 typedef struct __CAN_HandleTypeDef 226 { 227 CAN_TypeDef *Instance; /*!< Register base address */ 228 229 CAN_InitTypeDef Init; /*!< CAN required parameters */ 230 231 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */ 232 233 __IO uint32_t ErrorCode; /*!< CAN Error code. 234 This parameter can be a value of @ref CAN_Error_Code */ 235 236 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 237 void (* TxMailbox0CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 0 complete callback */ 238 void (* TxMailbox1CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 1 complete callback */ 239 void (* TxMailbox2CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 2 complete callback */ 240 void (* TxMailbox0AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 0 abort callback */ 241 void (* TxMailbox1AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 1 abort callback */ 242 void (* TxMailbox2AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 2 abort callback */ 243 void (* RxFifo0MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 msg pending callback */ 244 void (* RxFifo0FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 full callback */ 245 void (* RxFifo1MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 msg pending callback */ 246 void (* RxFifo1FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 full callback */ 247 void (* SleepCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Sleep callback */ 248 void (* WakeUpFromRxMsgCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Wake Up from Rx msg callback */ 249 void (* ErrorCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Error callback */ 250 251 void (* MspInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp Init callback */ 252 void (* MspDeInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp DeInit callback */ 253 254 #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ 255 } CAN_HandleTypeDef; 256 257 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 258 /** 259 * @brief HAL CAN common Callback ID enumeration definition 260 */ 261 typedef enum 262 { 263 HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID = 0x00U, /*!< CAN Tx Mailbox 0 complete callback ID */ 264 HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID = 0x01U, /*!< CAN Tx Mailbox 1 complete callback ID */ 265 HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID = 0x02U, /*!< CAN Tx Mailbox 2 complete callback ID */ 266 HAL_CAN_TX_MAILBOX0_ABORT_CB_ID = 0x03U, /*!< CAN Tx Mailbox 0 abort callback ID */ 267 HAL_CAN_TX_MAILBOX1_ABORT_CB_ID = 0x04U, /*!< CAN Tx Mailbox 1 abort callback ID */ 268 HAL_CAN_TX_MAILBOX2_ABORT_CB_ID = 0x05U, /*!< CAN Tx Mailbox 2 abort callback ID */ 269 HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID = 0x06U, /*!< CAN Rx FIFO 0 message pending callback ID */ 270 HAL_CAN_RX_FIFO0_FULL_CB_ID = 0x07U, /*!< CAN Rx FIFO 0 full callback ID */ 271 HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID = 0x08U, /*!< CAN Rx FIFO 1 message pending callback ID */ 272 HAL_CAN_RX_FIFO1_FULL_CB_ID = 0x09U, /*!< CAN Rx FIFO 1 full callback ID */ 273 HAL_CAN_SLEEP_CB_ID = 0x0AU, /*!< CAN Sleep callback ID */ 274 HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID = 0x0BU, /*!< CAN Wake Up fropm Rx msg callback ID */ 275 HAL_CAN_ERROR_CB_ID = 0x0CU, /*!< CAN Error callback ID */ 276 277 HAL_CAN_MSPINIT_CB_ID = 0x0DU, /*!< CAN MspInit callback ID */ 278 HAL_CAN_MSPDEINIT_CB_ID = 0x0EU, /*!< CAN MspDeInit callback ID */ 279 280 } HAL_CAN_CallbackIDTypeDef; 281 282 /** 283 * @brief HAL CAN Callback pointer definition 284 */ 285 typedef void (*pCAN_CallbackTypeDef)(CAN_HandleTypeDef *hcan); /*!< pointer to a CAN callback function */ 286 287 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 288 /** 289 * @} 290 */ 291 292 /* Exported constants --------------------------------------------------------*/ 293 294 /** @defgroup CAN_Exported_Constants CAN Exported Constants 295 * @{ 296 */ 297 298 /** @defgroup CAN_Error_Code CAN Error Code 299 * @{ 300 */ 301 #define HAL_CAN_ERROR_NONE (0x00000000U) /*!< No error */ 302 #define HAL_CAN_ERROR_EWG (0x00000001U) /*!< Protocol Error Warning */ 303 #define HAL_CAN_ERROR_EPV (0x00000002U) /*!< Error Passive */ 304 #define HAL_CAN_ERROR_BOF (0x00000004U) /*!< Bus-off error */ 305 #define HAL_CAN_ERROR_STF (0x00000008U) /*!< Stuff error */ 306 #define HAL_CAN_ERROR_FOR (0x00000010U) /*!< Form error */ 307 #define HAL_CAN_ERROR_ACK (0x00000020U) /*!< Acknowledgment error */ 308 #define HAL_CAN_ERROR_BR (0x00000040U) /*!< Bit recessive error */ 309 #define HAL_CAN_ERROR_BD (0x00000080U) /*!< Bit dominant error */ 310 #define HAL_CAN_ERROR_CRC (0x00000100U) /*!< CRC error */ 311 #define HAL_CAN_ERROR_RX_FOV0 (0x00000200U) /*!< Rx FIFO0 overrun error */ 312 #define HAL_CAN_ERROR_RX_FOV1 (0x00000400U) /*!< Rx FIFO1 overrun error */ 313 #define HAL_CAN_ERROR_TX_ALST0 (0x00000800U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ 314 #define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /*!< TxMailbox 1 transmit failure due to tranmit error */ 315 #define HAL_CAN_ERROR_TX_ALST1 (0x00002000U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ 316 #define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /*!< TxMailbox 1 transmit failure due to tranmit error */ 317 #define HAL_CAN_ERROR_TX_ALST2 (0x00008000U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ 318 #define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /*!< TxMailbox 1 transmit failure due to tranmit error */ 319 #define HAL_CAN_ERROR_TIMEOUT (0x00020000U) /*!< Timeout error */ 320 #define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U) /*!< Peripheral not initialized */ 321 #define HAL_CAN_ERROR_NOT_READY (0x00080000U) /*!< Peripheral not ready */ 322 #define HAL_CAN_ERROR_NOT_STARTED (0x00100000U) /*!< Peripheral not started */ 323 #define HAL_CAN_ERROR_PARAM (0x00200000U) /*!< Parameter error */ 324 325 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 326 #define HAL_CAN_ERROR_INVALID_CALLBACK (0x00400000U) /*!< Invalid Callback error */ 327 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 328 #define HAL_CAN_ERROR_INTERNAL (0x00800000U) /*!< Internal error */ 329 330 /** 331 * @} 332 */ 333 334 /** @defgroup CAN_InitStatus CAN InitStatus 335 * @{ 336 */ 337 #define CAN_INITSTATUS_FAILED (0x00000000U) /*!< CAN initialization failed */ 338 #define CAN_INITSTATUS_SUCCESS (0x00000001U) /*!< CAN initialization OK */ 339 /** 340 * @} 341 */ 342 343 /** @defgroup CAN_operating_mode CAN Operating Mode 344 * @{ 345 */ 346 #define CAN_MODE_NORMAL (0x00000000U) /*!< Normal mode */ 347 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */ 348 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */ 349 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */ 350 /** 351 * @} 352 */ 353 354 355 /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width 356 * @{ 357 */ 358 #define CAN_SJW_1TQ (0x00000000U) /*!< 1 time quantum */ 359 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */ 360 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */ 361 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */ 362 /** 363 * @} 364 */ 365 366 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1 367 * @{ 368 */ 369 #define CAN_BS1_1TQ (0x00000000U) /*!< 1 time quantum */ 370 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */ 371 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */ 372 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */ 373 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */ 374 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */ 375 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */ 376 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */ 377 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */ 378 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */ 379 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */ 380 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */ 381 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */ 382 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */ 383 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */ 384 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */ 385 /** 386 * @} 387 */ 388 389 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2 390 * @{ 391 */ 392 #define CAN_BS2_1TQ (0x00000000U) /*!< 1 time quantum */ 393 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */ 394 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */ 395 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */ 396 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */ 397 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */ 398 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */ 399 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */ 400 /** 401 * @} 402 */ 403 404 /** @defgroup CAN_filter_mode CAN Filter Mode 405 * @{ 406 */ 407 #define CAN_FILTERMODE_IDMASK (0x00000000U) /*!< Identifier mask mode */ 408 #define CAN_FILTERMODE_IDLIST (0x00000001U) /*!< Identifier list mode */ 409 /** 410 * @} 411 */ 412 413 /** @defgroup CAN_filter_scale CAN Filter Scale 414 * @{ 415 */ 416 #define CAN_FILTERSCALE_16BIT (0x00000000U) /*!< Two 16-bit filters */ 417 #define CAN_FILTERSCALE_32BIT (0x00000001U) /*!< One 32-bit filter */ 418 /** 419 * @} 420 */ 421 422 /** @defgroup CAN_filter_activation CAN Filter Activation 423 * @{ 424 */ 425 #define CAN_FILTER_DISABLE (0x00000000U) /*!< Disable filter */ 426 #define CAN_FILTER_ENABLE (0x00000001U) /*!< Enable filter */ 427 /** 428 * @} 429 */ 430 431 /** @defgroup CAN_filter_FIFO CAN Filter FIFO 432 * @{ 433 */ 434 #define CAN_FILTER_FIFO0 (0x00000000U) /*!< Filter FIFO 0 assignment for filter x */ 435 #define CAN_FILTER_FIFO1 (0x00000001U) /*!< Filter FIFO 1 assignment for filter x */ 436 /** 437 * @} 438 */ 439 440 /** @defgroup CAN_identifier_type CAN Identifier Type 441 * @{ 442 */ 443 #define CAN_ID_STD (0x00000000U) /*!< Standard Id */ 444 #define CAN_ID_EXT (0x00000004U) /*!< Extended Id */ 445 /** 446 * @} 447 */ 448 449 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request 450 * @{ 451 */ 452 #define CAN_RTR_DATA (0x00000000U) /*!< Data frame */ 453 #define CAN_RTR_REMOTE (0x00000002U) /*!< Remote frame */ 454 /** 455 * @} 456 */ 457 458 /** @defgroup CAN_receive_FIFO_number CAN Receive FIFO Number 459 * @{ 460 */ 461 #define CAN_RX_FIFO0 (0x00000000U) /*!< CAN receive FIFO 0 */ 462 #define CAN_RX_FIFO1 (0x00000001U) /*!< CAN receive FIFO 1 */ 463 /** 464 * @} 465 */ 466 467 /** @defgroup CAN_Tx_Mailboxes CAN Tx Mailboxes 468 * @{ 469 */ 470 #define CAN_TX_MAILBOX0 (0x00000001U) /*!< Tx Mailbox 0 */ 471 #define CAN_TX_MAILBOX1 (0x00000002U) /*!< Tx Mailbox 1 */ 472 #define CAN_TX_MAILBOX2 (0x00000004U) /*!< Tx Mailbox 2 */ 473 /** 474 * @} 475 */ 476 477 /** @defgroup CAN_flags CAN Flags 478 * @{ 479 */ 480 /* Transmit Flags */ 481 #define CAN_FLAG_RQCP0 (0x00000500U) /*!< Request complete MailBox 0 flag */ 482 #define CAN_FLAG_TXOK0 (0x00000501U) /*!< Transmission OK MailBox 0 flag */ 483 #define CAN_FLAG_ALST0 (0x00000502U) /*!< Arbitration Lost MailBox 0 flag */ 484 #define CAN_FLAG_TERR0 (0x00000503U) /*!< Transmission error MailBox 0 flag */ 485 #define CAN_FLAG_RQCP1 (0x00000508U) /*!< Request complete MailBox1 flag */ 486 #define CAN_FLAG_TXOK1 (0x00000509U) /*!< Transmission OK MailBox 1 flag */ 487 #define CAN_FLAG_ALST1 (0x0000050AU) /*!< Arbitration Lost MailBox 1 flag */ 488 #define CAN_FLAG_TERR1 (0x0000050BU) /*!< Transmission error MailBox 1 flag */ 489 #define CAN_FLAG_RQCP2 (0x00000510U) /*!< Request complete MailBox2 flag */ 490 #define CAN_FLAG_TXOK2 (0x00000511U) /*!< Transmission OK MailBox 2 flag */ 491 #define CAN_FLAG_ALST2 (0x00000512U) /*!< Arbitration Lost MailBox 2 flag */ 492 #define CAN_FLAG_TERR2 (0x00000513U) /*!< Transmission error MailBox 2 flag */ 493 #define CAN_FLAG_TME0 (0x0000051AU) /*!< Transmit mailbox 0 empty flag */ 494 #define CAN_FLAG_TME1 (0x0000051BU) /*!< Transmit mailbox 1 empty flag */ 495 #define CAN_FLAG_TME2 (0x0000051CU) /*!< Transmit mailbox 2 empty flag */ 496 #define CAN_FLAG_LOW0 (0x0000051DU) /*!< Lowest priority mailbox 0 flag */ 497 #define CAN_FLAG_LOW1 (0x0000051EU) /*!< Lowest priority mailbox 1 flag */ 498 #define CAN_FLAG_LOW2 (0x0000051FU) /*!< Lowest priority mailbox 2 flag */ 499 500 /* Receive Flags */ 501 #define CAN_FLAG_FF0 (0x00000203U) /*!< RX FIFO 0 Full flag */ 502 #define CAN_FLAG_FOV0 (0x00000204U) /*!< RX FIFO 0 Overrun flag */ 503 #define CAN_FLAG_FF1 (0x00000403U) /*!< RX FIFO 1 Full flag */ 504 #define CAN_FLAG_FOV1 (0x00000404U) /*!< RX FIFO 1 Overrun flag */ 505 506 /* Operating Mode Flags */ 507 #define CAN_FLAG_INAK (0x00000100U) /*!< Initialization acknowledge flag */ 508 #define CAN_FLAG_SLAK (0x00000101U) /*!< Sleep acknowledge flag */ 509 #define CAN_FLAG_ERRI (0x00000102U) /*!< Error flag */ 510 #define CAN_FLAG_WKU (0x00000103U) /*!< Wake up interrupt flag */ 511 #define CAN_FLAG_SLAKI (0x00000104U) /*!< Sleep acknowledge interrupt flag */ 512 513 /* Error Flags */ 514 #define CAN_FLAG_EWG (0x00000300U) /*!< Error warning flag */ 515 #define CAN_FLAG_EPV (0x00000301U) /*!< Error passive flag */ 516 #define CAN_FLAG_BOF (0x00000302U) /*!< Bus-Off flag */ 517 /** 518 * @} 519 */ 520 521 522 /** @defgroup CAN_Interrupts CAN Interrupts 523 * @{ 524 */ 525 /* Transmit Interrupt */ 526 #define CAN_IT_TX_MAILBOX_EMPTY ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */ 527 528 /* Receive Interrupts */ 529 #define CAN_IT_RX_FIFO0_MSG_PENDING ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */ 530 #define CAN_IT_RX_FIFO0_FULL ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */ 531 #define CAN_IT_RX_FIFO0_OVERRUN ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */ 532 #define CAN_IT_RX_FIFO1_MSG_PENDING ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */ 533 #define CAN_IT_RX_FIFO1_FULL ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */ 534 #define CAN_IT_RX_FIFO1_OVERRUN ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */ 535 536 /* Operating Mode Interrupts */ 537 #define CAN_IT_WAKEUP ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */ 538 #define CAN_IT_SLEEP_ACK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */ 539 540 /* Error Interrupts */ 541 #define CAN_IT_ERROR_WARNING ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */ 542 #define CAN_IT_ERROR_PASSIVE ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */ 543 #define CAN_IT_BUSOFF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */ 544 #define CAN_IT_LAST_ERROR_CODE ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */ 545 #define CAN_IT_ERROR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */ 546 /** 547 * @} 548 */ 549 550 /** 551 * @} 552 */ 553 554 /* Exported macros -----------------------------------------------------------*/ 555 /** @defgroup CAN_Exported_Macros CAN Exported Macros 556 * @{ 557 */ 558 559 /** @brief Reset CAN handle state 560 * @param __HANDLE__ CAN handle. 561 * @retval None 562 */ 563 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 564 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) do{ \ 565 (__HANDLE__)->State = HAL_CAN_STATE_RESET; \ 566 (__HANDLE__)->MspInitCallback = NULL; \ 567 (__HANDLE__)->MspDeInitCallback = NULL; \ 568 } while(0) 569 #else 570 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET) 571 #endif /*USE_HAL_CAN_REGISTER_CALLBACKS */ 572 573 /** 574 * @brief Enable the specified CAN interrupts. 575 * @param __HANDLE__ CAN handle. 576 * @param __INTERRUPT__ CAN Interrupt sources to enable. 577 * This parameter can be any combination of @arg CAN_Interrupts 578 * @retval None 579 */ 580 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) 581 582 /** 583 * @brief Disable the specified CAN interrupts. 584 * @param __HANDLE__ CAN handle. 585 * @param __INTERRUPT__ CAN Interrupt sources to disable. 586 * This parameter can be any combination of @arg CAN_Interrupts 587 * @retval None 588 */ 589 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) 590 591 /** @brief Check if the specified CAN interrupt source is enabled or disabled. 592 * @param __HANDLE__ specifies the CAN Handle. 593 * @param __INTERRUPT__ specifies the CAN interrupt source to check. 594 * This parameter can be a value of @arg CAN_Interrupts 595 * @retval The state of __IT__ (TRUE or FALSE). 596 */ 597 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) & (__INTERRUPT__)) 598 599 /** @brief Check whether the specified CAN flag is set or not. 600 * @param __HANDLE__ specifies the CAN Handle. 601 * @param __FLAG__ specifies the flag to check. 602 * This parameter can be one of @arg CAN_flags 603 * @retval The state of __FLAG__ (TRUE or FALSE). 604 */ 605 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \ 606 ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 607 (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 608 (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 609 (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 610 (((__FLAG__) >> 8U) == 3U)? ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U) 611 612 /** @brief Clear the specified CAN pending flag. 613 * @param __HANDLE__ specifies the CAN Handle. 614 * @param __FLAG__ specifies the flag to check. 615 * This parameter can be one of the following values: 616 * @arg CAN_FLAG_RQCP0: Request complete MailBox 0 Flag 617 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox 0 Flag 618 * @arg CAN_FLAG_ALST0: Arbitration Lost MailBox 0 Flag 619 * @arg CAN_FLAG_TERR0: Transmission error MailBox 0 Flag 620 * @arg CAN_FLAG_RQCP1: Request complete MailBox 1 Flag 621 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox 1 Flag 622 * @arg CAN_FLAG_ALST1: Arbitration Lost MailBox 1 Flag 623 * @arg CAN_FLAG_TERR1: Transmission error MailBox 1 Flag 624 * @arg CAN_FLAG_RQCP2: Request complete MailBox 2 Flag 625 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox 2 Flag 626 * @arg CAN_FLAG_ALST2: Arbitration Lost MailBox 2 Flag 627 * @arg CAN_FLAG_TERR2: Transmission error MailBox 2 Flag 628 * @arg CAN_FLAG_FF0: RX FIFO 0 Full Flag 629 * @arg CAN_FLAG_FOV0: RX FIFO 0 Overrun Flag 630 * @arg CAN_FLAG_FF1: RX FIFO 1 Full Flag 631 * @arg CAN_FLAG_FOV1: RX FIFO 1 Overrun Flag 632 * @arg CAN_FLAG_WKUI: Wake up Interrupt Flag 633 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Interrupt Flag 634 * @retval None 635 */ 636 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \ 637 ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 638 (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 639 (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 640 (((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U) 641 642 /** 643 * @} 644 */ 645 646 /* Exported functions --------------------------------------------------------*/ 647 /** @addtogroup CAN_Exported_Functions CAN Exported Functions 648 * @{ 649 */ 650 651 /** @addtogroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions 652 * @brief Initialization and Configuration functions 653 * @{ 654 */ 655 656 /* Initialization and de-initialization functions *****************************/ 657 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan); 658 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan); 659 void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan); 660 void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan); 661 662 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 663 /* Callbacks Register/UnRegister functions ***********************************/ 664 HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID, void (* pCallback)(CAN_HandleTypeDef *_hcan)); 665 HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID); 666 667 #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ 668 /** 669 * @} 670 */ 671 672 /** @addtogroup CAN_Exported_Functions_Group2 Configuration functions 673 * @brief Configuration functions 674 * @{ 675 */ 676 677 /* Configuration functions ****************************************************/ 678 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig); 679 680 /** 681 * @} 682 */ 683 684 /** @addtogroup CAN_Exported_Functions_Group3 Control functions 685 * @brief Control functions 686 * @{ 687 */ 688 689 /* Control functions **********************************************************/ 690 HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan); 691 HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan); 692 HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan); 693 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan); 694 uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan); 695 HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox); 696 HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes); 697 uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan); 698 uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes); 699 uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox); 700 HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]); 701 uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo); 702 703 /** 704 * @} 705 */ 706 707 /** @addtogroup CAN_Exported_Functions_Group4 Interrupts management 708 * @brief Interrupts management 709 * @{ 710 */ 711 /* Interrupts management ******************************************************/ 712 HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs); 713 HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs); 714 void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan); 715 716 /** 717 * @} 718 */ 719 720 /** @addtogroup CAN_Exported_Functions_Group5 Callback functions 721 * @brief Callback functions 722 * @{ 723 */ 724 /* Callbacks functions ********************************************************/ 725 726 void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan); 727 void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan); 728 void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan); 729 void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan); 730 void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan); 731 void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan); 732 void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan); 733 void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan); 734 void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan); 735 void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan); 736 void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan); 737 void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan); 738 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan); 739 740 /** 741 * @} 742 */ 743 744 /** @addtogroup CAN_Exported_Functions_Group6 Peripheral State and Error functions 745 * @brief CAN Peripheral State functions 746 * @{ 747 */ 748 /* Peripheral State and Error functions ***************************************/ 749 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan); 750 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan); 751 HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan); 752 753 /** 754 * @} 755 */ 756 757 /** 758 * @} 759 */ 760 761 /* Private types -------------------------------------------------------------*/ 762 /** @defgroup CAN_Private_Types CAN Private Types 763 * @{ 764 */ 765 766 /** 767 * @} 768 */ 769 770 /* Private variables ---------------------------------------------------------*/ 771 /** @defgroup CAN_Private_Variables CAN Private Variables 772 * @{ 773 */ 774 775 /** 776 * @} 777 */ 778 779 /* Private constants ---------------------------------------------------------*/ 780 /** @defgroup CAN_Private_Constants CAN Private Constants 781 * @{ 782 */ 783 #define CAN_FLAG_MASK (0x000000FFU) 784 /** 785 * @} 786 */ 787 788 /* Private Macros -----------------------------------------------------------*/ 789 /** @defgroup CAN_Private_Macros CAN Private Macros 790 * @{ 791 */ 792 793 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ 794 ((MODE) == CAN_MODE_LOOPBACK)|| \ 795 ((MODE) == CAN_MODE_SILENT) || \ 796 ((MODE) == CAN_MODE_SILENT_LOOPBACK)) 797 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ) || \ 798 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ)) 799 #define IS_CAN_BS1(BS1) (((BS1) == CAN_BS1_1TQ) || ((BS1) == CAN_BS1_2TQ) || \ 800 ((BS1) == CAN_BS1_3TQ) || ((BS1) == CAN_BS1_4TQ) || \ 801 ((BS1) == CAN_BS1_5TQ) || ((BS1) == CAN_BS1_6TQ) || \ 802 ((BS1) == CAN_BS1_7TQ) || ((BS1) == CAN_BS1_8TQ) || \ 803 ((BS1) == CAN_BS1_9TQ) || ((BS1) == CAN_BS1_10TQ)|| \ 804 ((BS1) == CAN_BS1_11TQ)|| ((BS1) == CAN_BS1_12TQ)|| \ 805 ((BS1) == CAN_BS1_13TQ)|| ((BS1) == CAN_BS1_14TQ)|| \ 806 ((BS1) == CAN_BS1_15TQ)|| ((BS1) == CAN_BS1_16TQ)) 807 #define IS_CAN_BS2(BS2) (((BS2) == CAN_BS2_1TQ) || ((BS2) == CAN_BS2_2TQ) || \ 808 ((BS2) == CAN_BS2_3TQ) || ((BS2) == CAN_BS2_4TQ) || \ 809 ((BS2) == CAN_BS2_5TQ) || ((BS2) == CAN_BS2_6TQ) || \ 810 ((BS2) == CAN_BS2_7TQ) || ((BS2) == CAN_BS2_8TQ)) 811 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U)) 812 #define IS_CAN_FILTER_ID_HALFWORD(HALFWORD) ((HALFWORD) <= 0xFFFFU) 813 #if defined(CAN2) 814 #define IS_CAN_FILTER_BANK_DUAL(BANK) ((BANK) <= 27U) 815 #endif 816 #define IS_CAN_FILTER_BANK_SINGLE(BANK) ((BANK) <= 13U) 817 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ 818 ((MODE) == CAN_FILTERMODE_IDLIST)) 819 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \ 820 ((SCALE) == CAN_FILTERSCALE_32BIT)) 821 #define IS_CAN_FILTER_ACTIVATION(ACTIVATION) (((ACTIVATION) == CAN_FILTER_DISABLE) || \ 822 ((ACTIVATION) == CAN_FILTER_ENABLE)) 823 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \ 824 ((FIFO) == CAN_FILTER_FIFO1)) 825 #define IS_CAN_TX_MAILBOX(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TX_MAILBOX0 ) || \ 826 ((TRANSMITMAILBOX) == CAN_TX_MAILBOX1 ) || \ 827 ((TRANSMITMAILBOX) == CAN_TX_MAILBOX2 )) 828 #define IS_CAN_TX_MAILBOX_LIST(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= (CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | CAN_TX_MAILBOX2)) 829 #define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU) 830 #define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU) 831 #define IS_CAN_DLC(DLC) ((DLC) <= 8U) 832 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \ 833 ((IDTYPE) == CAN_ID_EXT)) 834 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE)) 835 #define IS_CAN_RX_FIFO(FIFO) (((FIFO) == CAN_RX_FIFO0) || ((FIFO) == CAN_RX_FIFO1)) 836 #define IS_CAN_IT(IT) ((IT) <= (CAN_IT_TX_MAILBOX_EMPTY | CAN_IT_RX_FIFO0_MSG_PENDING | \ 837 CAN_IT_RX_FIFO0_FULL | CAN_IT_RX_FIFO0_OVERRUN | \ 838 CAN_IT_RX_FIFO1_MSG_PENDING | CAN_IT_RX_FIFO1_FULL | \ 839 CAN_IT_RX_FIFO1_OVERRUN | CAN_IT_WAKEUP | \ 840 CAN_IT_SLEEP_ACK | CAN_IT_ERROR_WARNING | \ 841 CAN_IT_ERROR_PASSIVE | CAN_IT_BUSOFF | \ 842 CAN_IT_LAST_ERROR_CODE | CAN_IT_ERROR)) 843 844 /** 845 * @} 846 */ 847 /* End of private macros -----------------------------------------------------*/ 848 849 /** 850 * @} 851 */ 852 853 854 #endif /* CAN1 */ 855 /** 856 * @} 857 */ 858 859 #ifdef __cplusplus 860 } 861 #endif 862 863 #endif /* STM32L4xx_HAL_CAN_H */ 864 865 866 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 867
