1 /** 2 * \file 3 * 4 * \brief Component description for GLOC 5 * 6 * Copyright (c) 2016 Atmel Corporation, 7 * a wholly owned subsidiary of Microchip Technology Inc. 8 * 9 * \asf_license_start 10 * 11 * \page License 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the Licence at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 * 25 * \asf_license_stop 26 * 27 */ 28 29 #ifndef _SAM4L_GLOC_COMPONENT_ 30 #define _SAM4L_GLOC_COMPONENT_ 31 32 /* ========================================================================== */ 33 /** SOFTWARE API DEFINITION FOR GLOC */ 34 /* ========================================================================== */ 35 /** \addtogroup SAM4L_GLOC Glue Logic Controller */ 36 /*@{*/ 37 38 #define GLOC_I7551 39 #define REV_GLOC 0x102 40 41 /* -------- GLOC_CR : (GLOC Offset: 0x00) (R/W 32) LUT Control Register -------- */ 42 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 43 typedef union { 44 struct { 45 uint32_t AEN:4; /*!< bit: 0.. 3 Input mask */ 46 uint32_t :27; /*!< bit: 4..30 Reserved */ 47 uint32_t FILTEN:1; /*!< bit: 31 Filter enable */ 48 } bit; /*!< Structure used for bit access */ 49 uint32_t reg; /*!< Type used for register access */ 50 } GLOC_CR_Type; 51 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 52 53 #define GLOC_CR_OFFSET 0x00 /**< \brief (GLOC_CR offset) Control Register */ 54 #define GLOC_CR_RESETVALUE _U_(0x00000000); /**< \brief (GLOC_CR reset_value) Control Register */ 55 56 #define GLOC_CR_AEN_Pos 0 /**< \brief (GLOC_CR) Input mask */ 57 #define GLOC_CR_AEN_Msk (_U_(0xF) << GLOC_CR_AEN_Pos) 58 #define GLOC_CR_AEN(value) (GLOC_CR_AEN_Msk & ((value) << GLOC_CR_AEN_Pos)) 59 #define GLOC_CR_FILTEN_Pos 31 /**< \brief (GLOC_CR) Filter enable */ 60 #define GLOC_CR_FILTEN (_U_(0x1) << GLOC_CR_FILTEN_Pos) 61 #define GLOC_CR_MASK _U_(0x8000000F) /**< \brief (GLOC_CR) MASK Register */ 62 63 /* -------- GLOC_TRUTH : (GLOC Offset: 0x04) (R/W 32) LUT Truth Register -------- */ 64 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 65 typedef union { 66 struct { 67 uint32_t TRUTH:16; /*!< bit: 0..15 Truth */ 68 uint32_t :16; /*!< bit: 16..31 Reserved */ 69 } bit; /*!< Structure used for bit access */ 70 uint32_t reg; /*!< Type used for register access */ 71 } GLOC_TRUTH_Type; 72 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 73 74 #define GLOC_TRUTH_OFFSET 0x04 /**< \brief (GLOC_TRUTH offset) Truth Register */ 75 #define GLOC_TRUTH_RESETVALUE _U_(0x00000000); /**< \brief (GLOC_TRUTH reset_value) Truth Register */ 76 77 #define GLOC_TRUTH_TRUTH_Pos 0 /**< \brief (GLOC_TRUTH) Truth */ 78 #define GLOC_TRUTH_TRUTH_Msk (_U_(0xFFFF) << GLOC_TRUTH_TRUTH_Pos) 79 #define GLOC_TRUTH_TRUTH(value) (GLOC_TRUTH_TRUTH_Msk & ((value) << GLOC_TRUTH_TRUTH_Pos)) 80 #define GLOC_TRUTH_MASK _U_(0x0000FFFF) /**< \brief (GLOC_TRUTH) MASK Register */ 81 82 /* -------- GLOC_PARAMETER : (GLOC Offset: 0x38) (R/ 32) Parameter Register -------- */ 83 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 84 typedef union { 85 struct { 86 uint32_t LUTS:8; /*!< bit: 0.. 7 LUTs */ 87 uint32_t :24; /*!< bit: 8..31 Reserved */ 88 } bit; /*!< Structure used for bit access */ 89 uint32_t reg; /*!< Type used for register access */ 90 } GLOC_PARAMETER_Type; 91 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 92 93 #define GLOC_PARAMETER_OFFSET 0x38 /**< \brief (GLOC_PARAMETER offset) Parameter Register */ 94 95 #define GLOC_PARAMETER_LUTS_Pos 0 /**< \brief (GLOC_PARAMETER) LUTs */ 96 #define GLOC_PARAMETER_LUTS_Msk (_U_(0xFF) << GLOC_PARAMETER_LUTS_Pos) 97 #define GLOC_PARAMETER_LUTS(value) (GLOC_PARAMETER_LUTS_Msk & ((value) << GLOC_PARAMETER_LUTS_Pos)) 98 #define GLOC_PARAMETER_MASK _U_(0x000000FF) /**< \brief (GLOC_PARAMETER) MASK Register */ 99 100 /* -------- GLOC_VERSION : (GLOC Offset: 0x3C) (R/ 32) Version Register -------- */ 101 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 102 typedef union { 103 struct { 104 uint32_t VERSION:12; /*!< bit: 0..11 Version */ 105 uint32_t :4; /*!< bit: 12..15 Reserved */ 106 uint32_t VARIANT:4; /*!< bit: 16..19 Variant */ 107 uint32_t :12; /*!< bit: 20..31 Reserved */ 108 } bit; /*!< Structure used for bit access */ 109 uint32_t reg; /*!< Type used for register access */ 110 } GLOC_VERSION_Type; 111 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 112 113 #define GLOC_VERSION_OFFSET 0x3C /**< \brief (GLOC_VERSION offset) Version Register */ 114 #define GLOC_VERSION_RESETVALUE _U_(0x00000102); /**< \brief (GLOC_VERSION reset_value) Version Register */ 115 116 #define GLOC_VERSION_VERSION_Pos 0 /**< \brief (GLOC_VERSION) Version */ 117 #define GLOC_VERSION_VERSION_Msk (_U_(0xFFF) << GLOC_VERSION_VERSION_Pos) 118 #define GLOC_VERSION_VERSION(value) (GLOC_VERSION_VERSION_Msk & ((value) << GLOC_VERSION_VERSION_Pos)) 119 #define GLOC_VERSION_VARIANT_Pos 16 /**< \brief (GLOC_VERSION) Variant */ 120 #define GLOC_VERSION_VARIANT_Msk (_U_(0xF) << GLOC_VERSION_VARIANT_Pos) 121 #define GLOC_VERSION_VARIANT(value) (GLOC_VERSION_VARIANT_Msk & ((value) << GLOC_VERSION_VARIANT_Pos)) 122 #define GLOC_VERSION_MASK _U_(0x000F0FFF) /**< \brief (GLOC_VERSION) MASK Register */ 123 124 /** \brief GlocLut hardware registers */ 125 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 126 typedef union { 127 struct { 128 __IO GLOC_CR_Type CR; /**< \brief Offset: 0x00 (R/W 32) Control Register */ 129 __IO GLOC_TRUTH_Type TRUTH; /**< \brief Offset: 0x04 (R/W 32) Truth Register */ 130 } bf; 131 struct { 132 RwReg GLOC_CR; /**< \brief (GLOC Offset: 0x00) Control Register */ 133 RwReg GLOC_TRUTH; /**< \brief (GLOC Offset: 0x04) Truth Register */ 134 } reg; 135 } GlocLut; 136 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 137 138 /** \brief GLOC hardware registers */ 139 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 140 typedef struct { 141 __IO uint32_t Lut[2]; /**< \brief Offset: 0x00 GlocLut groups [LUTS] */ 142 RoReg8 Reserved1[0x28]; 143 __I uint32_t PARAMETER; /**< \brief Offset: 0x38 (R/ 32) Parameter Register */ 144 __I uint32_t VERSION; /**< \brief Offset: 0x3C (R/ 32) Version Register */ 145 } Gloc; 146 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 147 148 /*@}*/ 149 150 #endif /* _SAM4L_GLOC_COMPONENT_ */ 151
