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Searched defs:GPT_SR_IF1_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h12925 #define GPT_SR_IF1_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h15228 #define GPT_SR_IF1_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h20798 #define GPT_SR_IF1_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h20780 #define GPT_SR_IF1_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h19070 #define GPT_SR_IF1_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h22436 #define GPT_SR_IF1_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h20295 #define GPT_SR_IF1_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h23810 #define GPT_SR_IF1_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h23758 #define GPT_SR_IF1_MASK (0x8U) macro
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h14985 #define GPT_SR_IF1_MASK 0x8u macro
/hal_nxp-2.7.6/imx/devices/MCIMX7D/
DMCIMX7D_M4.h20923 #define GPT_SR_IF1_MASK 0x8u macro
/hal_nxp-2.7.6/mcux/devices/MIMX8MM6/
DMIMX8MM6_cm4.h26387 #define GPT_SR_IF1_MASK (0x8U) macro
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/
DMIMXRT1176_cm7.h55021 #define GPT_SR_IF1_MASK (0x8U) macro
DMIMXRT1176_cm4.h55018 #define GPT_SR_IF1_MASK (0x8U) macro