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Searched defs:GPIO_PRT_INTR_CFG_EDGE1_SEL_Msk (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_gpio_v3.h265 #define GPIO_PRT_INTR_CFG_EDGE1_SEL_Msk 0xCUL macro
Dcyip_gpio_v5.h271 #define GPIO_PRT_INTR_CFG_EDGE1_SEL_Msk 0xCUL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_gpio.h264 #define GPIO_PRT_INTR_CFG_EDGE1_SEL_Msk 0xCUL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_gpio.h280 #define GPIO_PRT_INTR_CFG_EDGE1_SEL_Msk 0xCUL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dtviibe_remaps.h1883 #define GPIO_PRT_INTR_CFG_EDGE1_SEL_Msk GPIO_PRT_V2_INTR_CFG_EDGE1_SEL_M… macro