1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include "fsl_gpio.h"
10
11 /*******************************************************************************
12 * Variables
13 ******************************************************************************/
14 static PORT_Type *const s_portBases[] = PORT_BASE_PTRS;
15 static GPIO_Type *const s_gpioBases[] = GPIO_BASE_PTRS;
16
17 #if defined(FSL_FEATURE_SOC_FGPIO_COUNT) && FSL_FEATURE_SOC_FGPIO_COUNT
18
19 #if defined(FSL_FEATURE_PCC_HAS_FGPIO_CLOCK_GATE_CONTROL) && FSL_FEATURE_PCC_HAS_FGPIO_CLOCK_GATE_CONTROL
20
21 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
22 /*! @brief Array to map FGPIO instance number to clock name. */
23 static const clock_ip_name_t s_fgpioClockName[] = FGPIO_CLOCKS;
24 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
25
26 #endif /* FSL_FEATURE_PCC_HAS_FGPIO_CLOCK_GATE_CONTROL */
27
28 #endif /* FSL_FEATURE_SOC_FGPIO_COUNT */
29
30 /*******************************************************************************
31 * Prototypes
32 ******************************************************************************/
33
34 /*!
35 * @brief Gets the GPIO instance according to the GPIO base
36 *
37 * @param base GPIO peripheral base pointer(PTA, PTB, PTC, etc.)
38 * @retval GPIO instance
39 */
40 static uint32_t GPIO_GetInstance(GPIO_Type *base);
41
42 /*******************************************************************************
43 * Code
44 ******************************************************************************/
45
GPIO_GetInstance(GPIO_Type * base)46 static uint32_t GPIO_GetInstance(GPIO_Type *base)
47 {
48 uint32_t instance;
49
50 /* Find the instance index from base address mappings. */
51 for (instance = 0; instance < ARRAY_SIZE(s_gpioBases); instance++)
52 {
53 if (s_gpioBases[instance] == base)
54 {
55 break;
56 }
57 }
58
59 assert(instance < ARRAY_SIZE(s_gpioBases));
60
61 return instance;
62 }
63
GPIO_PinInit(GPIO_Type * base,uint32_t pin,const gpio_pin_config_t * config)64 void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config)
65 {
66 assert(config);
67
68 if (config->pinDirection == kGPIO_DigitalInput)
69 {
70 base->PDDR &= ~(1U << pin);
71 }
72 else
73 {
74 GPIO_WritePinOutput(base, pin, config->outputLogic);
75 base->PDDR |= (1U << pin);
76 }
77 }
78
GPIO_GetPinsInterruptFlags(GPIO_Type * base)79 uint32_t GPIO_GetPinsInterruptFlags(GPIO_Type *base)
80 {
81 uint8_t instance;
82 PORT_Type *portBase;
83 instance = GPIO_GetInstance(base);
84 portBase = s_portBases[instance];
85 return portBase->ISFR;
86 }
87
GPIO_ClearPinsInterruptFlags(GPIO_Type * base,uint32_t mask)88 void GPIO_ClearPinsInterruptFlags(GPIO_Type *base, uint32_t mask)
89 {
90 uint8_t instance;
91 PORT_Type *portBase;
92 instance = GPIO_GetInstance(base);
93 portBase = s_portBases[instance];
94 portBase->ISFR = mask;
95 }
96
97 #if defined(FSL_FEATURE_GPIO_HAS_ATTRIBUTE_CHECKER) && FSL_FEATURE_GPIO_HAS_ATTRIBUTE_CHECKER
GPIO_CheckAttributeBytes(GPIO_Type * base,gpio_checker_attribute_t attribute)98 void GPIO_CheckAttributeBytes(GPIO_Type *base, gpio_checker_attribute_t attribute)
99 {
100 base->GACR = ((uint32_t)attribute << GPIO_GACR_ACB0_SHIFT) | ((uint32_t)attribute << GPIO_GACR_ACB1_SHIFT) |
101 ((uint32_t)attribute << GPIO_GACR_ACB2_SHIFT) | ((uint32_t)attribute << GPIO_GACR_ACB3_SHIFT);
102 }
103 #endif
104
105 #if defined(FSL_FEATURE_SOC_FGPIO_COUNT) && FSL_FEATURE_SOC_FGPIO_COUNT
106
107 /*******************************************************************************
108 * Variables
109 ******************************************************************************/
110 static FGPIO_Type *const s_fgpioBases[] = FGPIO_BASE_PTRS;
111
112 /*******************************************************************************
113 * Prototypes
114 ******************************************************************************/
115 /*!
116 * @brief Gets the FGPIO instance according to the GPIO base
117 *
118 * @param base FGPIO peripheral base pointer(PTA, PTB, PTC, etc.)
119 * @retval FGPIO instance
120 */
121 static uint32_t FGPIO_GetInstance(FGPIO_Type *base);
122
123 /*******************************************************************************
124 * Code
125 ******************************************************************************/
126
FGPIO_GetInstance(FGPIO_Type * base)127 static uint32_t FGPIO_GetInstance(FGPIO_Type *base)
128 {
129 uint32_t instance;
130
131 /* Find the instance index from base address mappings. */
132 for (instance = 0; instance < ARRAY_SIZE(s_fgpioBases); instance++)
133 {
134 if (s_fgpioBases[instance] == base)
135 {
136 break;
137 }
138 }
139
140 assert(instance < ARRAY_SIZE(s_fgpioBases));
141
142 return instance;
143 }
144
145 #if defined(FSL_FEATURE_PCC_HAS_FGPIO_CLOCK_GATE_CONTROL) && FSL_FEATURE_PCC_HAS_FGPIO_CLOCK_GATE_CONTROL
FGPIO_Init(FGPIO_Type * base)146 void FGPIO_Init(FGPIO_Type *base)
147 {
148 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
149 /* Ungate FGPIO periphral clock */
150 CLOCK_EnableClock(s_fgpioClockName[FGPIO_GetInstance(base)]);
151 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
152 }
153 #endif /* FSL_FEATURE_PCC_HAS_FGPIO_CLOCK_GATE_CONTROL */
154
FGPIO_PinInit(FGPIO_Type * base,uint32_t pin,const gpio_pin_config_t * config)155 void FGPIO_PinInit(FGPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config)
156 {
157 assert(config);
158
159 if (config->pinDirection == kGPIO_DigitalInput)
160 {
161 base->PDDR &= ~(1U << pin);
162 }
163 else
164 {
165 FGPIO_WritePinOutput(base, pin, config->outputLogic);
166 base->PDDR |= (1U << pin);
167 }
168 }
169
FGPIO_GetPinsInterruptFlags(FGPIO_Type * base)170 uint32_t FGPIO_GetPinsInterruptFlags(FGPIO_Type *base)
171 {
172 uint8_t instance;
173 instance = FGPIO_GetInstance(base);
174 PORT_Type *portBase;
175 portBase = s_portBases[instance];
176 return portBase->ISFR;
177 }
178
FGPIO_ClearPinsInterruptFlags(FGPIO_Type * base,uint32_t mask)179 void FGPIO_ClearPinsInterruptFlags(FGPIO_Type *base, uint32_t mask)
180 {
181 uint8_t instance;
182 instance = FGPIO_GetInstance(base);
183 PORT_Type *portBase;
184 portBase = s_portBases[instance];
185 portBase->ISFR = mask;
186 }
187
188 #if defined(FSL_FEATURE_FGPIO_HAS_ATTRIBUTE_CHECKER) && FSL_FEATURE_FGPIO_HAS_ATTRIBUTE_CHECKER
FGPIO_CheckAttributeBytes(FGPIO_Type * base,gpio_checker_attribute_t attribute)189 void FGPIO_CheckAttributeBytes(FGPIO_Type *base, gpio_checker_attribute_t attribute)
190 {
191 base->GACR = (attribute << FGPIO_GACR_ACB0_SHIFT) | (attribute << FGPIO_GACR_ACB1_SHIFT) |
192 (attribute << FGPIO_GACR_ACB2_SHIFT) | (attribute << FGPIO_GACR_ACB3_SHIFT);
193 }
194 #endif
195
196 #endif /* FSL_FEATURE_SOC_FGPIO_COUNT */
197
