1  /*
2   * Copyright (c) 2023 Intel Corporation
3   *
4   * SPDX-License-Identifier: BSD-3-Clause
5   */
6  
7  #ifndef _IA_STRUCTS_H_
8  #define _IA_STRUCTS_H_
9  
10  #include <stdint.h>
11  
12  #ifndef __ASSEMBLER__
13  
14  /* GDT entry descriptor */
15  struct gdt_entry {
16  	union {
17  		struct {
18  			uint32_t dword_lo;	/* lower dword */
19  			uint32_t dword_up;	/* upper dword */
20  		};
21  		struct {
22  			uint16_t limit_lw;	/* limit (0:15) */
23  			uint16_t base_addr_lw;	/* base address (0:15) */
24  			uint8_t base_addr_mb;	/* base address (16:23) */
25  			uint8_t flags;		/* flags */
26  			uint8_t limit_ub;	/* limit (16:19) */
27  			uint8_t base_addr_ub;	/* base address (24:31) */
28  		};
29  	};
30  
31  } __attribute__((packed));
32  
33  typedef struct gdt_entry ldt_entry;
34  
35  /* GDT header */
36  struct gdt_header {
37  	uint16_t limit;			/* GDT limit size */
38  	struct gdt_entry *entries;	/* pointer to GDT entries */
39  } __attribute__((packed));
40  
41  /* IDT entry descriptor */
42  struct idt_entry {
43  	union {
44  		struct {
45  			uint32_t dword_lo;	/* lower dword */
46  			uint32_t dword_up;	/* upper dword */
47  		};
48  
49  		struct {
50  			uint16_t offset_lw;	/* offset (0:15) */
51  			uint16_t seg_selector;	/* segment selector */
52  			uint8_t zero;		/* must be set to zero */
53  			uint8_t flags;		/* flags */
54  			uint16_t offset_uw;	/* offset (16:31) */
55  		};
56  	};
57  } __attribute__((packed));
58  
59  /* IDT header */
60  struct idt_header {
61  	uint16_t limit;			/* IDT limit size */
62  	struct idt_entry *entries;	/* pointer to IDT entries */
63  } __attribute__((packed));
64  
65  /* TSS entry descriptor */
66  struct tss_entry {
67  	uint16_t prev_task_link;
68  	uint16_t reserved1;
69  	uint8_t *esp0;
70  	uint16_t ss0;
71  	uint16_t reserved2;
72  	uint8_t *esp1;
73  	uint16_t ss1;
74  	int16_t reserved3;
75  	uint8_t *esp2;
76  	uint16_t ss2;
77  	uint16_t reserved4;
78  	uint32_t cr3;
79  	int32_t eip;
80  	uint32_t eflags;
81  	uint32_t eax;
82  	uint32_t ecx;
83  	int32_t edx;
84  	uint32_t ebx;
85  	uint32_t esp;
86  	uint32_t ebp;
87  	uint32_t esi;
88  	uint32_t edi;
89  	int16_t es;
90  	uint16_t reserved5;
91  	uint16_t cs;
92  	uint16_t reserved6;
93  	uint16_t ss;
94  	uint16_t reserved7;
95  	uint16_t ds;
96  	uint16_t reserved8;
97  	uint16_t fs;
98  	uint16_t reserved9;
99  	uint16_t gs;
100  	uint16_t reserved10;
101  	uint16_t ldt_seg_selector;
102  	uint16_t reserved11;
103  	uint16_t trap_debug;
104  	/* offset from TSS base for I/O perms */
105  	uint16_t iomap_base_addr;
106  } __attribute__((packed));
107  
108  #endif
109  
110  /* code segment flag,  E/R, Present = 1, DPL = 0, Acesssed = 1 */
111  #define GDT_DESC_CODE_FLAGS	(0x9B)
112  
113  /* data segment flag,  R/W, Present = 1, DPL = 0, Acesssed = 1 */
114  #define GDT_DESC_DATA_FLAGS	(0x93)
115  
116  /* TSS segment limit size */
117  #define GDT_DESC_TSS_LIMIT	(0x67)
118  
119  /* TSS segment flag, Present = 1, DPL = 0, Acesssed = 1 */
120  #define GDT_DESC_TSS_FLAGS	(0x89)
121  
122  /* LDT segment flag, Present = 1, DPL = 0 */
123  #define GDT_DESC_LDT_FLAGS	(0x82)
124  
125  /* IDT descriptor flag, Present = 1, DPL = 0, 32-bit interrupt gate */
126  #define IDT_DESC_FLAGS		(0x8E)
127  
128  #define GEN_GDT_DESC_LO(base, limit, flags)                                    \
129  	((((limit) >> 12) & 0xFFFF) | (((base) & 0xFFFF) << 16))
130  
131  #define GEN_GDT_DESC_UP(base, limit, flags)                                    \
132  	((((base) >> 16) & 0xFF) | (((flags) << 8) & 0xFF00) |                 \
133  	(((limit) >> 12) & 0xFF0000) | ((base) & 0xFF000000) | 0xc00000)
134  
135  #define GEN_IDT_DESC_LO(offset, selector, flags)                               \
136  	(((uint32_t)(offset) & 0xFFFF) | (((selector) & 0xFFFF) << 16))
137  
138  #define GEN_IDT_DESC_UP(offset, selector, flags)                               \
139  	(((uint32_t)(offset) & 0xFFFF0000) | (((flags) & 0xFF) << 8))
140  
141  #endif
142