1 /* 2 * Copyright (c) 2021 Antmicro <www.antmicro.com> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_INCLUDE_DRIVERS_FPGA_H_ 8 #define ZEPHYR_INCLUDE_DRIVERS_FPGA_H_ 9 10 #include <errno.h> 11 12 #include <zephyr/types.h> 13 #include <zephyr/sys/util.h> 14 #include <zephyr/device.h> 15 16 #ifdef __cplusplus 17 extern "C" { 18 #endif 19 20 enum FPGA_status { 21 /* Inactive is when the FPGA cannot accept the bitstream 22 * and will not be programmed correctly 23 */ 24 FPGA_STATUS_INACTIVE, 25 /* Active is when the FPGA can accept the bitstream and 26 * can be programmed correctly 27 */ 28 FPGA_STATUS_ACTIVE 29 }; 30 31 typedef enum FPGA_status (*fpga_api_get_status)(const struct device *dev); 32 typedef int (*fpga_api_load)(const struct device *dev, uint32_t *image_ptr, 33 uint32_t img_size); 34 typedef int (*fpga_api_reset)(const struct device *dev); 35 typedef int (*fpga_api_on)(const struct device *dev); 36 typedef int (*fpga_api_off)(const struct device *dev); 37 typedef const char *(*fpga_api_get_info)(const struct device *dev); 38 39 __subsystem struct fpga_driver_api { 40 fpga_api_get_status get_status; 41 fpga_api_reset reset; 42 fpga_api_load load; 43 fpga_api_on on; 44 fpga_api_off off; 45 fpga_api_get_info get_info; 46 }; 47 48 /** 49 * @brief Read the status of FPGA. 50 * 51 * @param dev FPGA device structure. 52 * 53 * @retval 0 if the FPGA is in INACTIVE state. 54 * @retval 1 if the FPGA is in ACTIVE state. 55 */ fpga_get_status(const struct device * dev)56static inline enum FPGA_status fpga_get_status(const struct device *dev) 57 { 58 const struct fpga_driver_api *api = 59 (const struct fpga_driver_api *)dev->api; 60 61 return api->get_status(dev); 62 } 63 64 /** 65 * @brief Reset the FPGA. 66 * 67 * @param dev FPGA device structure. 68 * 69 * @retval 0 if successful. 70 * @retval Failed Otherwise. 71 */ fpga_reset(const struct device * dev)72static inline int fpga_reset(const struct device *dev) 73 { 74 const struct fpga_driver_api *api = 75 (const struct fpga_driver_api *)dev->api; 76 77 return api->reset(dev); 78 } 79 80 /** 81 * @brief Load the bitstream and program the FPGA 82 * 83 * @param dev FPGA device structure. 84 * @param image_ptr Pointer to bitstream. 85 * @param img_size Bitstream size in bytes. 86 * 87 * @retval 0 if successful. 88 * @retval Failed Otherwise. 89 */ fpga_load(const struct device * dev,uint32_t * image_ptr,uint32_t img_size)90static inline int fpga_load(const struct device *dev, uint32_t *image_ptr, 91 uint32_t img_size) 92 { 93 const struct fpga_driver_api *api = 94 (const struct fpga_driver_api *)dev->api; 95 96 return api->load(dev, image_ptr, img_size); 97 } 98 99 /** 100 * @brief Turns on the FPGA. 101 * 102 * @param dev FPGA device structure. 103 * 104 * @retval 0 if successful. 105 * @retval negative errno code on failure. 106 */ fpga_on(const struct device * dev)107static inline int fpga_on(const struct device *dev) 108 { 109 const struct fpga_driver_api *api = 110 (const struct fpga_driver_api *)dev->api; 111 112 if (api->on == NULL) { 113 return -ENOTSUP; 114 } 115 116 return api->on(dev); 117 } 118 119 /** 120 * @brief Returns information about the FPGA. 121 * 122 * @param dev FPGA device structure. 123 * 124 * @return String containing information. 125 */ fpga_get_info(const struct device * dev)126static inline const char *fpga_get_info(const struct device *dev) 127 { 128 const struct fpga_driver_api *api = 129 (const struct fpga_driver_api *)dev->api; 130 131 return api->get_info(dev); 132 } 133 134 /** 135 * @brief Turns off the FPGA. 136 * 137 * @param dev FPGA device structure. 138 * 139 * @retval 0 if successful. 140 * @retval negative errno code on failure. 141 */ fpga_off(const struct device * dev)142static inline int fpga_off(const struct device *dev) 143 { 144 const struct fpga_driver_api *api = 145 (const struct fpga_driver_api *)dev->api; 146 147 if (api->off == NULL) { 148 return -ENOTSUP; 149 } 150 151 return api->off(dev); 152 } 153 154 #ifdef __cplusplus 155 } 156 #endif 157 158 #endif /* ZEPHYR_INCLUDE_DRIVERS_FPGA_H_ */ 159
