1 /**
2   ******************************************************************************
3   * @file    stm32f4xx_hal_fmpi2c.h
4   * @author  MCD Application Team
5   * @brief   Header file of FMPI2C HAL module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2016 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32F4xx_HAL_FMPI2C_H
21 #define STM32F4xx_HAL_FMPI2C_H
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 #if defined(FMPI2C_CR1_PE)
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f4xx_hal_def.h"
30 
31 /** @addtogroup STM32F4xx_HAL_Driver
32   * @{
33   */
34 
35 /** @addtogroup FMPI2C
36   * @{
37   */
38 
39 /* Exported types ------------------------------------------------------------*/
40 /** @defgroup FMPI2C_Exported_Types FMPI2C Exported Types
41   * @{
42   */
43 
44 /** @defgroup FMPI2C_Configuration_Structure_definition FMPI2C Configuration Structure definition
45   * @brief  FMPI2C Configuration Structure definition
46   * @{
47   */
48 typedef struct
49 {
50   uint32_t Timing;              /*!< Specifies the FMPI2C_TIMINGR_register value.
51                                      This parameter calculated by referring to FMPI2C initialization section
52                                      in Reference manual */
53 
54   uint32_t OwnAddress1;         /*!< Specifies the first device own address.
55                                      This parameter can be a 7-bit or 10-bit address. */
56 
57   uint32_t AddressingMode;      /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
58                                      This parameter can be a value of @ref FMPI2C_ADDRESSING_MODE */
59 
60   uint32_t DualAddressMode;     /*!< Specifies if dual addressing mode is selected.
61                                      This parameter can be a value of @ref FMPI2C_DUAL_ADDRESSING_MODE */
62 
63   uint32_t OwnAddress2;         /*!< Specifies the second device own address if dual addressing mode is selected
64                                      This parameter can be a 7-bit address. */
65 
66   uint32_t OwnAddress2Masks;    /*!< Specifies the acknowledge mask address second device own address if dual addressing
67                                      mode is selected.
68                                      This parameter can be a value of @ref FMPI2C_OWN_ADDRESS2_MASKS */
69 
70   uint32_t GeneralCallMode;     /*!< Specifies if general call mode is selected.
71                                      This parameter can be a value of @ref FMPI2C_GENERAL_CALL_ADDRESSING_MODE */
72 
73   uint32_t NoStretchMode;       /*!< Specifies if nostretch mode is selected.
74                                      This parameter can be a value of @ref FMPI2C_NOSTRETCH_MODE */
75 
76 } FMPI2C_InitTypeDef;
77 
78 /**
79   * @}
80   */
81 
82 /** @defgroup HAL_state_structure_definition HAL state structure definition
83   * @brief  HAL State structure definition
84   * @note  HAL FMPI2C State value coding follow below described bitmap :\n
85   *          b7-b6  Error information\n
86   *             00 : No Error\n
87   *             01 : Abort (Abort user request on going)\n
88   *             10 : Timeout\n
89   *             11 : Error\n
90   *          b5     Peripheral initialization status\n
91   *             0  : Reset (peripheral not initialized)\n
92   *             1  : Init done (peripheral initialized and ready to use. HAL FMPI2C Init function called)\n
93   *          b4     (not used)\n
94   *             x  : Should be set to 0\n
95   *          b3\n
96   *             0  : Ready or Busy (No Listen mode ongoing)\n
97   *             1  : Listen (peripheral in Address Listen Mode)\n
98   *          b2     Intrinsic process state\n
99   *             0  : Ready\n
100   *             1  : Busy (peripheral busy with some configuration or internal operations)\n
101   *          b1     Rx state\n
102   *             0  : Ready (no Rx operation ongoing)\n
103   *             1  : Busy (Rx operation ongoing)\n
104   *          b0     Tx state\n
105   *             0  : Ready (no Tx operation ongoing)\n
106   *             1  : Busy (Tx operation ongoing)
107   * @{
108   */
109 typedef enum
110 {
111   HAL_FMPI2C_STATE_RESET             = 0x00U,   /*!< Peripheral is not yet Initialized         */
112   HAL_FMPI2C_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use  */
113   HAL_FMPI2C_STATE_BUSY              = 0x24U,   /*!< An internal process is ongoing            */
114   HAL_FMPI2C_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing      */
115   HAL_FMPI2C_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing         */
116   HAL_FMPI2C_STATE_LISTEN            = 0x28U,   /*!< Address Listen Mode is ongoing            */
117   HAL_FMPI2C_STATE_BUSY_TX_LISTEN    = 0x29U,   /*!< Address Listen Mode and Data Transmission
118                                                  process is ongoing                         */
119   HAL_FMPI2C_STATE_BUSY_RX_LISTEN    = 0x2AU,   /*!< Address Listen Mode and Data Reception
120                                                  process is ongoing                         */
121   HAL_FMPI2C_STATE_ABORT             = 0x60U,   /*!< Abort user request ongoing                */
122 
123 } HAL_FMPI2C_StateTypeDef;
124 
125 /**
126   * @}
127   */
128 
129 /** @defgroup HAL_mode_structure_definition HAL mode structure definition
130   * @brief  HAL Mode structure definition
131   * @note  HAL FMPI2C Mode value coding follow below described bitmap :\n
132   *          b7     (not used)\n
133   *             x  : Should be set to 0\n
134   *          b6\n
135   *             0  : None\n
136   *             1  : Memory (HAL FMPI2C communication is in Memory Mode)\n
137   *          b5\n
138   *             0  : None\n
139   *             1  : Slave (HAL FMPI2C communication is in Slave Mode)\n
140   *          b4\n
141   *             0  : None\n
142   *             1  : Master (HAL FMPI2C communication is in Master Mode)\n
143   *          b3-b2-b1-b0  (not used)\n
144   *             xxxx : Should be set to 0000
145   * @{
146   */
147 typedef enum
148 {
149   HAL_FMPI2C_MODE_NONE               = 0x00U,   /*!< No FMPI2C communication on going             */
150   HAL_FMPI2C_MODE_MASTER             = 0x10U,   /*!< FMPI2C communication is in Master Mode       */
151   HAL_FMPI2C_MODE_SLAVE              = 0x20U,   /*!< FMPI2C communication is in Slave Mode        */
152   HAL_FMPI2C_MODE_MEM                = 0x40U    /*!< FMPI2C communication is in Memory Mode       */
153 
154 } HAL_FMPI2C_ModeTypeDef;
155 
156 /**
157   * @}
158   */
159 
160 /** @defgroup FMPI2C_Error_Code_definition FMPI2C Error Code definition
161   * @brief  FMPI2C Error Code definition
162   * @{
163   */
164 #define HAL_FMPI2C_ERROR_NONE      (0x00000000U)    /*!< No error              */
165 #define HAL_FMPI2C_ERROR_BERR      (0x00000001U)    /*!< BERR error            */
166 #define HAL_FMPI2C_ERROR_ARLO      (0x00000002U)    /*!< ARLO error            */
167 #define HAL_FMPI2C_ERROR_AF        (0x00000004U)    /*!< ACKF error            */
168 #define HAL_FMPI2C_ERROR_OVR       (0x00000008U)    /*!< OVR error             */
169 #define HAL_FMPI2C_ERROR_DMA       (0x00000010U)    /*!< DMA transfer error    */
170 #define HAL_FMPI2C_ERROR_TIMEOUT   (0x00000020U)    /*!< Timeout error         */
171 #define HAL_FMPI2C_ERROR_SIZE      (0x00000040U)    /*!< Size Management error */
172 #define HAL_FMPI2C_ERROR_DMA_PARAM (0x00000080U)    /*!< DMA Parameter Error   */
173 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)
174 #define HAL_FMPI2C_ERROR_INVALID_CALLBACK  (0x00000100U)    /*!< Invalid Callback error */
175 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */
176 #define HAL_FMPI2C_ERROR_INVALID_PARAM     (0x00000200U)    /*!< Invalid Parameters error  */
177 /**
178   * @}
179   */
180 
181 /** @defgroup FMPI2C_handle_Structure_definition FMPI2C handle Structure definition
182   * @brief  FMPI2C handle Structure definition
183   * @{
184   */
185 typedef struct __FMPI2C_HandleTypeDef
186 {
187   FMPI2C_TypeDef                *Instance;      /*!< FMPI2C registers base address                */
188 
189   FMPI2C_InitTypeDef            Init;           /*!< FMPI2C communication parameters              */
190 
191   uint8_t                    *pBuffPtr;      /*!< Pointer to FMPI2C transfer buffer            */
192 
193   uint16_t                   XferSize;       /*!< FMPI2C transfer size                         */
194 
195   __IO uint16_t              XferCount;      /*!< FMPI2C transfer counter                      */
196 
197   __IO uint32_t              XferOptions;    /*!< FMPI2C sequantial transfer options, this parameter can
198                                                   be a value of @ref FMPI2C_XFEROPTIONS */
199 
200   __IO uint32_t              PreviousState;  /*!< FMPI2C communication Previous state          */
201 
202   HAL_StatusTypeDef(*XferISR)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources);
203   /*!< FMPI2C transfer IRQ handler function pointer */
204 
205   DMA_HandleTypeDef          *hdmatx;        /*!< FMPI2C Tx DMA handle parameters              */
206 
207   DMA_HandleTypeDef          *hdmarx;        /*!< FMPI2C Rx DMA handle parameters              */
208 
209 
210   HAL_LockTypeDef            Lock;           /*!< FMPI2C locking object                        */
211 
212   __IO HAL_FMPI2C_StateTypeDef  State;          /*!< FMPI2C communication state                   */
213 
214   __IO HAL_FMPI2C_ModeTypeDef   Mode;           /*!< FMPI2C communication mode                    */
215 
216   __IO uint32_t              ErrorCode;      /*!< FMPI2C Error code                            */
217 
218   __IO uint32_t              AddrEventCount; /*!< FMPI2C Address Event counter                 */
219 
220   __IO uint32_t              Devaddress;     /*!< FMPI2C Target device address                 */
221 
222   __IO uint32_t              Memaddress;     /*!< FMPI2C Target memory address                 */
223 
224 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)
225   void (* MasterTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
226   /*!< FMPI2C Master Tx Transfer completed callback */
227   void (* MasterRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
228   /*!< FMPI2C Master Rx Transfer completed callback */
229   void (* SlaveTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
230   /*!< FMPI2C Slave Tx Transfer completed callback  */
231   void (* SlaveRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
232   /*!< FMPI2C Slave Rx Transfer completed callback  */
233   void (* ListenCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
234   /*!< FMPI2C Listen Complete callback              */
235   void (* MemTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
236   /*!< FMPI2C Memory Tx Transfer completed callback */
237   void (* MemRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
238   /*!< FMPI2C Memory Rx Transfer completed callback */
239   void (* ErrorCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
240   /*!< FMPI2C Error callback                        */
241   void (* AbortCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
242   /*!< FMPI2C Abort callback                        */
243 
244   void (* AddrCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
245   /*!< FMPI2C Slave Address Match callback */
246 
247   void (* MspInitCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
248   /*!< FMPI2C Msp Init callback                     */
249   void (* MspDeInitCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
250   /*!< FMPI2C Msp DeInit callback                   */
251 
252 #endif  /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */
253 } FMPI2C_HandleTypeDef;
254 
255 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)
256 /**
257   * @brief  HAL FMPI2C Callback ID enumeration definition
258   */
259 typedef enum
260 {
261   HAL_FMPI2C_MASTER_TX_COMPLETE_CB_ID      = 0x00U,    /*!< FMPI2C Master Tx Transfer completed callback ID  */
262   HAL_FMPI2C_MASTER_RX_COMPLETE_CB_ID      = 0x01U,    /*!< FMPI2C Master Rx Transfer completed callback ID  */
263   HAL_FMPI2C_SLAVE_TX_COMPLETE_CB_ID       = 0x02U,    /*!< FMPI2C Slave Tx Transfer completed callback ID   */
264   HAL_FMPI2C_SLAVE_RX_COMPLETE_CB_ID       = 0x03U,    /*!< FMPI2C Slave Rx Transfer completed callback ID   */
265   HAL_FMPI2C_LISTEN_COMPLETE_CB_ID         = 0x04U,    /*!< FMPI2C Listen Complete callback ID               */
266   HAL_FMPI2C_MEM_TX_COMPLETE_CB_ID         = 0x05U,    /*!< FMPI2C Memory Tx Transfer callback ID            */
267   HAL_FMPI2C_MEM_RX_COMPLETE_CB_ID         = 0x06U,    /*!< FMPI2C Memory Rx Transfer completed callback ID  */
268   HAL_FMPI2C_ERROR_CB_ID                   = 0x07U,    /*!< FMPI2C Error callback ID                         */
269   HAL_FMPI2C_ABORT_CB_ID                   = 0x08U,    /*!< FMPI2C Abort callback ID                         */
270 
271   HAL_FMPI2C_MSPINIT_CB_ID                 = 0x09U,    /*!< FMPI2C Msp Init callback ID                      */
272   HAL_FMPI2C_MSPDEINIT_CB_ID               = 0x0AU     /*!< FMPI2C Msp DeInit callback ID                    */
273 
274 } HAL_FMPI2C_CallbackIDTypeDef;
275 
276 /**
277   * @brief  HAL FMPI2C Callback pointer definition
278   */
279 typedef  void (*pFMPI2C_CallbackTypeDef)(FMPI2C_HandleTypeDef *hfmpi2c);
280 /*!< pointer to an FMPI2C callback function */
281 typedef  void (*pFMPI2C_AddrCallbackTypeDef)(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection,
282                                              uint16_t AddrMatchCode);
283 /*!< pointer to an FMPI2C Address Match callback function */
284 
285 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */
286 /**
287   * @}
288   */
289 
290 /**
291   * @}
292   */
293 /* Exported constants --------------------------------------------------------*/
294 
295 /** @defgroup FMPI2C_Exported_Constants FMPI2C Exported Constants
296   * @{
297   */
298 
299 /** @defgroup FMPI2C_XFEROPTIONS  FMPI2C Sequential Transfer Options
300   * @{
301   */
302 #define FMPI2C_FIRST_FRAME                 ((uint32_t)FMPI2C_SOFTEND_MODE)
303 #define FMPI2C_FIRST_AND_NEXT_FRAME        ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE))
304 #define FMPI2C_NEXT_FRAME                  ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE))
305 #define FMPI2C_FIRST_AND_LAST_FRAME        ((uint32_t)FMPI2C_AUTOEND_MODE)
306 #define FMPI2C_LAST_FRAME                  ((uint32_t)FMPI2C_AUTOEND_MODE)
307 #define FMPI2C_LAST_FRAME_NO_STOP          ((uint32_t)FMPI2C_SOFTEND_MODE)
308 
309 /* List of XferOptions in usage of :
310  * 1- Restart condition in all use cases (direction change or not)
311  */
312 #define  FMPI2C_OTHER_FRAME                (0x000000AAU)
313 #define  FMPI2C_OTHER_AND_LAST_FRAME       (0x0000AA00U)
314 /**
315   * @}
316   */
317 
318 /** @defgroup FMPI2C_ADDRESSING_MODE FMPI2C Addressing Mode
319   * @{
320   */
321 #define FMPI2C_ADDRESSINGMODE_7BIT         (0x00000001U)
322 #define FMPI2C_ADDRESSINGMODE_10BIT        (0x00000002U)
323 /**
324   * @}
325   */
326 
327 /** @defgroup FMPI2C_DUAL_ADDRESSING_MODE FMPI2C Dual Addressing Mode
328   * @{
329   */
330 #define FMPI2C_DUALADDRESS_DISABLE         (0x00000000U)
331 #define FMPI2C_DUALADDRESS_ENABLE          FMPI2C_OAR2_OA2EN
332 /**
333   * @}
334   */
335 
336 /** @defgroup FMPI2C_OWN_ADDRESS2_MASKS FMPI2C Own Address2 Masks
337   * @{
338   */
339 #define FMPI2C_OA2_NOMASK                  ((uint8_t)0x00U)
340 #define FMPI2C_OA2_MASK01                  ((uint8_t)0x01U)
341 #define FMPI2C_OA2_MASK02                  ((uint8_t)0x02U)
342 #define FMPI2C_OA2_MASK03                  ((uint8_t)0x03U)
343 #define FMPI2C_OA2_MASK04                  ((uint8_t)0x04U)
344 #define FMPI2C_OA2_MASK05                  ((uint8_t)0x05U)
345 #define FMPI2C_OA2_MASK06                  ((uint8_t)0x06U)
346 #define FMPI2C_OA2_MASK07                  ((uint8_t)0x07U)
347 /**
348   * @}
349   */
350 
351 /** @defgroup FMPI2C_GENERAL_CALL_ADDRESSING_MODE FMPI2C General Call Addressing Mode
352   * @{
353   */
354 #define FMPI2C_GENERALCALL_DISABLE         (0x00000000U)
355 #define FMPI2C_GENERALCALL_ENABLE          FMPI2C_CR1_GCEN
356 /**
357   * @}
358   */
359 
360 /** @defgroup FMPI2C_NOSTRETCH_MODE FMPI2C No-Stretch Mode
361   * @{
362   */
363 #define FMPI2C_NOSTRETCH_DISABLE           (0x00000000U)
364 #define FMPI2C_NOSTRETCH_ENABLE            FMPI2C_CR1_NOSTRETCH
365 /**
366   * @}
367   */
368 
369 /** @defgroup FMPI2C_MEMORY_ADDRESS_SIZE FMPI2C Memory Address Size
370   * @{
371   */
372 #define FMPI2C_MEMADD_SIZE_8BIT            (0x00000001U)
373 #define FMPI2C_MEMADD_SIZE_16BIT           (0x00000002U)
374 /**
375   * @}
376   */
377 
378 /** @defgroup FMPI2C_XFERDIRECTION FMPI2C Transfer Direction Master Point of View
379   * @{
380   */
381 #define FMPI2C_DIRECTION_TRANSMIT          (0x00000000U)
382 #define FMPI2C_DIRECTION_RECEIVE           (0x00000001U)
383 /**
384   * @}
385   */
386 
387 /** @defgroup FMPI2C_RELOAD_END_MODE FMPI2C Reload End Mode
388   * @{
389   */
390 #define  FMPI2C_RELOAD_MODE                FMPI2C_CR2_RELOAD
391 #define  FMPI2C_AUTOEND_MODE               FMPI2C_CR2_AUTOEND
392 #define  FMPI2C_SOFTEND_MODE               (0x00000000U)
393 /**
394   * @}
395   */
396 
397 /** @defgroup FMPI2C_START_STOP_MODE FMPI2C Start or Stop Mode
398   * @{
399   */
400 #define  FMPI2C_NO_STARTSTOP               (0x00000000U)
401 #define  FMPI2C_GENERATE_STOP              (uint32_t)(0x80000000U | FMPI2C_CR2_STOP)
402 #define  FMPI2C_GENERATE_START_READ        (uint32_t)(0x80000000U | FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN)
403 #define  FMPI2C_GENERATE_START_WRITE       (uint32_t)(0x80000000U | FMPI2C_CR2_START)
404 /**
405   * @}
406   */
407 
408 /** @defgroup FMPI2C_Interrupt_configuration_definition FMPI2C Interrupt configuration definition
409   * @brief FMPI2C Interrupt definition
410   *        Elements values convention: 0xXXXXXXXX
411   *           - XXXXXXXX  : Interrupt control mask
412   * @{
413   */
414 #define FMPI2C_IT_ERRI                     FMPI2C_CR1_ERRIE
415 #define FMPI2C_IT_TCI                      FMPI2C_CR1_TCIE
416 #define FMPI2C_IT_STOPI                    FMPI2C_CR1_STOPIE
417 #define FMPI2C_IT_NACKI                    FMPI2C_CR1_NACKIE
418 #define FMPI2C_IT_ADDRI                    FMPI2C_CR1_ADDRIE
419 #define FMPI2C_IT_RXI                      FMPI2C_CR1_RXIE
420 #define FMPI2C_IT_TXI                      FMPI2C_CR1_TXIE
421 /**
422   * @}
423   */
424 
425 /** @defgroup FMPI2C_Flag_definition FMPI2C Flag definition
426   * @{
427   */
428 #define FMPI2C_FLAG_TXE                    FMPI2C_ISR_TXE
429 #define FMPI2C_FLAG_TXIS                   FMPI2C_ISR_TXIS
430 #define FMPI2C_FLAG_RXNE                   FMPI2C_ISR_RXNE
431 #define FMPI2C_FLAG_ADDR                   FMPI2C_ISR_ADDR
432 #define FMPI2C_FLAG_AF                     FMPI2C_ISR_NACKF
433 #define FMPI2C_FLAG_STOPF                  FMPI2C_ISR_STOPF
434 #define FMPI2C_FLAG_TC                     FMPI2C_ISR_TC
435 #define FMPI2C_FLAG_TCR                    FMPI2C_ISR_TCR
436 #define FMPI2C_FLAG_BERR                   FMPI2C_ISR_BERR
437 #define FMPI2C_FLAG_ARLO                   FMPI2C_ISR_ARLO
438 #define FMPI2C_FLAG_OVR                    FMPI2C_ISR_OVR
439 #define FMPI2C_FLAG_PECERR                 FMPI2C_ISR_PECERR
440 #define FMPI2C_FLAG_TIMEOUT                FMPI2C_ISR_TIMEOUT
441 #define FMPI2C_FLAG_ALERT                  FMPI2C_ISR_ALERT
442 #define FMPI2C_FLAG_BUSY                   FMPI2C_ISR_BUSY
443 #define FMPI2C_FLAG_DIR                    FMPI2C_ISR_DIR
444 /**
445   * @}
446   */
447 
448 /**
449   * @}
450   */
451 
452 /* Exported macros -----------------------------------------------------------*/
453 
454 /** @defgroup FMPI2C_Exported_Macros FMPI2C Exported Macros
455   * @{
456   */
457 
458 /** @brief Reset FMPI2C handle state.
459   * @param  __HANDLE__ specifies the FMPI2C Handle.
460   * @retval None
461   */
462 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)
463 #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__)                do{                                             \
464                                                                        (__HANDLE__)->State = HAL_FMPI2C_STATE_RESET;  \
465                                                                        (__HANDLE__)->MspInitCallback = NULL;       \
466                                                                        (__HANDLE__)->MspDeInitCallback = NULL;     \
467                                                                      } while(0)
468 #else
469 #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__)                ((__HANDLE__)->State = HAL_FMPI2C_STATE_RESET)
470 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */
471 
472 /** @brief  Enable the specified FMPI2C interrupt.
473   * @param  __HANDLE__ specifies the FMPI2C Handle.
474   * @param  __INTERRUPT__ specifies the interrupt source to enable.
475   *        This parameter can be one of the following values:
476   *            @arg @ref FMPI2C_IT_ERRI  Errors interrupt enable
477   *            @arg @ref FMPI2C_IT_TCI   Transfer complete interrupt enable
478   *            @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable
479   *            @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable
480   *            @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable
481   *            @arg @ref FMPI2C_IT_RXI   RX interrupt enable
482   *            @arg @ref FMPI2C_IT_TXI   TX interrupt enable
483   *
484   * @retval None
485   */
486 #define __HAL_FMPI2C_ENABLE_IT(__HANDLE__, __INTERRUPT__)          ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
487 
488 /** @brief  Disable the specified FMPI2C interrupt.
489   * @param  __HANDLE__ specifies the FMPI2C Handle.
490   * @param  __INTERRUPT__ specifies the interrupt source to disable.
491   *        This parameter can be one of the following values:
492   *            @arg @ref FMPI2C_IT_ERRI  Errors interrupt enable
493   *            @arg @ref FMPI2C_IT_TCI   Transfer complete interrupt enable
494   *            @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable
495   *            @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable
496   *            @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable
497   *            @arg @ref FMPI2C_IT_RXI   RX interrupt enable
498   *            @arg @ref FMPI2C_IT_TXI   TX interrupt enable
499   *
500   * @retval None
501   */
502 #define __HAL_FMPI2C_DISABLE_IT(__HANDLE__, __INTERRUPT__)         ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
503 
504 /** @brief  Check whether the specified FMPI2C interrupt source is enabled or not.
505   * @param  __HANDLE__ specifies the FMPI2C Handle.
506   * @param  __INTERRUPT__ specifies the FMPI2C interrupt source to check.
507   *          This parameter can be one of the following values:
508   *            @arg @ref FMPI2C_IT_ERRI  Errors interrupt enable
509   *            @arg @ref FMPI2C_IT_TCI   Transfer complete interrupt enable
510   *            @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable
511   *            @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable
512   *            @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable
513   *            @arg @ref FMPI2C_IT_RXI   RX interrupt enable
514   *            @arg @ref FMPI2C_IT_TXI   TX interrupt enable
515   *
516   * @retval The new state of __INTERRUPT__ (SET or RESET).
517   */
518 #define __HAL_FMPI2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)      ((((__HANDLE__)->Instance->CR1 & \
519                                                                       (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
520 
521 /** @brief  Check whether the specified FMPI2C flag is set or not.
522   * @param  __HANDLE__ specifies the FMPI2C Handle.
523   * @param  __FLAG__ specifies the flag to check.
524   *        This parameter can be one of the following values:
525   *            @arg @ref FMPI2C_FLAG_TXE     Transmit data register empty
526   *            @arg @ref FMPI2C_FLAG_TXIS    Transmit interrupt status
527   *            @arg @ref FMPI2C_FLAG_RXNE    Receive data register not empty
528   *            @arg @ref FMPI2C_FLAG_ADDR    Address matched (slave mode)
529   *            @arg @ref FMPI2C_FLAG_AF      Acknowledge failure received flag
530   *            @arg @ref FMPI2C_FLAG_STOPF   STOP detection flag
531   *            @arg @ref FMPI2C_FLAG_TC      Transfer complete (master mode)
532   *            @arg @ref FMPI2C_FLAG_TCR     Transfer complete reload
533   *            @arg @ref FMPI2C_FLAG_BERR    Bus error
534   *            @arg @ref FMPI2C_FLAG_ARLO    Arbitration lost
535   *            @arg @ref FMPI2C_FLAG_OVR     Overrun/Underrun
536   *            @arg @ref FMPI2C_FLAG_PECERR  PEC error in reception
537   *            @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag
538   *            @arg @ref FMPI2C_FLAG_ALERT   SMBus alert
539   *            @arg @ref FMPI2C_FLAG_BUSY    Bus busy
540   *            @arg @ref FMPI2C_FLAG_DIR     Transfer direction (slave mode)
541   *
542   * @retval The new state of __FLAG__ (SET or RESET).
543   */
544 #define FMPI2C_FLAG_MASK  (0x0001FFFFU)
545 #define __HAL_FMPI2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \
546                                                        (__FLAG__)) == (__FLAG__)) ? SET : RESET)
547 
548 /** @brief  Clear the FMPI2C pending flags which are cleared by writing 1 in a specific bit.
549   * @param  __HANDLE__ specifies the FMPI2C Handle.
550   * @param  __FLAG__ specifies the flag to clear.
551   *          This parameter can be any combination of the following values:
552   *            @arg @ref FMPI2C_FLAG_TXE     Transmit data register empty
553   *            @arg @ref FMPI2C_FLAG_ADDR    Address matched (slave mode)
554   *            @arg @ref FMPI2C_FLAG_AF      Acknowledge failure received flag
555   *            @arg @ref FMPI2C_FLAG_STOPF   STOP detection flag
556   *            @arg @ref FMPI2C_FLAG_BERR    Bus error
557   *            @arg @ref FMPI2C_FLAG_ARLO    Arbitration lost
558   *            @arg @ref FMPI2C_FLAG_OVR     Overrun/Underrun
559   *            @arg @ref FMPI2C_FLAG_PECERR  PEC error in reception
560   *            @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag
561   *            @arg @ref FMPI2C_FLAG_ALERT   SMBus alert
562   *
563   * @retval None
564   */
565 #define __HAL_FMPI2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == FMPI2C_FLAG_TXE) ? \
566                                                        ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \
567                                                        ((__HANDLE__)->Instance->ICR = (__FLAG__)))
568 
569 /** @brief  Enable the specified FMPI2C peripheral.
570   * @param  __HANDLE__ specifies the FMPI2C Handle.
571   * @retval None
572   */
573 #define __HAL_FMPI2C_ENABLE(__HANDLE__)                         (SET_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))
574 
575 /** @brief  Disable the specified FMPI2C peripheral.
576   * @param  __HANDLE__ specifies the FMPI2C Handle.
577   * @retval None
578   */
579 #define __HAL_FMPI2C_DISABLE(__HANDLE__)                        (CLEAR_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))
580 
581 /** @brief  Generate a Non-Acknowledge FMPI2C peripheral in Slave mode.
582   * @param  __HANDLE__ specifies the FMPI2C Handle.
583   * @retval None
584   */
585 #define __HAL_FMPI2C_GENERATE_NACK(__HANDLE__)                  (SET_BIT((__HANDLE__)->Instance->CR2, FMPI2C_CR2_NACK))
586 /**
587   * @}
588   */
589 
590 /* Include FMPI2C HAL Extended module */
591 #include "stm32f4xx_hal_fmpi2c_ex.h"
592 
593 /* Exported functions --------------------------------------------------------*/
594 /** @addtogroup FMPI2C_Exported_Functions
595   * @{
596   */
597 
598 /** @addtogroup FMPI2C_Exported_Functions_Group1 Initialization and de-initialization functions
599   * @{
600   */
601 /* Initialization and de-initialization functions******************************/
602 HAL_StatusTypeDef HAL_FMPI2C_Init(FMPI2C_HandleTypeDef *hfmpi2c);
603 HAL_StatusTypeDef HAL_FMPI2C_DeInit(FMPI2C_HandleTypeDef *hfmpi2c);
604 void HAL_FMPI2C_MspInit(FMPI2C_HandleTypeDef *hfmpi2c);
605 void HAL_FMPI2C_MspDeInit(FMPI2C_HandleTypeDef *hfmpi2c);
606 
607 /* Callbacks Register/UnRegister functions  ***********************************/
608 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)
609 HAL_StatusTypeDef HAL_FMPI2C_RegisterCallback(FMPI2C_HandleTypeDef *hfmpi2c, HAL_FMPI2C_CallbackIDTypeDef CallbackID,
610                                               pFMPI2C_CallbackTypeDef pCallback);
611 HAL_StatusTypeDef HAL_FMPI2C_UnRegisterCallback(FMPI2C_HandleTypeDef *hfmpi2c, HAL_FMPI2C_CallbackIDTypeDef CallbackID);
612 
613 HAL_StatusTypeDef HAL_FMPI2C_RegisterAddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, pFMPI2C_AddrCallbackTypeDef pCallback);
614 HAL_StatusTypeDef HAL_FMPI2C_UnRegisterAddrCallback(FMPI2C_HandleTypeDef *hfmpi2c);
615 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */
616 /**
617   * @}
618   */
619 
620 /** @addtogroup FMPI2C_Exported_Functions_Group2 Input and Output operation functions
621   * @{
622   */
623 /* IO operation functions  ****************************************************/
624 /******* Blocking mode: Polling */
625 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
626                                              uint16_t Size, uint32_t Timeout);
627 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
628                                             uint16_t Size, uint32_t Timeout);
629 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,
630                                             uint32_t Timeout);
631 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,
632                                            uint32_t Timeout);
633 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,
634                                        uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
635 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,
636                                       uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
637 HAL_StatusTypeDef HAL_FMPI2C_IsDeviceReady(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint32_t Trials,
638                                            uint32_t Timeout);
639 
640 /******* Non-Blocking mode: Interrupt */
641 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
642                                                 uint16_t Size);
643 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
644                                                uint16_t Size);
645 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
646 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
647 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,
648                                           uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
649 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,
650                                          uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
651 
652 HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
653                                                     uint16_t Size, uint32_t XferOptions);
654 HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
655                                                    uint16_t Size, uint32_t XferOptions);
656 HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,
657                                                    uint32_t XferOptions);
658 HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,
659                                                   uint32_t XferOptions);
660 HAL_StatusTypeDef HAL_FMPI2C_EnableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);
661 HAL_StatusTypeDef HAL_FMPI2C_DisableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);
662 HAL_StatusTypeDef HAL_FMPI2C_Master_Abort_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress);
663 
664 /******* Non-Blocking mode: DMA */
665 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
666                                                  uint16_t Size);
667 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
668                                                 uint16_t Size);
669 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
670 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
671 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,
672                                            uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
673 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,
674                                           uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
675 
676 HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
677                                                      uint16_t Size, uint32_t XferOptions);
678 HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
679                                                     uint16_t Size, uint32_t XferOptions);
680 HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,
681                                                     uint32_t XferOptions);
682 HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,
683                                                    uint32_t XferOptions);
684 /**
685   * @}
686   */
687 
688 /** @addtogroup FMPI2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
689   * @{
690   */
691 /******* FMPI2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
692 void HAL_FMPI2C_EV_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);
693 void HAL_FMPI2C_ER_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);
694 void HAL_FMPI2C_MasterTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
695 void HAL_FMPI2C_MasterRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
696 void HAL_FMPI2C_SlaveTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
697 void HAL_FMPI2C_SlaveRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
698 void HAL_FMPI2C_AddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
699 void HAL_FMPI2C_ListenCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
700 void HAL_FMPI2C_MemTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
701 void HAL_FMPI2C_MemRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
702 void HAL_FMPI2C_ErrorCallback(FMPI2C_HandleTypeDef *hfmpi2c);
703 void HAL_FMPI2C_AbortCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
704 /**
705   * @}
706   */
707 
708 /** @addtogroup FMPI2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
709   * @{
710   */
711 /* Peripheral State, Mode and Error functions  *********************************/
712 HAL_FMPI2C_StateTypeDef HAL_FMPI2C_GetState(const FMPI2C_HandleTypeDef *hfmpi2c);
713 HAL_FMPI2C_ModeTypeDef  HAL_FMPI2C_GetMode(const FMPI2C_HandleTypeDef *hfmpi2c);
714 uint32_t             HAL_FMPI2C_GetError(const FMPI2C_HandleTypeDef *hfmpi2c);
715 
716 /**
717   * @}
718   */
719 
720 /**
721   * @}
722   */
723 
724 /* Private constants ---------------------------------------------------------*/
725 /** @defgroup FMPI2C_Private_Constants FMPI2C Private Constants
726   * @{
727   */
728 
729 /**
730   * @}
731   */
732 
733 /* Private macros ------------------------------------------------------------*/
734 /** @defgroup FMPI2C_Private_Macro FMPI2C Private Macros
735   * @{
736   */
737 
738 #define IS_FMPI2C_ADDRESSING_MODE(MODE)    (((MODE) == FMPI2C_ADDRESSINGMODE_7BIT) || \
739                                             ((MODE) == FMPI2C_ADDRESSINGMODE_10BIT))
740 
741 #define IS_FMPI2C_DUAL_ADDRESS(ADDRESS)    (((ADDRESS) == FMPI2C_DUALADDRESS_DISABLE) || \
742                                             ((ADDRESS) == FMPI2C_DUALADDRESS_ENABLE))
743 
744 #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK)  (((MASK) == FMPI2C_OA2_NOMASK)  || \
745                                             ((MASK) == FMPI2C_OA2_MASK01) || \
746                                             ((MASK) == FMPI2C_OA2_MASK02) || \
747                                             ((MASK) == FMPI2C_OA2_MASK03) || \
748                                             ((MASK) == FMPI2C_OA2_MASK04) || \
749                                             ((MASK) == FMPI2C_OA2_MASK05) || \
750                                             ((MASK) == FMPI2C_OA2_MASK06) || \
751                                             ((MASK) == FMPI2C_OA2_MASK07))
752 
753 #define IS_FMPI2C_GENERAL_CALL(CALL)       (((CALL) == FMPI2C_GENERALCALL_DISABLE) || \
754                                             ((CALL) == FMPI2C_GENERALCALL_ENABLE))
755 
756 #define IS_FMPI2C_NO_STRETCH(STRETCH)      (((STRETCH) == FMPI2C_NOSTRETCH_DISABLE) || \
757                                             ((STRETCH) == FMPI2C_NOSTRETCH_ENABLE))
758 
759 #define IS_FMPI2C_MEMADD_SIZE(SIZE)        (((SIZE) == FMPI2C_MEMADD_SIZE_8BIT) || \
760                                             ((SIZE) == FMPI2C_MEMADD_SIZE_16BIT))
761 
762 #define IS_TRANSFER_MODE(MODE)          (((MODE) == FMPI2C_RELOAD_MODE)   || \
763                                          ((MODE) == FMPI2C_AUTOEND_MODE) || \
764                                          ((MODE) == FMPI2C_SOFTEND_MODE))
765 
766 #define IS_TRANSFER_REQUEST(REQUEST)    (((REQUEST) == FMPI2C_GENERATE_STOP)        || \
767                                          ((REQUEST) == FMPI2C_GENERATE_START_READ)  || \
768                                          ((REQUEST) == FMPI2C_GENERATE_START_WRITE) || \
769                                          ((REQUEST) == FMPI2C_NO_STARTSTOP))
770 
771 #define IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(REQUEST)  (((REQUEST) == FMPI2C_FIRST_FRAME)          || \
772                                                       ((REQUEST) == FMPI2C_FIRST_AND_NEXT_FRAME) || \
773                                                       ((REQUEST) == FMPI2C_NEXT_FRAME)           || \
774                                                       ((REQUEST) == FMPI2C_FIRST_AND_LAST_FRAME) || \
775                                                       ((REQUEST) == FMPI2C_LAST_FRAME)           || \
776                                                       ((REQUEST) == FMPI2C_LAST_FRAME_NO_STOP)   || \
777                                                       IS_FMPI2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
778 
779 #define IS_FMPI2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPI2C_OTHER_FRAME)     || \
780                                                            ((REQUEST) == FMPI2C_OTHER_AND_LAST_FRAME))
781 
782 #define FMPI2C_RESET_CR2(__HANDLE__)                 ((__HANDLE__)->Instance->CR2 &= \
783                                                       (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD   | FMPI2C_CR2_HEAD10R | \
784                                                                              FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD  | \
785                                                                              FMPI2C_CR2_RD_WRN)))
786 
787 #define FMPI2C_GET_ADDR_MATCH(__HANDLE__)            ((uint16_t)(((__HANDLE__)->Instance->ISR & FMPI2C_ISR_ADDCODE) \
788                                                                  >> 16U))
789 #define FMPI2C_GET_DIR(__HANDLE__)                   ((uint8_t)(((__HANDLE__)->Instance->ISR & FMPI2C_ISR_DIR) \
790                                                                 >> 16U))
791 #define FMPI2C_GET_STOP_MODE(__HANDLE__)             ((__HANDLE__)->Instance->CR2 & FMPI2C_CR2_AUTOEND)
792 #define FMPI2C_GET_OWN_ADDRESS1(__HANDLE__)          ((uint16_t)((__HANDLE__)->Instance->OAR1 & FMPI2C_OAR1_OA1))
793 #define FMPI2C_GET_OWN_ADDRESS2(__HANDLE__)          ((uint16_t)((__HANDLE__)->Instance->OAR2 & FMPI2C_OAR2_OA2))
794 
795 #define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1)             ((ADDRESS1) <= 0x000003FFU)
796 #define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2)             ((ADDRESS2) <= (uint16_t)0x00FFU)
797 
798 #define FMPI2C_MEM_ADD_MSB(__ADDRESS__)              ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \
799                                                                             (uint16_t)(0xFF00U))) >> 8U)))
800 #define FMPI2C_MEM_ADD_LSB(__ADDRESS__)              ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
801 
802 #define FMPI2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == FMPI2C_ADDRESSINGMODE_7BIT) ? \
803                                                         (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | \
804                                                                     (FMPI2C_CR2_START) | (FMPI2C_CR2_AUTOEND)) & \
805                                                                    (~FMPI2C_CR2_RD_WRN)) : \
806                                                         (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | \
807                                                                     (FMPI2C_CR2_ADD10) | (FMPI2C_CR2_START) | \
808                                                                     (FMPI2C_CR2_AUTOEND)) & (~FMPI2C_CR2_RD_WRN)))
809 
810 #define FMPI2C_CHECK_FLAG(__ISR__, __FLAG__)         ((((__ISR__) & ((__FLAG__) & FMPI2C_FLAG_MASK)) == \
811                                                        ((__FLAG__) & FMPI2C_FLAG_MASK)) ? SET : RESET)
812 #define FMPI2C_CHECK_IT_SOURCE(__CR1__, __IT__)      ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
813 /**
814   * @}
815   */
816 
817 /* Private Functions ---------------------------------------------------------*/
818 /** @defgroup FMPI2C_Private_Functions FMPI2C Private Functions
819   * @{
820   */
821 /* Private functions are defined in stm32f4xx_hal_fmpi2c.c file */
822 /**
823   * @}
824   */
825 
826 /**
827   * @}
828   */
829 
830 /**
831   * @}
832   */
833 
834 #endif /* FMPI2C_CR1_PE */
835 #ifdef __cplusplus
836 }
837 #endif
838 
839 
840 #endif /* STM32F4xx_HAL_FMPI2C_H */
841