1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include "fsl_flexio.h"
10
11 /*******************************************************************************
12 * Definitions
13 ******************************************************************************/
14
15 /*< @brief user configurable flexio handle count. */
16 #define FLEXIO_HANDLE_COUNT 2
17
18 /*******************************************************************************
19 * Variables
20 ******************************************************************************/
21
22 /*< @brief pointer to array of FLEXIO handle. */
23 static void *s_flexioHandle[FLEXIO_HANDLE_COUNT];
24
25 /*< @brief pointer to array of FLEXIO IP types. */
26 static void *s_flexioType[FLEXIO_HANDLE_COUNT];
27
28 /*< @brief pointer to array of FLEXIO Isr. */
29 static flexio_isr_t s_flexioIsr[FLEXIO_HANDLE_COUNT];
30
31 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
32 /*! @brief Pointers to flexio clocks for each instance. */
33 const clock_ip_name_t s_flexioClocks[] = FLEXIO_CLOCKS;
34 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
35
36 /*! @brief Pointers to flexio bases for each instance. */
37 FLEXIO_Type *const s_flexioBases[] = FLEXIO_BASE_PTRS;
38
39 /*******************************************************************************
40 * Codes
41 ******************************************************************************/
42
FLEXIO_GetInstance(FLEXIO_Type * base)43 uint32_t FLEXIO_GetInstance(FLEXIO_Type *base)
44 {
45 uint32_t instance;
46
47 /* Find the instance index from base address mappings. */
48 for (instance = 0; instance < ARRAY_SIZE(s_flexioBases); instance++)
49 {
50 if (s_flexioBases[instance] == base)
51 {
52 break;
53 }
54 }
55
56 assert(instance < ARRAY_SIZE(s_flexioBases));
57
58 return instance;
59 }
60
FLEXIO_Init(FLEXIO_Type * base,const flexio_config_t * userConfig)61 void FLEXIO_Init(FLEXIO_Type *base, const flexio_config_t *userConfig)
62 {
63 uint32_t ctrlReg = 0;
64
65 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
66 CLOCK_EnableClock(s_flexioClocks[FLEXIO_GetInstance(base)]);
67 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
68
69 FLEXIO_Reset(base);
70
71 ctrlReg = base->CTRL;
72 ctrlReg &= ~(FLEXIO_CTRL_DOZEN_MASK | FLEXIO_CTRL_DBGE_MASK | FLEXIO_CTRL_FASTACC_MASK | FLEXIO_CTRL_FLEXEN_MASK);
73 ctrlReg |= (FLEXIO_CTRL_DBGE(userConfig->enableInDebug) | FLEXIO_CTRL_FASTACC(userConfig->enableFastAccess) |
74 FLEXIO_CTRL_FLEXEN(userConfig->enableFlexio));
75 if (!userConfig->enableInDoze)
76 {
77 ctrlReg |= FLEXIO_CTRL_DOZEN_MASK;
78 }
79
80 base->CTRL = ctrlReg;
81 }
82
FLEXIO_Deinit(FLEXIO_Type * base)83 void FLEXIO_Deinit(FLEXIO_Type *base)
84 {
85 FLEXIO_Enable(base, false);
86 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
87 CLOCK_DisableClock(s_flexioClocks[FLEXIO_GetInstance(base)]);
88 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
89 }
90
FLEXIO_GetDefaultConfig(flexio_config_t * userConfig)91 void FLEXIO_GetDefaultConfig(flexio_config_t *userConfig)
92 {
93 assert(userConfig);
94
95 userConfig->enableFlexio = true;
96 userConfig->enableInDoze = false;
97 userConfig->enableInDebug = true;
98 userConfig->enableFastAccess = false;
99 }
100
FLEXIO_Reset(FLEXIO_Type * base)101 void FLEXIO_Reset(FLEXIO_Type *base)
102 {
103 /*do software reset, software reset operation affect all other FLEXIO registers except CTRL*/
104 base->CTRL |= FLEXIO_CTRL_SWRST_MASK;
105 base->CTRL = 0;
106 }
107
FLEXIO_GetShifterBufferAddress(FLEXIO_Type * base,flexio_shifter_buffer_type_t type,uint8_t index)108 uint32_t FLEXIO_GetShifterBufferAddress(FLEXIO_Type *base, flexio_shifter_buffer_type_t type, uint8_t index)
109 {
110 assert(index < FLEXIO_SHIFTBUF_COUNT);
111
112 uint32_t address = 0;
113
114 switch (type)
115 {
116 case kFLEXIO_ShifterBuffer:
117 address = (uint32_t) & (base->SHIFTBUF[index]);
118 break;
119
120 case kFLEXIO_ShifterBufferBitSwapped:
121 address = (uint32_t) & (base->SHIFTBUFBIS[index]);
122 break;
123
124 case kFLEXIO_ShifterBufferByteSwapped:
125 address = (uint32_t) & (base->SHIFTBUFBYS[index]);
126 break;
127
128 case kFLEXIO_ShifterBufferBitByteSwapped:
129 address = (uint32_t) & (base->SHIFTBUFBBS[index]);
130 break;
131
132 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP
133 case kFLEXIO_ShifterBufferNibbleByteSwapped:
134 address = (uint32_t) & (base->SHIFTBUFNBS[index]);
135 break;
136
137 #endif
138 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP
139 case kFLEXIO_ShifterBufferHalfWordSwapped:
140 address = (uint32_t) & (base->SHIFTBUFHWS[index]);
141 break;
142
143 #endif
144 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP
145 case kFLEXIO_ShifterBufferNibbleSwapped:
146 address = (uint32_t) & (base->SHIFTBUFNIS[index]);
147 break;
148
149 #endif
150 default:
151 break;
152 }
153 return address;
154 }
155
FLEXIO_SetShifterConfig(FLEXIO_Type * base,uint8_t index,const flexio_shifter_config_t * shifterConfig)156 void FLEXIO_SetShifterConfig(FLEXIO_Type *base, uint8_t index, const flexio_shifter_config_t *shifterConfig)
157 {
158 base->SHIFTCFG[index] = FLEXIO_SHIFTCFG_INSRC(shifterConfig->inputSource)
159 #if FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH
160 | FLEXIO_SHIFTCFG_PWIDTH(shifterConfig->parallelWidth)
161 #endif /* FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH */
162 | FLEXIO_SHIFTCFG_SSTOP(shifterConfig->shifterStop) |
163 FLEXIO_SHIFTCFG_SSTART(shifterConfig->shifterStart);
164
165 base->SHIFTCTL[index] =
166 FLEXIO_SHIFTCTL_TIMSEL(shifterConfig->timerSelect) | FLEXIO_SHIFTCTL_TIMPOL(shifterConfig->timerPolarity) |
167 FLEXIO_SHIFTCTL_PINCFG(shifterConfig->pinConfig) | FLEXIO_SHIFTCTL_PINSEL(shifterConfig->pinSelect) |
168 FLEXIO_SHIFTCTL_PINPOL(shifterConfig->pinPolarity) | FLEXIO_SHIFTCTL_SMOD(shifterConfig->shifterMode);
169 }
170
FLEXIO_SetTimerConfig(FLEXIO_Type * base,uint8_t index,const flexio_timer_config_t * timerConfig)171 void FLEXIO_SetTimerConfig(FLEXIO_Type *base, uint8_t index, const flexio_timer_config_t *timerConfig)
172 {
173 base->TIMCFG[index] =
174 FLEXIO_TIMCFG_TIMOUT(timerConfig->timerOutput) | FLEXIO_TIMCFG_TIMDEC(timerConfig->timerDecrement) |
175 FLEXIO_TIMCFG_TIMRST(timerConfig->timerReset) | FLEXIO_TIMCFG_TIMDIS(timerConfig->timerDisable) |
176 FLEXIO_TIMCFG_TIMENA(timerConfig->timerEnable) | FLEXIO_TIMCFG_TSTOP(timerConfig->timerStop) |
177 FLEXIO_TIMCFG_TSTART(timerConfig->timerStart);
178
179 base->TIMCMP[index] = FLEXIO_TIMCMP_CMP(timerConfig->timerCompare);
180
181 base->TIMCTL[index] = FLEXIO_TIMCTL_TRGSEL(timerConfig->triggerSelect) |
182 FLEXIO_TIMCTL_TRGPOL(timerConfig->triggerPolarity) |
183 FLEXIO_TIMCTL_TRGSRC(timerConfig->triggerSource) |
184 FLEXIO_TIMCTL_PINCFG(timerConfig->pinConfig) | FLEXIO_TIMCTL_PINSEL(timerConfig->pinSelect) |
185 FLEXIO_TIMCTL_PINPOL(timerConfig->pinPolarity) | FLEXIO_TIMCTL_TIMOD(timerConfig->timerMode);
186 }
187
FLEXIO_RegisterHandleIRQ(void * base,void * handle,flexio_isr_t isr)188 status_t FLEXIO_RegisterHandleIRQ(void *base, void *handle, flexio_isr_t isr)
189 {
190 assert(base);
191 assert(handle);
192 assert(isr);
193
194 uint8_t index = 0;
195
196 /* Find the an empty handle pointer to store the handle. */
197 for (index = 0; index < FLEXIO_HANDLE_COUNT; index++)
198 {
199 if (s_flexioHandle[index] == NULL)
200 {
201 /* Register FLEXIO simulated driver base, handle and isr. */
202 s_flexioType[index] = base;
203 s_flexioHandle[index] = handle;
204 s_flexioIsr[index] = isr;
205 break;
206 }
207 }
208
209 if (index == FLEXIO_HANDLE_COUNT)
210 {
211 return kStatus_OutOfRange;
212 }
213 else
214 {
215 return kStatus_Success;
216 }
217 }
218
FLEXIO_UnregisterHandleIRQ(void * base)219 status_t FLEXIO_UnregisterHandleIRQ(void *base)
220 {
221 assert(base);
222
223 uint8_t index = 0;
224
225 /* Find the index from base address mappings. */
226 for (index = 0; index < FLEXIO_HANDLE_COUNT; index++)
227 {
228 if (s_flexioType[index] == base)
229 {
230 /* Unregister FLEXIO simulated driver handle and isr. */
231 s_flexioType[index] = NULL;
232 s_flexioHandle[index] = NULL;
233 s_flexioIsr[index] = NULL;
234 break;
235 }
236 }
237
238 if (index == FLEXIO_HANDLE_COUNT)
239 {
240 return kStatus_OutOfRange;
241 }
242 else
243 {
244 return kStatus_Success;
245 }
246 }
247
FLEXIO_CommonIRQHandler(void)248 void FLEXIO_CommonIRQHandler(void)
249 {
250 uint8_t index;
251
252 for (index = 0; index < FLEXIO_HANDLE_COUNT; index++)
253 {
254 if (s_flexioHandle[index])
255 {
256 s_flexioIsr[index](s_flexioType[index], s_flexioHandle[index]);
257 }
258 }
259 }
260
FLEXIO_DriverIRQHandler(void)261 void FLEXIO_DriverIRQHandler(void)
262 {
263 FLEXIO_CommonIRQHandler();
264 }
265
FLEXIO0_DriverIRQHandler(void)266 void FLEXIO0_DriverIRQHandler(void)
267 {
268 FLEXIO_CommonIRQHandler();
269 }
270
FLEXIO1_DriverIRQHandler(void)271 void FLEXIO1_DriverIRQHandler(void)
272 {
273 FLEXIO_CommonIRQHandler();
274 }
275
UART2_FLEXIO_DriverIRQHandler(void)276 void UART2_FLEXIO_DriverIRQHandler(void)
277 {
278 FLEXIO_CommonIRQHandler();
279 }
280
