1 /** 2 ****************************************************************************** 3 * @file stm32f1xx_hal_flash_ex.h 4 * @author MCD Application Team 5 * @brief Header file of Flash HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file in 13 * the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 ****************************************************************************** 16 */ 17 18 /* Define to prevent recursive inclusion -------------------------------------*/ 19 #ifndef __STM32F1xx_HAL_FLASH_EX_H 20 #define __STM32F1xx_HAL_FLASH_EX_H 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "stm32f1xx_hal_def.h" 28 29 /** @addtogroup STM32F1xx_HAL_Driver 30 * @{ 31 */ 32 33 /** @addtogroup FLASHEx 34 * @{ 35 */ 36 37 /** @addtogroup FLASHEx_Private_Constants 38 * @{ 39 */ 40 41 #define FLASH_SIZE_DATA_REGISTER 0x1FFFF7E0U 42 #define OBR_REG_INDEX 1U 43 #define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP)) 44 45 /** 46 * @} 47 */ 48 49 /** @addtogroup FLASHEx_Private_Macros 50 * @{ 51 */ 52 53 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || ((VALUE) == FLASH_TYPEERASE_MASSERASE)) 54 55 #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA))) 56 57 #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE)) 58 59 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) || ((LEVEL) == OB_RDP_LEVEL_1)) 60 61 #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1)) 62 63 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) 64 65 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) 66 67 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) 68 69 #if defined(FLASH_BANK2_END) 70 #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET)) 71 #endif /* FLASH_BANK2_END */ 72 73 /* Low Density */ 74 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) 75 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)- 1 <= 0x08007FFFU) : \ 76 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)- 1 <= 0x08003FFFU)) 77 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 78 79 /* Medium Density */ 80 #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) 81 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFFU) : \ 82 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFFU) : \ 83 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFFU) : \ 84 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFFU)))) 85 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ 86 87 /* High Density */ 88 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) 89 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFFU) : \ 90 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFFU) : \ 91 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFFU))) 92 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ 93 94 /* XL Density */ 95 #if defined(FLASH_BANK2_END) 96 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFFU) : \ 97 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFFU)) 98 #endif /* FLASH_BANK2_END */ 99 100 /* Connectivity Line */ 101 #if (defined(STM32F105xC) || defined(STM32F107xC)) 102 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFFU) : \ 103 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFFU) : \ 104 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFFU))) 105 #endif /* STM32F105xC || STM32F107xC */ 106 107 #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000U)) 108 109 #if defined(FLASH_BANK2_END) 110 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ 111 ((BANK) == FLASH_BANK_2) || \ 112 ((BANK) == FLASH_BANK_BOTH)) 113 #else 114 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) 115 #endif /* FLASH_BANK2_END */ 116 117 /* Low Density */ 118 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) 119 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? \ 120 ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFFU))) 121 122 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 123 124 /* Medium Density */ 125 #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) 126 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? \ 127 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? \ 128 ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? \ 129 ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFFU))))) 130 131 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ 132 133 /* High Density */ 134 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) 135 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200U) ? \ 136 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180U) ? \ 137 ((ADDRESS) <= 0x0805FFFFU) : ((ADDRESS) <= 0x0803FFFFU)))) 138 139 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ 140 141 /* XL Density */ 142 #if defined(FLASH_BANK2_END) 143 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400U) ? \ 144 ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFFU))) 145 146 #endif /* FLASH_BANK2_END */ 147 148 /* Connectivity Line */ 149 #if (defined(STM32F105xC) || defined(STM32F107xC)) 150 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? \ 151 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? \ 152 ((ADDRESS) <= 0x0801FFFFU) : ((ADDRESS) <= 0x0800FFFFU)))) 153 154 #endif /* STM32F105xC || STM32F107xC */ 155 156 /** 157 * @} 158 */ 159 160 /* Exported types ------------------------------------------------------------*/ 161 /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types 162 * @{ 163 */ 164 165 /** 166 * @brief FLASH Erase structure definition 167 */ 168 typedef struct 169 { 170 uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase. 171 This parameter can be a value of @ref FLASHEx_Type_Erase */ 172 173 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. 174 This parameter must be a value of @ref FLASHEx_Banks */ 175 176 uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled 177 This parameter must be a number between Min_Data = 0x08000000 and Max_Data = FLASH_BANKx_END 178 (x = 1 or 2 depending on devices)*/ 179 180 uint32_t NbPages; /*!< NbPages: Number of pagess to be erased. 181 This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/ 182 183 } FLASH_EraseInitTypeDef; 184 185 /** 186 * @brief FLASH Options bytes program structure definition 187 */ 188 typedef struct 189 { 190 uint32_t OptionType; /*!< OptionType: Option byte to be configured. 191 This parameter can be a value of @ref FLASHEx_OB_Type */ 192 193 uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. 194 This parameter can be a value of @ref FLASHEx_OB_WRP_State */ 195 196 uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected 197 This parameter can be a value of @ref FLASHEx_OB_Write_Protection */ 198 199 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors. 200 This parameter must be a value of @ref FLASHEx_Banks */ 201 202 uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.. 203 This parameter can be a value of @ref FLASHEx_OB_Read_Protection */ 204 205 #if defined(FLASH_BANK2_END) 206 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: 207 IWDG / STOP / STDBY / BOOT1 208 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, 209 @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1 */ 210 #else 211 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: 212 IWDG / STOP / STDBY 213 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, 214 @ref FLASHEx_OB_nRST_STDBY */ 215 #endif /* FLASH_BANK2_END */ 216 217 uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be programmed 218 This parameter can be a value of @ref FLASHEx_OB_Data_Address */ 219 220 uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA 221 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ 222 } FLASH_OBProgramInitTypeDef; 223 224 /** 225 * @} 226 */ 227 228 /* Exported constants --------------------------------------------------------*/ 229 /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants 230 * @{ 231 */ 232 233 /** @defgroup FLASHEx_Constants FLASH Constants 234 * @{ 235 */ 236 237 /** @defgroup FLASHEx_Page_Size Page Size 238 * @{ 239 */ 240 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) 241 #define FLASH_PAGE_SIZE 0x400U 242 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 243 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 244 245 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)) 246 #define FLASH_PAGE_SIZE 0x800U 247 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 248 /* STM32F101xG || STM32F103xG */ 249 /* STM32F105xC || STM32F107xC */ 250 251 /** 252 * @} 253 */ 254 255 /** @defgroup FLASHEx_Type_Erase Type Erase 256 * @{ 257 */ 258 #define FLASH_TYPEERASE_PAGES 0x00U /*!<Pages erase only*/ 259 #define FLASH_TYPEERASE_MASSERASE 0x02U /*!<Flash mass erase activation*/ 260 261 /** 262 * @} 263 */ 264 265 /** @defgroup FLASHEx_Banks Banks 266 * @{ 267 */ 268 #if defined(FLASH_BANK2_END) 269 #define FLASH_BANK_1 1U /*!< Bank 1 */ 270 #define FLASH_BANK_2 2U /*!< Bank 2 */ 271 #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */ 272 273 #else 274 #define FLASH_BANK_1 1U /*!< Bank 1 */ 275 #endif 276 /** 277 * @} 278 */ 279 280 /** 281 * @} 282 */ 283 284 /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants 285 * @{ 286 */ 287 288 /** @defgroup FLASHEx_OB_Type Option Bytes Type 289 * @{ 290 */ 291 #define OPTIONBYTE_WRP 0x01U /*!<WRP option byte configuration*/ 292 #define OPTIONBYTE_RDP 0x02U /*!<RDP option byte configuration*/ 293 #define OPTIONBYTE_USER 0x04U /*!<USER option byte configuration*/ 294 #define OPTIONBYTE_DATA 0x08U /*!<DATA option byte configuration*/ 295 296 /** 297 * @} 298 */ 299 300 /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State 301 * @{ 302 */ 303 #define OB_WRPSTATE_DISABLE 0x00U /*!<Disable the write protection of the desired pages*/ 304 #define OB_WRPSTATE_ENABLE 0x01U /*!<Enable the write protection of the desired pagess*/ 305 306 /** 307 * @} 308 */ 309 310 /** @defgroup FLASHEx_OB_Write_Protection Option Bytes Write Protection 311 * @{ 312 */ 313 /* STM32 Low and Medium density devices */ 314 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) \ 315 || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) \ 316 || defined(STM32F103xB) 317 #define OB_WRP_PAGES0TO3 0x00000001U /*!< Write protection of page 0 to 3 */ 318 #define OB_WRP_PAGES4TO7 0x00000002U /*!< Write protection of page 4 to 7 */ 319 #define OB_WRP_PAGES8TO11 0x00000004U /*!< Write protection of page 8 to 11 */ 320 #define OB_WRP_PAGES12TO15 0x00000008U /*!< Write protection of page 12 to 15 */ 321 #define OB_WRP_PAGES16TO19 0x00000010U /*!< Write protection of page 16 to 19 */ 322 #define OB_WRP_PAGES20TO23 0x00000020U /*!< Write protection of page 20 to 23 */ 323 #define OB_WRP_PAGES24TO27 0x00000040U /*!< Write protection of page 24 to 27 */ 324 #define OB_WRP_PAGES28TO31 0x00000080U /*!< Write protection of page 28 to 31 */ 325 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 326 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 327 328 /* STM32 Medium-density devices */ 329 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) 330 #define OB_WRP_PAGES32TO35 0x00000100U /*!< Write protection of page 32 to 35 */ 331 #define OB_WRP_PAGES36TO39 0x00000200U /*!< Write protection of page 36 to 39 */ 332 #define OB_WRP_PAGES40TO43 0x00000400U /*!< Write protection of page 40 to 43 */ 333 #define OB_WRP_PAGES44TO47 0x00000800U /*!< Write protection of page 44 to 47 */ 334 #define OB_WRP_PAGES48TO51 0x00001000U /*!< Write protection of page 48 to 51 */ 335 #define OB_WRP_PAGES52TO55 0x00002000U /*!< Write protection of page 52 to 55 */ 336 #define OB_WRP_PAGES56TO59 0x00004000U /*!< Write protection of page 56 to 59 */ 337 #define OB_WRP_PAGES60TO63 0x00008000U /*!< Write protection of page 60 to 63 */ 338 #define OB_WRP_PAGES64TO67 0x00010000U /*!< Write protection of page 64 to 67 */ 339 #define OB_WRP_PAGES68TO71 0x00020000U /*!< Write protection of page 68 to 71 */ 340 #define OB_WRP_PAGES72TO75 0x00040000U /*!< Write protection of page 72 to 75 */ 341 #define OB_WRP_PAGES76TO79 0x00080000U /*!< Write protection of page 76 to 79 */ 342 #define OB_WRP_PAGES80TO83 0x00100000U /*!< Write protection of page 80 to 83 */ 343 #define OB_WRP_PAGES84TO87 0x00200000U /*!< Write protection of page 84 to 87 */ 344 #define OB_WRP_PAGES88TO91 0x00400000U /*!< Write protection of page 88 to 91 */ 345 #define OB_WRP_PAGES92TO95 0x00800000U /*!< Write protection of page 92 to 95 */ 346 #define OB_WRP_PAGES96TO99 0x01000000U /*!< Write protection of page 96 to 99 */ 347 #define OB_WRP_PAGES100TO103 0x02000000U /*!< Write protection of page 100 to 103 */ 348 #define OB_WRP_PAGES104TO107 0x04000000U /*!< Write protection of page 104 to 107 */ 349 #define OB_WRP_PAGES108TO111 0x08000000U /*!< Write protection of page 108 to 111 */ 350 #define OB_WRP_PAGES112TO115 0x10000000U /*!< Write protection of page 112 to 115 */ 351 #define OB_WRP_PAGES116TO119 0x20000000U /*!< Write protection of page 115 to 119 */ 352 #define OB_WRP_PAGES120TO123 0x40000000U /*!< Write protection of page 120 to 123 */ 353 #define OB_WRP_PAGES124TO127 0x80000000U /*!< Write protection of page 124 to 127 */ 354 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 355 356 357 /* STM32 High-density, XL-density and Connectivity line devices */ 358 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) \ 359 || defined(STM32F101xG) || defined(STM32F103xG) \ 360 || defined(STM32F105xC) || defined(STM32F107xC) 361 #define OB_WRP_PAGES0TO1 0x00000001U /*!< Write protection of page 0 TO 1 */ 362 #define OB_WRP_PAGES2TO3 0x00000002U /*!< Write protection of page 2 TO 3 */ 363 #define OB_WRP_PAGES4TO5 0x00000004U /*!< Write protection of page 4 TO 5 */ 364 #define OB_WRP_PAGES6TO7 0x00000008U /*!< Write protection of page 6 TO 7 */ 365 #define OB_WRP_PAGES8TO9 0x00000010U /*!< Write protection of page 8 TO 9 */ 366 #define OB_WRP_PAGES10TO11 0x00000020U /*!< Write protection of page 10 TO 11 */ 367 #define OB_WRP_PAGES12TO13 0x00000040U /*!< Write protection of page 12 TO 13 */ 368 #define OB_WRP_PAGES14TO15 0x00000080U /*!< Write protection of page 14 TO 15 */ 369 #define OB_WRP_PAGES16TO17 0x00000100U /*!< Write protection of page 16 TO 17 */ 370 #define OB_WRP_PAGES18TO19 0x00000200U /*!< Write protection of page 18 TO 19 */ 371 #define OB_WRP_PAGES20TO21 0x00000400U /*!< Write protection of page 20 TO 21 */ 372 #define OB_WRP_PAGES22TO23 0x00000800U /*!< Write protection of page 22 TO 23 */ 373 #define OB_WRP_PAGES24TO25 0x00001000U /*!< Write protection of page 24 TO 25 */ 374 #define OB_WRP_PAGES26TO27 0x00002000U /*!< Write protection of page 26 TO 27 */ 375 #define OB_WRP_PAGES28TO29 0x00004000U /*!< Write protection of page 28 TO 29 */ 376 #define OB_WRP_PAGES30TO31 0x00008000U /*!< Write protection of page 30 TO 31 */ 377 #define OB_WRP_PAGES32TO33 0x00010000U /*!< Write protection of page 32 TO 33 */ 378 #define OB_WRP_PAGES34TO35 0x00020000U /*!< Write protection of page 34 TO 35 */ 379 #define OB_WRP_PAGES36TO37 0x00040000U /*!< Write protection of page 36 TO 37 */ 380 #define OB_WRP_PAGES38TO39 0x00080000U /*!< Write protection of page 38 TO 39 */ 381 #define OB_WRP_PAGES40TO41 0x00100000U /*!< Write protection of page 40 TO 41 */ 382 #define OB_WRP_PAGES42TO43 0x00200000U /*!< Write protection of page 42 TO 43 */ 383 #define OB_WRP_PAGES44TO45 0x00400000U /*!< Write protection of page 44 TO 45 */ 384 #define OB_WRP_PAGES46TO47 0x00800000U /*!< Write protection of page 46 TO 47 */ 385 #define OB_WRP_PAGES48TO49 0x01000000U /*!< Write protection of page 48 TO 49 */ 386 #define OB_WRP_PAGES50TO51 0x02000000U /*!< Write protection of page 50 TO 51 */ 387 #define OB_WRP_PAGES52TO53 0x04000000U /*!< Write protection of page 52 TO 53 */ 388 #define OB_WRP_PAGES54TO55 0x08000000U /*!< Write protection of page 54 TO 55 */ 389 #define OB_WRP_PAGES56TO57 0x10000000U /*!< Write protection of page 56 TO 57 */ 390 #define OB_WRP_PAGES58TO59 0x20000000U /*!< Write protection of page 58 TO 59 */ 391 #define OB_WRP_PAGES60TO61 0x40000000U /*!< Write protection of page 60 TO 61 */ 392 #define OB_WRP_PAGES62TO127 0x80000000U /*!< Write protection of page 62 TO 127 */ 393 #define OB_WRP_PAGES62TO255 0x80000000U /*!< Write protection of page 62 TO 255 */ 394 #define OB_WRP_PAGES62TO511 0x80000000U /*!< Write protection of page 62 TO 511 */ 395 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 396 /* STM32F101xG || STM32F103xG */ 397 /* STM32F105xC || STM32F107xC */ 398 399 #define OB_WRP_ALLPAGES 0xFFFFFFFFU /*!< Write protection of all Pages */ 400 401 /* Low Density */ 402 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) 403 #define OB_WRP_PAGES0TO31MASK 0x000000FFU 404 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 405 406 /* Medium Density */ 407 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) 408 #define OB_WRP_PAGES0TO31MASK 0x000000FFU 409 #define OB_WRP_PAGES32TO63MASK 0x0000FF00U 410 #define OB_WRP_PAGES64TO95MASK 0x00FF0000U 411 #define OB_WRP_PAGES96TO127MASK 0xFF000000U 412 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ 413 414 /* High Density */ 415 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) 416 #define OB_WRP_PAGES0TO15MASK 0x000000FFU 417 #define OB_WRP_PAGES16TO31MASK 0x0000FF00U 418 #define OB_WRP_PAGES32TO47MASK 0x00FF0000U 419 #define OB_WRP_PAGES48TO255MASK 0xFF000000U 420 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ 421 422 /* XL Density */ 423 #if defined(STM32F101xG) || defined(STM32F103xG) 424 #define OB_WRP_PAGES0TO15MASK 0x000000FFU 425 #define OB_WRP_PAGES16TO31MASK 0x0000FF00U 426 #define OB_WRP_PAGES32TO47MASK 0x00FF0000U 427 #define OB_WRP_PAGES48TO511MASK 0xFF000000U 428 #endif /* STM32F101xG || STM32F103xG */ 429 430 /* Connectivity line devices */ 431 #if defined(STM32F105xC) || defined(STM32F107xC) 432 #define OB_WRP_PAGES0TO15MASK 0x000000FFU 433 #define OB_WRP_PAGES16TO31MASK 0x0000FF00U 434 #define OB_WRP_PAGES32TO47MASK 0x00FF0000U 435 #define OB_WRP_PAGES48TO127MASK 0xFF000000U 436 #endif /* STM32F105xC || STM32F107xC */ 437 438 /** 439 * @} 440 */ 441 442 /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection 443 * @{ 444 */ 445 #define OB_RDP_LEVEL_0 ((uint8_t)0xA5) 446 #define OB_RDP_LEVEL_1 ((uint8_t)0x00) 447 /** 448 * @} 449 */ 450 451 /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog 452 * @{ 453 */ 454 #define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */ 455 #define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */ 456 /** 457 * @} 458 */ 459 460 /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP 461 * @{ 462 */ 463 #define OB_STOP_NO_RST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */ 464 #define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */ 465 /** 466 * @} 467 */ 468 469 /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY 470 * @{ 471 */ 472 #define OB_STDBY_NO_RST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */ 473 #define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */ 474 /** 475 * @} 476 */ 477 478 #if defined(FLASH_BANK2_END) 479 /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1 480 * @{ 481 */ 482 #define OB_BOOT1_RESET ((uint16_t)0x0000) /*!< BOOT1 Reset */ 483 #define OB_BOOT1_SET ((uint16_t)0x0008) /*!< BOOT1 Set */ 484 /** 485 * @} 486 */ 487 #endif /* FLASH_BANK2_END */ 488 489 /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address 490 * @{ 491 */ 492 #define OB_DATA_ADDRESS_DATA0 0x1FFFF804U 493 #define OB_DATA_ADDRESS_DATA1 0x1FFFF806U 494 /** 495 * @} 496 */ 497 498 /** 499 * @} 500 */ 501 502 /** @addtogroup FLASHEx_Constants 503 * @{ 504 */ 505 506 /** @defgroup FLASH_Flag_definition Flag definition 507 * @brief Flag definition 508 * @{ 509 */ 510 #if defined(FLASH_BANK2_END) 511 #define FLASH_FLAG_BSY FLASH_FLAG_BSY_BANK1 /*!< FLASH Bank1 Busy flag */ 512 #define FLASH_FLAG_PGERR FLASH_FLAG_PGERR_BANK1 /*!< FLASH Bank1 Programming error flag */ 513 #define FLASH_FLAG_WRPERR FLASH_FLAG_WRPERR_BANK1 /*!< FLASH Bank1 Write protected error flag */ 514 #define FLASH_FLAG_EOP FLASH_FLAG_EOP_BANK1 /*!< FLASH Bank1 End of Operation flag */ 515 516 #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank1 Busy flag */ 517 #define FLASH_FLAG_PGERR_BANK1 FLASH_SR_PGERR /*!< FLASH Bank1 Programming error flag */ 518 #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPRTERR /*!< FLASH Bank1 Write protected error flag */ 519 #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< FLASH Bank1 End of Operation flag */ 520 521 #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16U) /*!< FLASH Bank2 Busy flag */ 522 #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16U) /*!< FLASH Bank2 Programming error flag */ 523 #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16U) /*!< FLASH Bank2 Write protected error flag */ 524 #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16U) /*!< FLASH Bank2 End of Operation flag */ 525 526 #else 527 528 #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ 529 #define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */ 530 #define FLASH_FLAG_WRPERR FLASH_SR_WRPRTERR /*!< FLASH Write protected error flag */ 531 #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */ 532 533 #endif 534 #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8U | FLASH_OBR_OPTERR)) /*!< Option Byte Error */ 535 /** 536 * @} 537 */ 538 539 /** @defgroup FLASH_Interrupt_definition Interrupt definition 540 * @brief FLASH Interrupt definition 541 * @{ 542 */ 543 #if defined(FLASH_BANK2_END) 544 #define FLASH_IT_EOP FLASH_IT_EOP_BANK1 /*!< End of FLASH Operation Interrupt source Bank1 */ 545 #define FLASH_IT_ERR FLASH_IT_ERR_BANK1 /*!< Error Interrupt source Bank1 */ 546 547 #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source Bank1 */ 548 #define FLASH_IT_ERR_BANK1 FLASH_CR_ERRIE /*!< Error Interrupt source Bank1 */ 549 550 #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16U) /*!< End of FLASH Operation Interrupt source Bank2 */ 551 #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16U) /*!< Error Interrupt source Bank2 */ 552 553 #else 554 555 #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */ 556 #define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error Interrupt source */ 557 558 #endif 559 /** 560 * @} 561 */ 562 563 /** 564 * @} 565 */ 566 567 568 /** 569 * @} 570 */ 571 572 /* Exported macro ------------------------------------------------------------*/ 573 /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros 574 * @{ 575 */ 576 577 /** @defgroup FLASH_Interrupt Interrupt 578 * @brief macros to handle FLASH interrupts 579 * @{ 580 */ 581 582 #if defined(FLASH_BANK2_END) 583 /** 584 * @brief Enable the specified FLASH interrupt. 585 * @param __INTERRUPT__ FLASH interrupt 586 * This parameter can be any combination of the following values: 587 * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1 588 * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1 589 * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2 590 * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2 591 * @retval none 592 */ 593 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { \ 594 /* Enable Bank1 IT */ \ 595 SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFFU)); \ 596 /* Enable Bank2 IT */ \ 597 SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16U)); \ 598 } while(0U) 599 600 /** 601 * @brief Disable the specified FLASH interrupt. 602 * @param __INTERRUPT__ FLASH interrupt 603 * This parameter can be any combination of the following values: 604 * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1 605 * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1 606 * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2 607 * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2 608 * @retval none 609 */ 610 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { \ 611 /* Disable Bank1 IT */ \ 612 CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFFU)); \ 613 /* Disable Bank2 IT */ \ 614 CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16U)); \ 615 } while(0U) 616 617 /** 618 * @brief Get the specified FLASH flag status. 619 * @param __FLAG__ specifies the FLASH flag to check. 620 * This parameter can be one of the following values: 621 * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1 622 * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1 623 * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1 624 * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1 625 * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2 626 * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2 627 * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2 628 * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2 629 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 630 * @retval The new state of __FLAG__ (SET or RESET). 631 */ 632 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ 633 (FLASH->OBR & FLASH_OBR_OPTERR) : \ 634 ((((__FLAG__) & SR_FLAG_MASK) != RESET)? \ 635 (FLASH->SR & ((__FLAG__) & SR_FLAG_MASK)) : \ 636 (FLASH->SR2 & ((__FLAG__) >> 16U)))) 637 638 /** 639 * @brief Clear the specified FLASH flag. 640 * @param __FLAG__ specifies the FLASH flags to clear. 641 * This parameter can be any combination of the following values: 642 * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1 643 * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1 644 * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1 645 * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1 646 * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2 647 * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2 648 * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2 649 * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2 650 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 651 * @retval none 652 */ 653 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ 654 /* Clear FLASH_FLAG_OPTVERR flag */ \ 655 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ 656 { \ 657 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ 658 } \ 659 else { \ 660 /* Clear Flag in Bank1 */ \ 661 if (((__FLAG__) & SR_FLAG_MASK) != RESET) \ 662 { \ 663 FLASH->SR = ((__FLAG__) & SR_FLAG_MASK); \ 664 } \ 665 /* Clear Flag in Bank2 */ \ 666 if (((__FLAG__) >> 16U) != RESET) \ 667 { \ 668 FLASH->SR2 = ((__FLAG__) >> 16U); \ 669 } \ 670 } \ 671 } while(0U) 672 #else 673 /** 674 * @brief Enable the specified FLASH interrupt. 675 * @param __INTERRUPT__ FLASH interrupt 676 * This parameter can be any combination of the following values: 677 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 678 * @arg @ref FLASH_IT_ERR Error Interrupt 679 * @retval none 680 */ 681 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__)) 682 683 /** 684 * @brief Disable the specified FLASH interrupt. 685 * @param __INTERRUPT__ FLASH interrupt 686 * This parameter can be any combination of the following values: 687 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 688 * @arg @ref FLASH_IT_ERR Error Interrupt 689 * @retval none 690 */ 691 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(__INTERRUPT__)) 692 693 /** 694 * @brief Get the specified FLASH flag status. 695 * @param __FLAG__ specifies the FLASH flag to check. 696 * This parameter can be one of the following values: 697 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 698 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag 699 * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag 700 * @arg @ref FLASH_FLAG_BSY FLASH Busy flag 701 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 702 * @retval The new state of __FLAG__ (SET or RESET). 703 */ 704 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ 705 (FLASH->OBR & FLASH_OBR_OPTERR) : \ 706 (FLASH->SR & (__FLAG__))) 707 /** 708 * @brief Clear the specified FLASH flag. 709 * @param __FLAG__ specifies the FLASH flags to clear. 710 * This parameter can be any combination of the following values: 711 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 712 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag 713 * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag 714 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 715 * @retval none 716 */ 717 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ 718 /* Clear FLASH_FLAG_OPTVERR flag */ \ 719 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ 720 { \ 721 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ 722 } \ 723 else { \ 724 /* Clear Flag in Bank1 */ \ 725 FLASH->SR = (__FLAG__); \ 726 } \ 727 } while(0U) 728 729 #endif 730 731 /** 732 * @} 733 */ 734 735 /** 736 * @} 737 */ 738 739 /* Exported functions --------------------------------------------------------*/ 740 /** @addtogroup FLASHEx_Exported_Functions 741 * @{ 742 */ 743 744 /** @addtogroup FLASHEx_Exported_Functions_Group1 745 * @{ 746 */ 747 /* IO operation functions *****************************************************/ 748 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); 749 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 750 751 /** 752 * @} 753 */ 754 755 /** @addtogroup FLASHEx_Exported_Functions_Group2 756 * @{ 757 */ 758 /* Peripheral Control functions ***********************************************/ 759 HAL_StatusTypeDef HAL_FLASHEx_OBErase(void); 760 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 761 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 762 uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress); 763 /** 764 * @} 765 */ 766 767 /** 768 * @} 769 */ 770 771 /** 772 * @} 773 */ 774 775 /** 776 * @} 777 */ 778 #ifdef __cplusplus 779 } 780 #endif 781 782 #endif /* __STM32F1xx_HAL_FLASH_EX_H */ 783 784
