1 /* 2 * Copyright 2023 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef GMAC_IP_FEATURES_H 8 #define GMAC_IP_FEATURES_H 9 10 /** 11 * @file 12 * 13 * @addtogroup GMAC_DRIVER_CONFIGURATION GMAC Driver Configuration 14 * @{ 15 */ 16 17 #ifdef __cplusplus 18 extern "C"{ 19 #endif 20 21 /* 22 * @page misra_violations MISRA-C:2012 violations 23 * 24 * 25 */ 26 27 /*================================================================================================== 28 * INCLUDE FILES 29 * 1) system and project includes 30 * 2) needed interfaces from external units 31 * 3) internal and external interfaces from this unit 32 ==================================================================================================*/ 33 34 /*================================================================================================== 35 * SOURCE FILE VERSION INFORMATION 36 ==================================================================================================*/ 37 #define GMAC_IP_FEATURES_VENDOR_ID 43 38 #define GMAC_IP_FEATURES_AR_RELEASE_MAJOR_VERSION 4 39 #define GMAC_IP_FEATURES_AR_RELEASE_MINOR_VERSION 7 40 #define GMAC_IP_FEATURES_AR_RELEASE_REVISION_VERSION 0 41 #define GMAC_IP_FEATURES_SW_MAJOR_VERSION 3 42 #define GMAC_IP_FEATURES_SW_MINOR_VERSION 0 43 #define GMAC_IP_FEATURES_SW_PATCH_VERSION 0 44 45 /*================================================================================================== 46 * FILE VERSION CHECKS 47 ==================================================================================================*/ 48 49 /*================================================================================================== 50 CONSTANTS 51 ==================================================================================================*/ 52 53 /*================================================================================================== 54 DEFINES AND MACROS 55 ==================================================================================================*/ 56 57 58 #define GMAC_IP_FEATURE_ORIGIN (0U)/* EMAC */ 59 60 /*! @brief Number of instances */ 61 #define FEATURE_GMAC_NUM_INSTANCES (1) 62 /*! @brief Number of DMA channels (Assumption: DmaChannels = TxQueues = Rx Queues) */ 63 #define FEATURE_GMAC_NUM_CHANNELS (2U) 64 /*! @brief Number of MTL queues (Assumption: TxQueues = Rx Queues) */ 65 #define FEATURE_GMAC_NUM_QUEUES (2U) 66 67 /*! @brief The common interrupt */ 68 #define FEATURE_GMAC_COMMON_IRQS { EMAC_0_IRQn } 69 /*! @brief The transmission interrupts */ 70 #define FEATURE_GMAC_TX_IRQS { {EMAC_1_IRQn, EMAC_1_IRQn} } 71 /*! @brief The reception interrupts */ 72 #define FEATURE_GMAC_RX_IRQS { {EMAC_2_IRQn, EMAC_2_IRQn} } 73 /*! @brief The safety interrupt */ 74 #define FEATURE_GMAC_SAFETY_IRQS { EMAC_3_IRQn } 75 76 77 /*! @brief The common interrupt handler */ 78 #define FEATURE_GMAC_COMMON_IRQ_HDLRS { GMAC0_Common_IRQHandler } 79 /*! @brief The transmission interrupt handlers */ 80 #define FEATURE_GMAC_TX_IRQ_HDLRS { {GMAC0_CH_TX_IRQHandler, GMAC0_CH_TX_IRQHandler} } 81 /*! @brief The reception interrupts handlers */ 82 #define FEATURE_GMAC_RX_IRQ_HDLRS { {GMAC0_CH_RX_IRQHandler, GMAC0_CH_RX_IRQHandler} } 83 /*! @brief The safety interrupt handler */ 84 #define FEATURE_GMAC_SAFETY_IRQ_HDLRS { GMAC0_Safety_IRQHandler } 85 86 87 /*! @brief Definitions used for the different IRQ configurations */ 88 #define FEATURE_GMAC_UNIFIED_CH_IRQS (1U) 89 #define FEATURE_GMAC_INDIVIDUAL_CH_IRQS (0U) 90 91 /*! @brief Definition used for aligning the buffer pools and buffer descriptors */ 92 #define FEATURE_GMAC_DATA_BUS_WIDTH_BITS (32UL) 93 #define FEATURE_GMAC_DATA_BUS_WIDTH_BYTES (FEATURE_GMAC_DATA_BUS_WIDTH_BITS / 8UL) 94 #define FEATURE_GMAC_LOG2_DATA_BUS_WIDTH_BYTES (2UL) 95 /*! @brief Maximum number of beats in a a data-bus (AXI/AHB) burst */ 96 #define FEATURE_GMAC_MAX_DATA_BUS_BURST_LENGTH (16UL) 97 /*! @brief Definitions used for setting descriptor skip length */ 98 #define FEATURE_GMAC_HW_BUFFDESCR_SIZE_BYTES (16UL) 99 #define FEATURE_GMAC_SW_BUFFDESCR_SIZE_BYTES (sizeof(Gmac_Ip_BufferDescriptorType)) 100 /*! @brief Definition used for aligning the buffer descriptors */ 101 #define FEATURE_GMAC_BUFFDESCR_ALIGNMENT_BITS (FEATURE_GMAC_DATA_BUS_WIDTH_BITS) 102 #define FEATURE_GMAC_BUFFDESCR_ALIGNMENT_BYTES (FEATURE_GMAC_DATA_BUS_WIDTH_BYTES) 103 /*! @brief Definition used for aligning the buffer pools */ 104 #define FEATURE_GMAC_BUFF_ALIGNMENT_BITS (FEATURE_GMAC_MAX_DATA_BUS_BURST_LENGTH * FEATURE_GMAC_DATA_BUS_WIDTH_BITS) 105 #define FEATURE_GMAC_BUFF_ALIGNMENT_BYTES (FEATURE_GMAC_MAX_DATA_BUS_BURST_LENGTH * FEATURE_GMAC_DATA_BUS_WIDTH_BYTES) 106 /*! @brief Definition used for aligning the buffer length */ 107 #define FEATURE_GMAC_BUFFLEN_ALIGNMENT_BYTES (FEATURE_GMAC_DATA_BUS_WIDTH_BYTES) 108 109 /*! @brief Minimum allocatable unit in a Tx FIFO */ 110 #define FEATURE_GMAC_MTL_TX_FIFO_BLOCK_SIZE (256U) 111 /*! @brief Minimum allocatable unit in an Rx FIFO */ 112 #define FEATURE_GMAC_MTL_RX_FIFO_BLOCK_SIZE (256U) 113 114 /*! @brief MTL Transmit FIFO Pool Size */ 115 #define FEATURE_GMAC_MTL_RX_POOL_SIZE (8192U) 116 /*! @brief MTL Receive FIFO Pool Size */ 117 #define FEATURE_GMAC_MTL_TX_POOL_SIZE (8192U) 118 119 /*! @brief Definition used for aligning the total ring length (ringSize * buffLen) */ 120 #define FEATURE_GMAC_TXRINGLEN_ALIGNMENT_BYTES (FEATURE_GMAC_MTL_TX_FIFO_BLOCK_SIZE) 121 /*! @brief Definition used for aligning the total ring length (ringSize * buffLen) */ 122 #define FEATURE_GMAC_RXRINGLEN_ALIGNMENT_BYTES (FEATURE_GMAC_MTL_RX_FIFO_BLOCK_SIZE) 123 124 /*! @brief Definitions used for the Application Interface Parameters */ 125 #define FEATURE_GMAC_DATA_BUS_AXI (0U) 126 #define FEATURE_GMAC_DATA_BUS_AHB (1U) 127 128 /*! @brief Definitions used for the PHY Interface Parameters */ 129 #define FEATURE_GMAC_RGMII_EN (0U) 130 #define FEATURE_GMAC_SGMII_EN (0U) 131 #define FEATURE_GMAC_SMII_EN (0U) 132 133 /*! @brief Definitions used for the Low Power Management Parameters */ 134 #define FEATURE_GMAC_PMT_EN (0U) 135 136 /*! @brief Definitions used for the Overclock 50 MHz and 200 Mbps supported */ 137 #define FEATURE_OVERCLOCKED_EN (0U) 138 139 /*! @brief Definitions used for the TCPIP Offloading Parameters */ 140 #define FEATURE_GMAC_ARP_EN (0U) 141 142 /*! @brief Definitions used for the Automotive Safety Parameters */ 143 #define FEATURE_GMAC_ASP_ALL (1U) 144 #define FEATURE_GMAC_ASP_ECC (1U) 145 146 /*! @brief Definitions used for the Filtering Parameters */ 147 #define FEATURE_GMAC_HASH_EN (1U) 148 #define FEATURE_GMAC_HASH_TABLE_SZ (64U) 149 #define FEATURE_GMAC_HASH_TABLE_MSB_SHIFT (26U) 150 151 /*! @brief Number of VLAN Rx filters */ 152 #define FEATURE_GMAC_VLAN_RX_FILTERS_NUM (4U) 153 /*! @brief Generate the type of cache IP on the platform used for the cacheable buffers feature */ 154 #define FEATURE_GMAC_CACHABLE_BUFFERS_LMEM (0U) 155 #define FEATURE_GMAC_CACHABLE_BUFFERS_CORE (1U) 156 157 /*================================================================================================== 158 ENUMS 159 ==================================================================================================*/ 160 161 /*================================================================================================== 162 STRUCTURES AND OTHER TYPEDEFS 163 ==================================================================================================*/ 164 165 /*================================================================================================== 166 GLOBAL VARIABLE DECLARATIONS 167 ==================================================================================================*/ 168 169 /*================================================================================================== 170 FUNCTION PROTOTYPES 171 ==================================================================================================*/ 172 173 #ifdef __cplusplus 174 } 175 #endif 176 177 /** @} */ 178 179 #endif /* GMAC_IP_FEATURES_H */ 180