1 
2 /*
3  * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
4  *
5  * SPDX-License-Identifier: Apache-2.0
6  */
7 
8 /**
9  * @file DWARF Exception Frames parser header
10  *
11  * This file describes the frame types for RISC-V, required for
12  * parsing `eh_frame` and `eh_frame_hdr`.
13  *
14  */
15 
16 #pragma once
17 
18 #include "riscv/rvruntime-frames.h"
19 
20 #ifdef __cplusplus
21 extern "C" {
22 #endif
23 
24 /**
25  * @brief Define the Executionframe as RvExcFrame for this implementation.
26  */
27 typedef RvExcFrame ExecutionFrame;
28 
29 /**
30  * @brief Number of registers in the ExecutionFrame structure.
31  *
32  * This will be used to define and initialize the DWARF machine state.
33  * In practice, we only have 16 registers that are callee saved, thus, we could
34  * only save them and ignore the rest. However, code to calculate mapping of
35  * CPU registers to DWARF registers would take more than the 16 registers we
36  * would save... so save all registers.
37  */
38 #define EXECUTION_FRAME_MAX_REGS   (32)
39 
40 /**
41  * @brief Reference the PC register of the execution frame.
42  */
43 #define EXECUTION_FRAME_PC(frame)   ((frame).mepc)
44 
45 /**
46  * @brief Reference the SP register of the execution frame.
47  */
48 #define EXECUTION_FRAME_SP(frame)   ((frame).sp)
49 
50 /**
51  * @brief Index of SP register in the execution frame.
52  */
53 #define EXECUTION_FRAME_SP_REG      (offsetof(RvExcFrame, sp)/sizeof(uint32_t))
54 
55 /**
56  * @brief Get register i of the execution frame.
57  */
58 #define EXECUTION_FRAME_REG(frame, i) (((uint32_t*) (frame))[(i)])
59 
60 #ifdef __cplusplus
61 }
62 #endif
63 
64 // #endif // _EH_FRAME_PARSER_IMPL_H
65