1 /* 2 * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 #pragma once 7 8 #include <inttypes.h> 9 #include "esp_assert.h" 10 11 /** 12 * @brief ESP chip ID 13 * 14 */ 15 typedef enum { 16 ESP_CHIP_ID_ESP32 = 0x0000, /*!< chip ID: ESP32 */ 17 ESP_CHIP_ID_ESP32S2 = 0x0002, /*!< chip ID: ESP32-S2 */ 18 ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */ 19 ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */ 20 ESP_CHIP_ID_ESP32C2 = 0x000C, /*!< chip ID: ESP32-C2 */ 21 ESP_CHIP_ID_ESP32C6 = 0x000D, /*!< chip ID: ESP32-C6 */ 22 ESP_CHIP_ID_ESP32H2 = 0x0010, /*!< chip ID: ESP32-H2 */ 23 ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */ 24 } __attribute__((packed)) esp_chip_id_t; 25 26 /** @cond */ 27 ESP_STATIC_ASSERT(sizeof(esp_chip_id_t) == 2, "esp_chip_id_t should be 16 bit"); 28 /** @endcond */ 29 30 /** 31 * @brief SPI flash mode, used in esp_image_header_t 32 */ 33 typedef enum { 34 ESP_IMAGE_SPI_MODE_QIO, /*!< SPI mode QIO */ 35 ESP_IMAGE_SPI_MODE_QOUT, /*!< SPI mode QOUT */ 36 ESP_IMAGE_SPI_MODE_DIO, /*!< SPI mode DIO */ 37 ESP_IMAGE_SPI_MODE_DOUT, /*!< SPI mode DOUT */ 38 ESP_IMAGE_SPI_MODE_FAST_READ, /*!< SPI mode FAST_READ */ 39 ESP_IMAGE_SPI_MODE_SLOW_READ /*!< SPI mode SLOW_READ */ 40 } esp_image_spi_mode_t; 41 42 /** 43 * @brief SPI flash clock division factor. 44 */ 45 typedef enum { 46 ESP_IMAGE_SPI_SPEED_DIV_2, /*!< The SPI flash clock frequency is divided by 2 of the clock source */ 47 ESP_IMAGE_SPI_SPEED_DIV_3, /*!< The SPI flash clock frequency is divided by 3 of the clock source */ 48 ESP_IMAGE_SPI_SPEED_DIV_4, /*!< The SPI flash clock frequency is divided by 4 of the clock source */ 49 ESP_IMAGE_SPI_SPEED_DIV_1 = 0xF /*!< The SPI flash clock frequency equals to the clock source */ 50 } esp_image_spi_freq_t; 51 52 /** 53 * @brief Supported SPI flash sizes 54 */ 55 typedef enum { 56 ESP_IMAGE_FLASH_SIZE_1MB = 0, /*!< SPI flash size 1 MB */ 57 ESP_IMAGE_FLASH_SIZE_2MB, /*!< SPI flash size 2 MB */ 58 ESP_IMAGE_FLASH_SIZE_4MB, /*!< SPI flash size 4 MB */ 59 ESP_IMAGE_FLASH_SIZE_8MB, /*!< SPI flash size 8 MB */ 60 ESP_IMAGE_FLASH_SIZE_16MB, /*!< SPI flash size 16 MB */ 61 ESP_IMAGE_FLASH_SIZE_32MB, /*!< SPI flash size 32 MB */ 62 ESP_IMAGE_FLASH_SIZE_64MB, /*!< SPI flash size 64 MB */ 63 ESP_IMAGE_FLASH_SIZE_128MB, /*!< SPI flash size 128 MB */ 64 ESP_IMAGE_FLASH_SIZE_MAX /*!< SPI flash size MAX */ 65 } esp_image_flash_size_t; 66 67 #define ESP_IMAGE_HEADER_MAGIC 0xE9 /*!< The magic word for the esp_image_header_t structure. */ 68 69 /** 70 * @brief Main header of binary image 71 */ 72 typedef struct { 73 uint8_t magic; /*!< Magic word ESP_IMAGE_HEADER_MAGIC */ 74 uint8_t segment_count; /*!< Count of memory segments */ 75 uint8_t spi_mode; /*!< flash read mode (esp_image_spi_mode_t as uint8_t) */ 76 uint8_t spi_speed: 4; /*!< flash frequency (esp_image_spi_freq_t as uint8_t) */ 77 uint8_t spi_size: 4; /*!< flash chip size (esp_image_flash_size_t as uint8_t) */ 78 uint32_t entry_addr; /*!< Entry address */ 79 uint8_t wp_pin; /*!< WP pin when SPI pins set via efuse (read by ROM bootloader, 80 * the IDF bootloader uses software to configure the WP 81 * pin and sets this field to 0xEE=disabled) */ 82 uint8_t spi_pin_drv[3]; /*!< Drive settings for the SPI flash pins (read by ROM bootloader) */ 83 esp_chip_id_t chip_id; /*!< Chip identification number */ 84 uint8_t min_chip_rev; /*!< Minimal chip revision supported by image 85 * After the Major and Minor revision eFuses were introduced into the chips, this field is no longer used. 86 * But for compatibility reasons, we keep this field and the data in it. 87 * Use min_chip_rev_full instead. 88 * The software interprets this as a Major version for most of the chips and as a Minor version for the ESP32-C3. 89 */ 90 uint16_t min_chip_rev_full; /*!< Minimal chip revision supported by image, in format: major * 100 + minor */ 91 uint16_t max_chip_rev_full; /*!< Maximal chip revision supported by image, in format: major * 100 + minor */ 92 uint8_t reserved[4]; /*!< Reserved bytes in additional header space, currently unused */ 93 uint8_t hash_appended; /*!< If 1, a SHA256 digest "simple hash" (of the entire image) is appended after the checksum. 94 * Included in image length. This digest 95 * is separate to secure boot and only used for detecting corruption. 96 * For secure boot signed images, the signature 97 * is appended after this (and the simple hash is included in the signed data). */ 98 } __attribute__((packed)) esp_image_header_t; 99 100 /** @cond */ 101 ESP_STATIC_ASSERT(sizeof(esp_image_header_t) == 24, "binary image header should be 24 bytes"); 102 /** @endcond */ 103 104 105 /** 106 * @brief Header of binary image segment 107 */ 108 typedef struct { 109 uint32_t load_addr; /*!< Address of segment */ 110 uint32_t data_len; /*!< Length of data */ 111 } esp_image_segment_header_t; 112 113 #define ESP_IMAGE_MAX_SEGMENTS 16 /*!< Max count of segments in the image. */ 114
