1 /* 2 * Copyright 2022-2024 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef SOC_IPS_H 8 #define SOC_IPS_H 9 10 /** 11 * @file Soc_Ips.h 12 * @brief Include platform types 13 * @addtogroup BASENXP_COMPONENT 14 * @{ 15 */ 16 17 #ifdef __cplusplus 18 extern "C"{ 19 #endif 20 21 22 /*================================================================================================== 23 * INCLUDE FILES 24 * 1) system and project includes 25 * 2) needed interfaces from external units 26 * 3) internal and external interfaces from this unit 27 ==================================================================================================*/ 28 #include "Platform_Types.h" 29 #include "IpVersionMacros.h" 30 31 /*================================================================================================== 32 * SOURCE FILE VERSION INFORMATION 33 ==================================================================================================*/ 34 #define SOC_IPS_VENDOR_ID 43 35 #define SOC_IPS_MODULE_ID 0 36 #define SOC_IPS_AR_RELEASE_MAJOR_VERSION 4 37 #define SOC_IPS_AR_RELEASE_MINOR_VERSION 7 38 #define SOC_IPS_AR_RELEASE_REVISION_VERSION 0 39 #define SOC_IPS_SW_MAJOR_VERSION 2 40 #define SOC_IPS_SW_MINOR_VERSION 0 41 #define SOC_IPS_SW_PATCH_VERSION 0 42 43 /*================================================================================================== 44 * FILE VERSION CHECKS 45 ==================================================================================================*/ 46 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK 47 /* Check if source file and Platform_Types.h header file are of the same Autosar version */ 48 #if ((SOC_IPS_AR_RELEASE_MAJOR_VERSION != PLATFORM_AR_RELEASE_MAJOR_VERSION) || \ 49 (SOC_IPS_AR_RELEASE_MINOR_VERSION != PLATFORM_AR_RELEASE_MINOR_VERSION)) 50 #error "AutoSar Version Numbers of Soc_Ips.h and Platform_Types.h are different" 51 #endif 52 53 /* Check if source file and IpVersionMacros.h header file are of the same Autosar version */ 54 #if ((SOC_IPS_AR_RELEASE_MAJOR_VERSION != IPVERSIONMACROS_AR_RELEASE_MAJOR_VERSION) || \ 55 (SOC_IPS_AR_RELEASE_MINOR_VERSION != IPVERSIONMACROS_AR_RELEASE_MINOR_VERSION)) 56 #error "AutoSar Version Numbers of Soc_Ips.h and IpVersionMacros.h are different" 57 #endif 58 #endif 59 60 /*================================================================================================== 61 * CONSTANTS 62 ==================================================================================================*/ 63 /* 31 = 0x1F = ARM_PLATFORM 64 * 53 = 0x35 = S32Z2XX DERIVATIVE ID 65 * 01 = 0x01 = Rev. 1 66 * 11 = 0x01 = Draft A (A-B-C-D-E-F-G-H-I-J-K-L-M-N-O-P-Q-R-S-T-U-V-W-X-Y-Z) 67 */ 68 69 /** 70 * @brief PMC IP Version: PMC v03.00.01.00 71 * @details IP Versions 72 */ 73 #define IPV_PMC (0x1F350101UL) 74 75 76 /** 77 * @brief PIT_RTI IP Version: PIT_RTI v05.00.06.11 78 * @details IP Versions 79 */ 80 #define IPV_PIT (0x1F350101UL) 81 82 83 /** 84 * @brief RTC IP Version: RTC 00.00.03.06 85 * @details IP Versions 86 */ 87 #define IPV_RTC (0x1F350101UL) 88 89 90 /** 91 * @brief ADCDIG IP Version: v00.00.18.00 92 * @details IP Versions 93 */ 94 #define IPV_ADCDIG (0x1F350101UL) 95 96 97 /** 98 * @brief SIUL2 IP Version: v00.00.00.10 99 * @details IP Versions 100 */ 101 #define IPV_SIULV2 (0x1F350101UL) 102 103 /** 104 * @brief MC IP Version: D_IP_magic_carpet_SYN_302 [v07.00.02.03] 105 * @details IP Versions 106 */ 107 #define IPV_MC (0x1F350101UL) 108 109 /** 110 * @brief PLLDIG IP Version: DA_IP_PLL_SYS_C40ESF3_008 [v00.00.03.04] 111 * @details IP Versions 112 */ 113 #define IPV_PLLDIG (0x1F350101UL) 114 115 /** 116 * @brief FXOSC IP Version: DA_IP_FXOSC_C [v40.00.00.02.05] 117 * @details IP Versions 118 */ 119 #define IPV_FXOSC (0x1F350101UL) 120 121 /** 122 * @brief FIRC IP Version: D_IP_FIRC_SYN_SPEC [v00.00.00.21] 123 * @details IP Versions 124 */ 125 #define IPV_FIRC (0x1F350101UL) 126 127 /** 128 * @brief GMAC IP Version: D_IP_3P_ENET_MAC_SYN_017 [v02.00.00.08] 129 * @details IP Versions 130 */ 131 #define IPV_GMAC (0x1F350101UL) 132 133 /** 134 * @brief C40ASF IP Version: M_IP_c40asf_spec [v00.00.00.04] 135 * @details IP Versions 136 */ 137 #define IPV_C40ASF (0x1F350101UL) 138 139 /** 140 * @brief PFLASH IP Version: pflash_c40asf_s32k_spec [v00.00.00.11] 141 * @details IP Versions 142 */ 143 #define IPV_PFLASH (0x1F350101UL) 144 145 /** 146 * @brief C40ASF IP Version: M_IP_c40asf_spec [v00.00.00.04] 147 * @details IP Versions 148 */ 149 #define IPV_FLASH_ARRAY (0x1F350101UL) 150 151 /** 152 * @brief PFLASH IP Version: pflash_c40asf_s32k_spec [v00.00.00.11] 153 * @details IP Versions 154 */ 155 #define IPV_FLASH_CONTROLLER (0x1F350101UL) 156 157 /** 158 * @brief QSPI IP Version: QSPI d_ip_quadspi_v2_sync_spec.025 159 * @details IP Versions 160 */ 161 #define IPV_QSPI (0x1F350101UL) 162 163 /** 164 * @brief Clock Monitoring Unit Frequency Check (CMU_FC) IP Version 165 * @details IP Versions 166 */ 167 #define IPV_CMU_FC (0x1F350101UL) 168 169 /*================================================================================================== 170 * REGISTER PROTECTION (REG_PROT) 171 ==================================================================================================*/ 172 /** 173 * @brief Register Protection IP Version 174 * @details IP Versions 175 */ 176 #define IPV_REG_PROT (0x1F350101UL) 177 178 /*================================================================================================== 179 * Software Erratas for Hardware Erratas 180 ==================================================================================================*/ 181 /** 182 * @brief Hardware errata for LPSPI: (ERR050456) 183 * @details ERR050456 LPSPI: Reset to fifo does not work as expected 184 */ 185 #define ERR_IPV_LPSPIV2_E050456 (STD_ON) 186 187 /** 188 * @brief Hardware errata for LINFlexD: (e007274) 189 * @details e007274 LINFlexD: Consecutive headers received by LIN Slave triggers the LIN FSM to an unexpected state. 190 */ 191 #define ERR_IPV_LINFLEXD_E007274 (STD_ON) 192 193 /** 194 * @brief Hardware errata for MC_RGM: (ERR051163) 195 * @details ERR051163 MC_RGM: Incorrect destructive reset event status 196 */ 197 #define ERR_IPV_MC_RGM_0001 (STD_ON) 198 199 /** 200 * @brief Hardware errata for LFAST PLL: (ERR051380) 201 * @details ERR051380 LFAST PLL: LFAST PLL Start-up Marginality 202 */ 203 #define ERR_IPV_LFAST_PLL_051380 (STD_ON) 204 205 206 /** 207 * @brief Hardware errata for EMIOS: (ERR009978) 208 * @details ERR009978 EMIOS: eMIOS: Unexpected channel flag assertion during GPIO to 209 MCB mode transition 210 */ 211 #define ERR_IPV_EMIOS_009978 (STD_ON) 212 213 /** 214 * @brief Hardware errata for NETC: (ERR050679) 215 * @details ERR050679 NETC: Accesses to 64-bit stats registers must be performed atomically 216 MCB mode transition 217 */ 218 #define ERR_IPV_NETC_050679 (STD_ON) 219 220 /** 221 * @brief Hardware errata for NETC: (ERR051025) 222 * @details ERR051025 NETC: Preemption verify time longer than specified 223 MCB mode transition 224 */ 225 #define ERR_IPV_NETC_051025 (STD_ON) 226 227 /** 228 * @brief Hardware errata for NETC: (ERR051124) 229 * @details ERR051124 NETC: Simultaneous scheduler events result in missed hold assertion 230 MCB mode transition 231 */ 232 #define ERR_IPV_NETC_051124 (STD_ON) 233 234 /** 235 * @brief Hardware errata for NETC: (ERR051254) 236 * @details ERR051254 NETC: Administrative gate control list can get configured inadvertently 237 when an exception is detected and notified 238 */ 239 #define ERR_IPV_NETC_051254 (STD_ON) 240 241 /** 242 * @brief Hardware errata for NETC: (ERR051398) 243 * @details ERR051398 NETC: FLR or transmit disable may cause frame transfers to underrun in MAC 244 resulting in bad frame transmission 245 */ 246 #define ERR_IPV_NETC_051398 (STD_ON) 247 248 /** 249 * @brief Hardware errata for NETC: (ERR051260) 250 * @details ERR051260 NETC: During initial Initialization of NETC, all ENETCs and Switch PCI functions 251 must be enabled for NETC to accept table management commands for any function 252 */ 253 #define ERR_IPV_NETC_051260 (STD_ON) 254 255 /** 256 * @brief Hardware errata for NETC: (ERR051261) 257 * @details ERR051261 NETC: Egress ports can violate 802.3 half-duplex jam protocol after collision 258 event 259 */ 260 #define ERR_IPV_NETC_051261 (STD_ON) 261 262 /** 263 * @brief Hardware errata for NETC: (ERR051130) 264 * @details ERR051130 NETC: Egress time gate scheduling can get corrupted when functional level reset 265 is applied or when time gating is disabled. 266 */ 267 #define ERR_IPV_NETC_E051130 (STD_ON) 268 269 /** 270 * @brief Hardware errata for NETC: (ERR051305) 271 * @details ERR051305 NETC: Entry_id not returned correctly by Stream Gating Instance and Time Gate 272 Scheduling QUERY table management commands. 273 */ 274 #define ERR_IPV_NETC_051305 (STD_ON) 275 276 /** 277 * @brief Hardware errata for NETC: (ERR051129) 278 * @details ERR051129 NETC: Errored frames due to parity error are not counted in TFCS and TERR. 279 */ 280 #define ERR_IPV_NETC_E051129 (STD_ON) 281 282 /** 283 * @brief Hardware errata for NETC: (ERR051023) 284 * @details ERR051023 NETC: Excessive collisions are counted as late collisions. 285 */ 286 #define ERR_IPV_NETC_E051023 (STD_ON) 287 288 /** 289 * @brief Hardware errata for NETC: (ERR051262) 290 * @details ERR051262 NETC: MAC statistics counters are inaccurate when operating in half-duplex. 291 */ 292 #define ERR_IPV_NETC_051262 (STD_ON) 293 294 /** 295 * @brief Hardware errata for NETC: (ERR051048) 296 * @details ERR051048 NETC: Management command with search action responds with incorrect 297 NUM_MATCHED. 298 */ 299 #define ERR_IPV_NETC_E051048 (STD_ON) 300 301 /** 302 * @brief Hardware errata for NETC: (ERR051243) 303 * @details ERR051243 NETC: Multi-entry SEARCH table management command returns invalid error 304 code. 305 */ 306 #define ERR_IPV_NETC_051243 (STD_ON) 307 308 /** 309 * @brief Hardware errata for NETC: (ERR051188) 310 * @details ERR051188 NETC: Register SITSR not accessible for Virtual Station Interfaces 311 */ 312 #define ERR_IPV_NETC_051188 (STD_ON) 313 314 /** 315 * @brief Hardware errata for NETC: (ERR051247) 316 * @details ERR051247 NETC: System bus error on VSI-to-PSI message is not reported to PSI. 317 */ 318 #define ERR_IPV_NETC_051247 (STD_ON) 319 320 /** 321 * @brief Hardware errata for NETC: (ERR051124) 322 * @details ERR051124 NETC: Simultaneous scheduler events result in missed hold assertion 323 MCB mode transition 324 */ 325 #define ERR_IPV_NETC_051124 (STD_ON) 326 327 /** 328 * @brief Hardware errata for NETC: (ERR051587) 329 * @details ERR051587 NETC: Time gate scheduling update command may respond with error when AdminBaseTime specified is near the current time. 330 */ 331 #define ERR_IPV_NETC_051587 (STD_ON) 332 333 /** @brief Hardware errata for NETC: (ERR051300) 334 * @details ERR051300 NETC: NETC engine watchdogs do not operate effectively under all 335 circumstances 336 */ 337 #define ERR_IPV_NETC_051300 (STD_ON) 338 /*================================================================================================== 339 * DEFINES AND MACROS 340 ==================================================================================================*/ 341 /** 342 * @brief Enable CACHE management feature 343 * @details Global define to enable CACHE management at runtime 344 */ 345 #define MCAL_CACHE_RUNTIME_MNGMNT (STD_ON) 346 347 /** 348 * @brief number of EMIOS channels per each interrupt 349 * @details Platform specific Defines/Configurations for EMIOS. 350 * Can be 1U, 2U, 4U, etc.. depending on the platform 351 */ 352 #define EMIOS_CHANNELS_PER_INTERRUPT (4U) 353 /*================================================================================================== 354 * ENUMS 355 ==================================================================================================*/ 356 357 358 /*================================================================================================== 359 * STRUCTURES AND OTHER TYPEDEFS 360 ==================================================================================================*/ 361 362 363 /*================================================================================================== 364 * GLOBAL VARIABLE DECLARATIONS 365 ==================================================================================================*/ 366 /** 367 * @brief User Mode feature is enabled 368 * @details User Mode feature - MCAL is configured to run in supervisor mode, by default. 369 */ 370 371 #ifdef MCAL_ENABLE_SUPERVISOR_MODE 372 #undef MCAL_ENABLE_USER_MODE_SUPPORT 373 #endif 374 /*================================================================================================== 375 * FUNCTION PROTOTYPES 376 ==================================================================================================*/ 377 378 #ifdef __cplusplus 379 } 380 #endif 381 382 383 /** @} */ 384 385 #endif /* SOC_IPS_H */ 386
