Home
last modified time | relevance | path

Searched defs:EN (Results 1 – 22 of 22) sorted by relevance

/hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/cmsis/Device/RENESAS/Include/R9A08G045S/iodefines/
Dtsu_iodefine.h31 __IOM uint32_t EN : 1; member
Ddmac_b_iodefine.h44 __IM uint32_t EN : 1; member
/hal_renesas-latest/drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
DR7FA4L1BD.h483 … __IOM uint32_t EN : 1; /*!< [0..0] Bus interrupt request permission setting to ICU when member
1651 …__IOM uint16_t EN; /*!< (@ 0x00000000) MMPU enable register … member
8912 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
16527 …__IOM uint8_t EN : 1; /*!< [7..7] UART Operation Enable … member
16596 …__IOM uint8_t EN : 1; /*!< [7..7] UARTAn clock output function enable … member
DR7FA6M3AH.h1199 …__IOM uint32_t EN; /*!< (@ 0x00000000) Background Plane Setting Operation Control Regi… member
1203 …__IOM uint32_t EN : 1; /*!< [0..0] Background plane generation module operation enable … member
1302 …__IM uint32_t EN : 1; /*!< [0..0] Background plane generation module operation state monitor.… member
10893 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
12213 …__IOM uint32_t EN : 1; /*!< [0..0] Memory Mirror Function Enable … member
DR7FA8D1BH.h1577 …__IOM uint32_t EN; /*!< (@ 0x00000000) Background Plane Setting Operation Control Regi… member
1581 …__IOM uint32_t EN : 1; /*!< [0..0] Background plane generation module operation enable … member
1680 …__IM uint32_t EN : 1; /*!< [0..0] Background plane generation module operation state monitor.… member
2478 …__IOM uint16_t EN; /*!< (@ 0x00000000) MMPU enable register … member
10160 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
DR7FA2A1AB.h6859 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
7632 …__IOM uint32_t EN : 1; /*!< [0..0] Memory Mirror Function Enable … member
DR7FA4W1AD.h7038 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
7811 …__IOM uint32_t EN : 1; /*!< [0..0] Memory Mirror Function Enable … member
DR7FA4M2AD.h1193 …__IOM uint16_t EN; /*!< (@ 0x00000000) MMPU enable register … member
6928 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
DR7FA4M3AF.h1193 …__IOM uint16_t EN; /*!< (@ 0x00000000) MMPU enable register … member
6928 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
DR7FA4E2B9.h1648 …__IOM uint16_t EN; /*!< (@ 0x00000000) MMPU enable register … member
7298 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
DR7FA6E2BB.h1648 …__IOM uint16_t EN; /*!< (@ 0x00000000) MMPU enable register … member
7298 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
DR7FA6M1AD.h6892 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
7690 …__IOM uint32_t EN : 1; /*!< [0..0] Memory Mirror Function Enable … member
DR7FA6M4AF.h1193 …__IOM uint16_t EN; /*!< (@ 0x00000000) MMPU enable register … member
7691 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
DR7FA6M2AF.h7620 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
9555 …__IOM uint32_t EN : 1; /*!< [0..0] Memory Mirror Function Enable … member
DR7FA6M5BH.h1678 …__IOM uint16_t EN; /*!< (@ 0x00000000) MMPU enable register … member
8816 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
DR7FA8T1AH.h1652 …__IOM uint16_t EN; /*!< (@ 0x00000000) MMPU enable register … member
8536 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
DR7FA8M1AH.h1652 …__IOM uint16_t EN; /*!< (@ 0x00000000) MMPU enable register … member
8571 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
DR7FA2L1AB.h6924 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
DR7FA4E10D.h1193 …__IOM uint16_t EN; /*!< (@ 0x00000000) MMPU enable register … member
DR7FA6E10F.h1193 …__IOM uint16_t EN; /*!< (@ 0x00000000) MMPU enable register … member
DR7FA4M1AB.h7038 …__IOM uint32_t EN : 1; /*!< [8..8] Enable-Phase Output Control … member
/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/cmsis/Device/RENESAS/Include/
DR9A07G084.h834 …__IM uint32_t EN : 1; /*!< [0..0] DMA Activation Enable … member
1127 …__IOM uint32_t EN; /*!< (@ 0x00000000) PTP Timer Pulse Output Enable n Register … member
1541 …__IM uint32_t EN : 1; /*!< [0..0] Enable … member
30621 …__IOM uint32_t EN : 1; /*!< [0..0] Counter Enable … member