1 /*
2  * Copyright 2020-2023 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef EMIOS_PWM_IP_TYPES_H
8 #define EMIOS_PWM_IP_TYPES_H
9 
10 /**
11 *   @file       Emios_Pwm_Ip_Types.h
12 *
13 *   @addtogroup emios_pwm_ip Emios Pwm IPL
14 *   @{
15 */
16 
17 #ifdef __cplusplus
18 extern "C"{
19 #endif
20 
21 
22 /*==================================================================================================
23 *                                          INCLUDE FILES
24 * 1) system and project includes
25 * 2) needed interfaces from external units
26 * 3) internal and external interfaces from this unit
27 ==================================================================================================*/
28 #include "Std_Types.h"
29 #include "Emios_Pwm_Ip_CfgDefines.h"
30 /*==================================================================================================
31 *                                 SOURCE FILE VERSION INFORMATION
32 ==================================================================================================*/
33 #define EMIOS_PWM_IP_TYPES_VENDOR_ID                    43
34 #define EMIOS_PWM_IP_TYPES_MODULE_ID                    121
35 #define EMIOS_PWM_IP_TYPES_AR_RELEASE_MAJOR_VERSION     4
36 #define EMIOS_PWM_IP_TYPES_AR_RELEASE_MINOR_VERSION     7
37 #define EMIOS_PWM_IP_TYPES_AR_RELEASE_REVISION_VERSION  0
38 #define EMIOS_PWM_IP_TYPES_SW_MAJOR_VERSION             3
39 #define EMIOS_PWM_IP_TYPES_SW_MINOR_VERSION             0
40 #define EMIOS_PWM_IP_TYPES_SW_PATCH_VERSION             0
41 
42 /*==================================================================================================
43 *                                       FILE VERSION CHECKS
44 ==================================================================================================*/
45 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
46     /* Check if header file and Std_Types.h are of the same AUTOSAR version */
47     #if ((EMIOS_PWM_IP_TYPES_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
48          (EMIOS_PWM_IP_TYPES_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION))
49         #error "AUTOSAR Version Numbers of Emios_Pwm_Ip_Types.h and Std_Types.h are different"
50     #endif
51 #endif
52 
53 
54 /* Check if header file and Emios_Pwm_Ip_CfgDefines.h header file are of the same vendor */
55 #if (EMIOS_PWM_IP_TYPES_VENDOR_ID != EMIOS_PWM_IP_CFGDEFINES_VENDOR_ID)
56     #error "Vendor IDs of Emios_Pwm_Ip_Types.h and Emios_Pwm_Ip_CfgDefines.h are different."
57 #endif
58 
59 /* Check if header file and Emios_Pwm_Ip_CfgDefines.h header file are of the same AUTOSAR version */
60 #if ((EMIOS_PWM_IP_TYPES_AR_RELEASE_MAJOR_VERSION    != EMIOS_PWM_IP_CFGDEFINES_AR_RELEASE_MAJOR_VERSION) || \
61      (EMIOS_PWM_IP_TYPES_AR_RELEASE_MINOR_VERSION    != EMIOS_PWM_IP_CFGDEFINES_AR_RELEASE_MINOR_VERSION) || \
62      (EMIOS_PWM_IP_TYPES_AR_RELEASE_REVISION_VERSION != EMIOS_PWM_IP_CFGDEFINES_AR_RELEASE_REVISION_VERSION))
63     #error "AUTOSAR version numbers of Emios_Pwm_Ip_Types.h and Emios_Pwm_Ip_CfgDefines.h are different."
64 #endif
65 
66 /* Check if header file and Emios_Pwm_Ip_CfgDefines.h header file are of the same software version */
67 #if ((EMIOS_PWM_IP_TYPES_SW_MAJOR_VERSION != EMIOS_PWM_IP_CFGDEFINES_SW_MAJOR_VERSION) || \
68      (EMIOS_PWM_IP_TYPES_SW_MINOR_VERSION != EMIOS_PWM_IP_CFGDEFINES_SW_MINOR_VERSION) || \
69      (EMIOS_PWM_IP_TYPES_SW_PATCH_VERSION != EMIOS_PWM_IP_CFGDEFINES_SW_PATCH_VERSION))
70     #error "Software version numbers of Emios_Pwm_Ip_Types.h and Emios_Pwm_Ip_CfgDefines.h are different."
71 #endif
72 
73 /*==================================================================================================
74 *                                            CONSTANTS
75 ==================================================================================================*/
76 
77 /*==================================================================================================
78 *                                       DEFINES AND MACROS
79 ==================================================================================================*/
80 
81 /*==================================================================================================
82 *                                              ENUMS
83 ==================================================================================================*/
84 /**
85  * @brief       Status return codes.
86  * @details     Common error codes will be a unified enumeration (C enum) that will contain all error codes
87  *              (common and specific). There will be separate "error values spaces" (or slots), each of 256
88  *              positions, allocated per functionality.
89  */
90 typedef enum
91 {
92     /* Generic error codes */
93     /** @brief Generic operation success status */
94     EMIOS_PWM_IP_STATUS_SUCCESS                         = E_OK,
95     /** @brief Generic operation failure status */
96     EMIOS_PWM_IP_STATUS_ERROR                           = E_NOT_OK,
97     /** @brief Generic operation busy status */
98     EMIOS_PWM_IP_STATUS_BUSY                            = 0x002U,
99     /** @brief Generic operation timeout status */
100     EMIOS_PWM_IP_STATUS_TIMEOUT                         = 0x003U,
101     /** @brief Generic operation unsupported status */
102     EMIOS_PWM_IP_STATUS_UNSUPPORTED                     = 0x004U,
103 
104     /* EMIOS specific error codes */
105     /** @brief EMIOS unsuccessful attempt selecting wrong mode. */
106     EMIOS_PWM_IP_STATUS_WRONG_MODE                = 0xC00U,
107     /** @brief EMIOS counter bus overflow. */
108     EMIOS_PWM_IP_STATUS_CNT_BUS_OVERFLOW          = 0xC01U,
109     /** @brief EMIOS unsuccessful attempt selecting wrong counter bus. */
110     EMIOS_PWM_IP_STATUS_WRONG_CNT_BUS             = 0xC02U,
111     /** @brief EMIOS must set global allow enter debug mode first. */
112     EMIOS_PWM_IP_STATUS_GLOBAL_FREEZE_DISABLED    = 0xC03U,
113 } Emios_Pwm_Ip_StatusType;
114 
115 /**
116  * @brief       PWM output polarity
117  * @details     This enumeration specifies polarity type of Emios
118  */
119 typedef enum
120 {
121     /** @brief Output signal active low */
122     EMIOS_PWM_IP_ACTIVE_LOW            = 0x00U,
123     /** @brief Output signal active high */
124     EMIOS_PWM_IP_ACTIVE_HIGH           = 0x01U
125 } Emios_Pwm_Ip_PolarityType;
126 
127 /**
128  * @brief       PWM output pin state
129  * @details     This enumeration specifies output state of Emios channel pin
130  */
131 typedef enum
132 {
133     /** @brief Output signal low */
134     EMIOS_PWM_IP_OUTPUT_STATE_LOW      = 0x00U,
135     /** @brief Output signal high */
136     EMIOS_PWM_IP_OUTPUT_STATE_HIGH     = 0x01U
137 } Emios_Pwm_Ip_OutputStateType;
138 
139 #ifndef EMIOS_PWM_IP_PRESCALER_14BIT
140 /**
141  * @brief       Internal pre-scaler factor selection for the clock source.
142  * @details     This enumeration specifies the clock divider value for the internal prescaler of Emios
143  */
144 typedef enum
145 {
146     /** @brief Divide by 1 */
147     EMIOS_PWM_IP_CLOCK_DIV_1           = 0x00U,
148     /** @brief Divide by 2 */
149     EMIOS_PWM_IP_CLOCK_DIV_2           = 0x01U,
150     /** @brief Divide by 3 */
151     EMIOS_PWM_IP_CLOCK_DIV_3           = 0x02U,
152     /** @brief Divide by 4 */
153     EMIOS_PWM_IP_CLOCK_DIV_4           = 0x03U,
154     /** @brief Divide by 5 */
155     EMIOS_PWM_IP_CLOCK_DIV_5           = 0x04U,
156     /** @brief Divide by 6 */
157     EMIOS_PWM_IP_CLOCK_DIV_6           = 0x05U,
158     /** @brief Divide by 7 */
159     EMIOS_PWM_IP_CLOCK_DIV_7           = 0x06U,
160     /** @brief Divide by 8 */
161     EMIOS_PWM_IP_CLOCK_DIV_8           = 0x07U,
162     /** @brief Divide by 9 */
163     EMIOS_PWM_IP_CLOCK_DIV_9           = 0x08U,
164     /** @brief Divide by 10 */
165     EMIOS_PWM_IP_CLOCK_DIV_10          = 0x09U,
166     /** @brief Divide by 11 */
167     EMIOS_PWM_IP_CLOCK_DIV_11          = 0x0AU,
168     /** @brief Divide by 12 */
169     EMIOS_PWM_IP_CLOCK_DIV_12          = 0x0BU,
170     /** @brief Divide by 13 */
171     EMIOS_PWM_IP_CLOCK_DIV_13          = 0x0CU,
172     /** @brief Divide by 14 */
173     EMIOS_PWM_IP_CLOCK_DIV_14          = 0x0DU,
174     /** @brief Divide by 15 */
175     EMIOS_PWM_IP_CLOCK_DIV_15          = 0x0EU,
176     /** @brief Divide by 16 */
177     EMIOS_PWM_IP_CLOCK_DIV_16          = 0x0FU,
178     /** @brief Prescaler Disabled */
179     EMIOS_PWM_IP_CLOCK_NONE            = 0xFFU
180 } Emios_Pwm_Ip_InternalClkPsType;
181 #else
182 typedef uint16 Emios_Pwm_Ip_InternalClkPsType;
183 #endif
184 /**
185  * @brief       Internal prescaler source
186  * @details
187  */
188 typedef enum
189 {
190     EMIOS_PWM_IP_PS_SRC_PRESCALED_CLOCK    = 0x00U,
191     EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK       = 0x01U
192 } Emios_Pwm_Ip_InternalPsSrcType;
193 
194 /**
195  * @brief       Output Disable select
196  * @details     Select one of the four output disable input signals
197  */
198 typedef enum
199 {
200     /** @brief Channel output disable source 0 */
201     EMIOS_PWM_IP_OUTPUT_DISABLE_0            = 0x00U,
202     /** @brief Channel output disable source 1 */
203     EMIOS_PWM_IP_OUTPUT_DISABLE_1            = 0x01U,
204     /** @brief Channel output disable source 2 */
205     EMIOS_PWM_IP_OUTPUT_DISABLE_2            = 0x02U,
206     /** @brief Channel output disable source 3 */
207     EMIOS_PWM_IP_OUTPUT_DISABLE_3            = 0x03U,
208     /** @brief Channel output disable not used */
209     EMIOS_PWM_IP_OUTPUT_DISABLE_NONE         = 0xFFU,
210 } Emios_Pwm_Ip_OutDisableSourceType;
211 
212 /**
213  * @brief       Interrupt types enabled for the channel
214  * @details     This enumeration specifies interrupt type of Emios
215  */
216 typedef enum
217 {
218     /** @brief Interrupt/DMA requests are disabled */
219     EMIOS_PWM_IP_NOTIFICATION_DISABLED     = 0x00U,
220     /** @brief Interrupt requests are generated on FLAGs */
221     EMIOS_PWM_IP_INTERRUPT_REQUEST         = 0x01U,
222     /** @brief DMA requests are generated on FLAGs */
223     EMIOS_PWM_IP_DMA_REQUEST               = 0x02U
224 } Emios_Pwm_Ip_InterruptType;
225 
226 /**
227  * @brief   Counter bus select.
228  * @details Select either one of the counter buses or the internal counter to be used by the Unified Channel.
229  */
230 typedef enum
231 {
232     /** @brief Global counter bus A */
233     EMIOS_PWM_IP_BUS_A                   = 0x00U,
234     /** @brief Local group counter bus */
235     EMIOS_PWM_IP_BUS_BCDE                = 0x01U,
236     /** @brief Global counter bus F */
237     EMIOS_PWM_IP_BUS_F                   = 0x02U,
238     /** @brief Internal counter bus */
239     EMIOS_PWM_IP_BUS_INTERNAL            = 0x03U
240 } Emios_Pwm_Ip_CounterBusSourceType;
241 
242 /**
243 * @brief    Supported channel PWM modes
244 * @details  This enumeration specifies mode type of Emios
245 */
246 typedef enum
247 {
248     /** @brief GPIO (output) */
249     EMIOS_PWM_IP_MODE_GPO                          = 0x01U,
250     /** @brief Double Action Output Compare.
251      *  FLAGs are generated only on B1 matches. */
252     EMIOS_PWM_IP_MODE_DAOC_FLAG                    = 0x06U,
253     /** @brief Double Action Output Compare.
254      *  FLAGs are generated only on A1 & B1 matches. */
255     EMIOS_PWM_IP_MODE_DAOC_FLAG_BOTH               = 0x07U,
256     /** @brief Center Aligned Output Pulse Width Modulation (with trail edge dead-time).
257      *  FLAGs are generated on the trailing edge. */
258     EMIOS_PWM_IP_MODE_OPWMC_TRAIL_EDGE_FLAG       = 0x1CU,
259     /** @brief Center Aligned Output Pulse Width Modulation (with trail edge dead-time).
260      *  FLAGs are generated on the both edges */
261     EMIOS_PWM_IP_MODE_OPWMC_TRAIL_EDGE_FLAG_BOTH  = 0x1EU,
262     /** @brief Center Aligned Output Pulse Width Modulation (with lead edge dead-time).
263      *  FLAG are generated on the leading edge */
264     EMIOS_PWM_IP_MODE_OPWMC_LEAD_EDGE_FLAG        = 0x1DU,
265     /** @brief Center Aligned Output Pulse Width Modulation (with lead edge dead-time).
266      *  FLAG are generated in the both edges */
267     EMIOS_PWM_IP_MODE_OPWMC_LEAD_EDGE_FLAG_BOTH   = 0x1FU,
268     /** @brief Output Pulse-Width Modulation with Trigger */
269     EMIOS_PWM_IP_MODE_OPWMT                        = 0x26U,
270     /** @brief Output Pulse Width and Frequency Modulation Buffered.
271      *  FLAGs are generated only on B1 matches. */
272     EMIOS_PWM_IP_MODE_OPWFMB_FLAG                  = 0x58U,
273     /** @brief Output Pulse Width and Frequency Modulation Buffered.
274      *  FLAGs are generated on both A1 & B1 matches. */
275     EMIOS_PWM_IP_MODE_OPWFMB_FLAG_BOTH             = 0x5AU,
276     /** @brief Center Aligned Output Pulse Width Modulation Buffered (with trail edge dead-time).
277      *  FLAGs are generated on the trailing edge. */
278     EMIOS_PWM_IP_MODE_OPWMCB_TRAIL_EDGE_FLAG       = 0x5CU,
279     /** @brief Center Aligned Output Pulse Width Modulation Buffered (with trail edge dead-time).
280      *  FLAGs are generated on the both edges */
281     EMIOS_PWM_IP_MODE_OPWMCB_TRAIL_EDGE_FLAG_BOTH  = 0x5EU,
282     /** @brief Center Aligned Output Pulse Width Modulation Buffered (with lead edge dead-time).
283      *  FLAG are generated on the leading edge */
284     EMIOS_PWM_IP_MODE_OPWMCB_LEAD_EDGE_FLAG        = 0x5DU,
285     /** @brief Center Aligned Output Pulse Width Modulation Buffered (with lead edge dead-time).
286      *  FLAG are generated in the both edges */
287     EMIOS_PWM_IP_MODE_OPWMCB_LEAD_EDGE_FLAG_BOTH   = 0x5FU,
288     /** @brief Output Pulse Width Modulation Buffered.
289      *  FLAGs are generated only on trailing matches */
290     EMIOS_PWM_IP_MODE_OPWMB_FLAG                   = 0x60U,
291     /** @brief Output Pulse Width Modulation Buffered.
292      *  FLAGs are generated on both leading and trailing matches */
293     EMIOS_PWM_IP_MODE_OPWMB_FLAG_BOTH              = 0x62U,
294     /** @brief Output Pulse Width Modulation (immediate update).
295      *  FLAGs are generated only on trailing matches */
296     EMIOS_PWM_IP_MODE_OPWM_IMMEDIATE_UPDATE_FLAG   = 0x20U,
297     /** @brief Output Pulse Width Modulation (immediate update).
298      *  FLAGs are generated on both leading and trailing matches */
299     EMIOS_PWM_IP_MODE_OPWM_IMMEDIATE_UPDATE_FLAG_BOTH  = 0x22U,
300     /** @brief Output Pulse Width Modulation (next period update).
301      *  FLAGs are generated only on trailing matches */
302     EMIOS_PWM_IP_MODE_OPWM_NEXT_PERIOD_UPDATE_FLAG  = 0x21U,
303     /** @brief Output Pulse Width Modulation (next period update).
304      *  FLAGs are generated on both leading and trailing matches */
305     EMIOS_PWM_IP_MODE_OPWM_NEXT_PERIOD_UPDATE_FLAG_BOTH  = 0x23U,
306     /** @brief Output Pulse Width and Frequency Modulation (immediate update).
307      *  FLAGs are generated only on BS1 matches. */
308     EMIOS_PWM_IP_MODE_OPWFM_IMMEDIATE_UPDATE_FLAG = 0x18U,
309     /** @brief Output Pulse Width and Frequency Modulation (immediate update).
310      *  FLAGs are generated on both AS1 & BS1 matches. */
311     EMIOS_PWM_IP_MODE_OPWFM_IMMEDIATE_UPDATE_FLAG_BOTH = 0x1AU,
312     /** @brief Output Pulse Width and Frequency Modulation (next period update).
313      *  FLAGs are generated only on BS1 matches. */
314     EMIOS_PWM_IP_MODE_OPWFM_NEXT_PERIOD_UPDATE_FLAG = 0x19U,
315     /** @brief Output Pulse Width and Frequency Modulation (next period update).
316      *  FLAGs are generated on both AS1 & BS1 matches. */
317     EMIOS_PWM_IP_MODE_OPWFM_NEXT_PERIOD_UPDATE_FLAG_BOTH = 0x1BU,
318     /* @brief Undefination mode*/
319     EMIOS_PWM_IP_MODE_NODEFINE                     = 0xFFU
320 } Emios_Pwm_Ip_PwmModeType;
321 
322 /*==================================================================================================
323 *                                  STRUCTURES AND OTHER TYPEDEFS
324 ==================================================================================================*/
325 #if (defined (EMIOS_PWM_IP_NOTIFICATION_SUPPORT) && (EMIOS_PWM_IP_NOTIFICATION_SUPPORT == STD_ON))
326 /**
327  * @brief       Notification function callback type.
328  */
329 typedef void (* Emios_Pwm_Ip_CallbackType)(uint8 param);
330 
331 /**
332  * @brief       Structure for notification
333  * @details     The structure used to notification
334  */
335 typedef struct
336 {
337     /** @brief Callback function pointer */
338     Emios_Pwm_Ip_CallbackType       CbFunction;
339     /** @brief Callback function parameter pointer */
340     uint8                           CbParameter;
341 } Emios_Pwm_Ip_NotificationType;
342 #else
343 /**
344  * @brief       Notification function callback type.
345  */
346 typedef void (* Emios_Pwm_Ip_CallbackType)(void * Param);
347 
348 /**
349  * @brief       Structure for notification
350  * @details     The structure used to notification
351  */
352 typedef struct
353 {
354     /** @brief Callback function pointer */
355     Emios_Pwm_Ip_CallbackType       CbFunction;
356     /** @brief Callback function parameter pointer */
357     void                          * CbParameter;
358 } Emios_Pwm_Ip_NotificationType;
359 #endif
360 
361 /**
362 * @internal
363 * @brief     PWM configuration parameters structure
364 * @details   Emios IP specific channel configuration structure type
365 */
366 typedef struct
367 {
368     /** @brief Emios channel number */
369     uint8                               ChannelId;
370     /** @brief Sub-mode selected */
371     Emios_Pwm_Ip_PwmModeType            Mode;
372     /** @brief Counter bus selected, ignore with OPWFM mode */
373     Emios_Pwm_Ip_CounterBusSourceType   Timebase;
374     /** @brief Debug mode support enable */
375     boolean                             DebugMode;
376     /** @brief Select source for Output Disable feature */
377     Emios_Pwm_Ip_OutDisableSourceType   OutputDisableSource;
378     #ifdef EMIOS_PWM_IP_PRESCALER_14BIT
379     /** @brief Internal prescaler selection */
380     uint16                              InternalPs;
381     /** @brief Internal prescaler alternate selection */
382     uint16                              InternalPsAlt;
383     #else
384     /** @brief Internal prescaler selection */
385     Emios_Pwm_Ip_InternalClkPsType      InternalPs;
386     /** @brief Internal prescaler alternate selection */
387     Emios_Pwm_Ip_InternalClkPsType      InternalPsAlt;
388     #endif
389     /** @brief Internal prescaler source */
390     Emios_Pwm_Ip_InternalPsSrcType      InternalPsSrc;
391     /** @brief Output active value, Choose active low or high level */
392     Emios_Pwm_Ip_PolarityType           OutputPolarity;
393     /** @brief Interrupt mode */
394     Emios_Pwm_Ip_InterruptType          IrqMode;
395     /** @brief Interrupt callback */
396     Emios_Pwm_Ip_NotificationType       UserCallback;
397 #ifdef EMIOS_PWM_IP_TIMER_WIDTH_24BITS
398     /** @brief Period count for OPWFM mode only */
399     uint32                              PeriodCount;
400     /** @brief Duty cycle count */
401     uint32                              DutyCycle;
402     /** @brief Phase shift of the pwm used in OPWMCB, OPWMT */
403     uint32                              PhaseShift;
404     /** @brief The dead time value and is compared against the internal counter, for OPWMCB only */
405     uint32                              DeadTime;
406     /** @brief Trigger Event placement, for OPWMT mode only */
407     uint32                              TriggerPosition;
408 #else
409     /** @brief Period count for OPWFM mode only */
410     uint16                              PeriodCount;
411     /** @brief Duty cycle count */
412     uint16                              DutyCycle;
413     /** @brief Phase shift of the pwm used in OPWMCB, OPWMT */
414     uint16                              PhaseShift;
415     /** @brief The dead time value and is compared against the internal counter, for OPWMCB only */
416     uint16                              DeadTime;
417     /** @brief Trigger Event placement, for OPWMT mode only */
418     uint16                              TriggerPosition;
419 #endif
420 } Emios_Pwm_Ip_ChannelConfigType;
421 
422 /*==================================================================================================
423 *                                  GLOBAL VARIABLE DECLARATIONS
424 ==================================================================================================*/
425 
426 /*==================================================================================================
427 *                                       FUNCTION PROTOTYPES
428 ==================================================================================================*/
429 
430 
431 #ifdef __cplusplus
432 }
433 #endif
434 
435 /** @} */
436 
437 #endif /* EMIOS_PWM_IP_TYPES_H */
438