1 /* 2 * Copyright 2020-2023 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef EMIOS_MCL_IP_IRQ_H 8 #define EMIOS_MCL_IP_IRQ_H 9 10 /** 11 * @file Emios_Mcl_Ip_Irq.h 12 * 13 * @brief AUTOSAR Mcl EMIOS interrupt common part. 14 * 15 * @addtogroup 16 * @{ 17 */ 18 19 #ifdef __cplusplus 20 extern "C"{ 21 #endif 22 23 /*================================================================================================== 24 * INCLUDE FILES 25 * 1) system and project includes 26 * 2) needed interfaces from external units 27 * 3) internal and external interfaces from this unit 28 ==================================================================================================*/ 29 #include "OsIf.h" 30 #include "Emios_Mcl_Ip_Cfg_Defines.h" 31 32 /*================================================================================================== 33 * HEADER FILE VERSION INFORMATION 34 ==================================================================================================*/ 35 #define EMIOS_MCL_IP_IRQ_VENDOR_ID 43 36 #define EMIOS_MCL_IP_IRQ_AR_RELEASE_MAJOR_VERSION 4 37 #define EMIOS_MCL_IP_IRQ_AR_RELEASE_MINOR_VERSION 7 38 #define EMIOS_MCL_IP_IRQ_AR_RELEASE_REVISION_VERSION 0 39 #define EMIOS_MCL_IP_IRQ_SW_MAJOR_VERSION 3 40 #define EMIOS_MCL_IP_IRQ_SW_MINOR_VERSION 0 41 #define EMIOS_MCL_IP_IRQ_SW_PATCH_VERSION 0 42 /*================================================================================================== 43 * FILE VERSION CHECKS 44 ==================================================================================================*/ 45 #if (EMIOS_MCL_IP_IRQ_VENDOR_ID != EMIOS_MCL_IP_CFG_DEFINES_VENDOR_ID) 46 #error "Emios_Mcl_Ip_Irq.h and Emios_Mcl_Ip_Cfg_Defines.h have different vendor ids" 47 #endif 48 49 /* Check if header file and Emios_Mcl_Ip_Cfg_Defines.h file are of the same Autosar version */ 50 #if ((EMIOS_MCL_IP_IRQ_AR_RELEASE_MAJOR_VERSION != EMIOS_MCL_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION) || \ 51 (EMIOS_MCL_IP_IRQ_AR_RELEASE_MINOR_VERSION != EMIOS_MCL_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION) || \ 52 (EMIOS_MCL_IP_IRQ_AR_RELEASE_REVISION_VERSION != EMIOS_MCL_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION)) 53 #error "AutoSar Version Numbers of Emios_Mcl_Ip_Irq.h and Emios_Mcl_Ip_Cfg_Defines.h are different" 54 #endif 55 56 /* Check if header file and Emios_Mcl_Ip_Cfg_Defines.h file are of the same Software version */ 57 #if ((EMIOS_MCL_IP_IRQ_SW_MAJOR_VERSION != EMIOS_MCL_IP_CFG_DEFINES_SW_MAJOR_VERSION) || \ 58 (EMIOS_MCL_IP_IRQ_SW_MINOR_VERSION != EMIOS_MCL_IP_CFG_DEFINES_SW_MINOR_VERSION) || \ 59 (EMIOS_MCL_IP_IRQ_SW_PATCH_VERSION != EMIOS_MCL_IP_CFG_DEFINES_SW_PATCH_VERSION)) 60 #error "Software Version Numbers of Emios_Mcl_Ip_Irq.h and Emios_Mcl_Ip_Cfg_Defines.h are different" 61 #endif 62 63 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK 64 65 /* Check if this header file and OsIf.h file are of the same Autosar version */ 66 #if ((EMIOS_MCL_IP_IRQ_AR_RELEASE_MAJOR_VERSION != OSIF_AR_RELEASE_MAJOR_VERSION) || \ 67 (EMIOS_MCL_IP_IRQ_AR_RELEASE_MINOR_VERSION != OSIF_AR_RELEASE_MINOR_VERSION)) 68 #error "AutoSar Version Numbers of Emios_Mcl_Ip_Irq.h and OsIf.h are different" 69 #endif 70 71 #endif 72 73 /*================================================================================================== 74 * CONSTANTS 75 ==================================================================================================*/ 76 77 /*================================================================================================== 78 * DEFINES AND MACROS 79 ==================================================================================================*/ 80 81 /*================================================================================================== 82 * ENUMS 83 ==================================================================================================*/ 84 85 /*================================================================================================== 86 * STRUCTURES AND OTHER TYPEDEFS 87 ==================================================================================================*/ 88 89 /*================================================================================================== 90 * GLOBAL VARIABLE DECLARATIONS 91 ==================================================================================================*/ 92 93 /*================================================================================================== 94 * FUNCTION PROTOTYPES 95 ==================================================================================================*/ 96 #if (\ 97 (defined GPT_EMIOS_0_CH_0_ISR_USED) ||\ 98 (defined GPT_EMIOS_0_CH_1_ISR_USED) ||\ 99 (defined GPT_EMIOS_0_CH_2_ISR_USED) ||\ 100 (defined GPT_EMIOS_0_CH_3_ISR_USED) ||\ 101 (defined GPT_EMIOS_0_CH_4_ISR_USED) ||\ 102 (defined GPT_EMIOS_0_CH_5_ISR_USED) ||\ 103 (defined GPT_EMIOS_0_CH_6_ISR_USED) ||\ 104 (defined GPT_EMIOS_0_CH_7_ISR_USED) ||\ 105 (defined GPT_EMIOS_0_CH_8_ISR_USED) ||\ 106 (defined GPT_EMIOS_0_CH_9_ISR_USED) ||\ 107 (defined GPT_EMIOS_0_CH_10_ISR_USED) ||\ 108 (defined GPT_EMIOS_0_CH_11_ISR_USED) ||\ 109 (defined GPT_EMIOS_0_CH_12_ISR_USED) ||\ 110 (defined GPT_EMIOS_0_CH_13_ISR_USED) ||\ 111 (defined GPT_EMIOS_0_CH_14_ISR_USED) ||\ 112 (defined GPT_EMIOS_0_CH_15_ISR_USED) ||\ 113 (defined GPT_EMIOS_0_CH_16_ISR_USED) ||\ 114 (defined GPT_EMIOS_0_CH_17_ISR_USED) ||\ 115 (defined GPT_EMIOS_0_CH_18_ISR_USED) ||\ 116 (defined GPT_EMIOS_0_CH_19_ISR_USED) ||\ 117 (defined GPT_EMIOS_0_CH_20_ISR_USED) ||\ 118 (defined GPT_EMIOS_0_CH_21_ISR_USED) ||\ 119 (defined GPT_EMIOS_0_CH_22_ISR_USED) ||\ 120 (defined GPT_EMIOS_0_CH_23_ISR_USED) ||\ 121 (defined GPT_EMIOS_0_CH_24_ISR_USED) ||\ 122 (defined GPT_EMIOS_0_CH_25_ISR_USED) ||\ 123 (defined GPT_EMIOS_0_CH_26_ISR_USED) ||\ 124 (defined GPT_EMIOS_0_CH_27_ISR_USED) ||\ 125 (defined GPT_EMIOS_0_CH_28_ISR_USED) ||\ 126 (defined GPT_EMIOS_0_CH_29_ISR_USED) ||\ 127 (defined GPT_EMIOS_0_CH_30_ISR_USED) ||\ 128 (defined GPT_EMIOS_0_CH_31_ISR_USED) ||\ 129 (defined GPT_EMIOS_1_CH_0_ISR_USED) ||\ 130 (defined GPT_EMIOS_1_CH_1_ISR_USED) ||\ 131 (defined GPT_EMIOS_1_CH_2_ISR_USED) ||\ 132 (defined GPT_EMIOS_1_CH_3_ISR_USED) ||\ 133 (defined GPT_EMIOS_1_CH_4_ISR_USED) ||\ 134 (defined GPT_EMIOS_1_CH_5_ISR_USED) ||\ 135 (defined GPT_EMIOS_1_CH_6_ISR_USED) ||\ 136 (defined GPT_EMIOS_1_CH_7_ISR_USED) ||\ 137 (defined GPT_EMIOS_1_CH_8_ISR_USED) ||\ 138 (defined GPT_EMIOS_1_CH_9_ISR_USED) ||\ 139 (defined GPT_EMIOS_1_CH_10_ISR_USED) ||\ 140 (defined GPT_EMIOS_1_CH_11_ISR_USED) ||\ 141 (defined GPT_EMIOS_1_CH_12_ISR_USED) ||\ 142 (defined GPT_EMIOS_1_CH_13_ISR_USED) ||\ 143 (defined GPT_EMIOS_1_CH_14_ISR_USED) ||\ 144 (defined GPT_EMIOS_1_CH_15_ISR_USED) ||\ 145 (defined GPT_EMIOS_1_CH_16_ISR_USED) ||\ 146 (defined GPT_EMIOS_1_CH_17_ISR_USED) ||\ 147 (defined GPT_EMIOS_1_CH_18_ISR_USED) ||\ 148 (defined GPT_EMIOS_1_CH_19_ISR_USED) ||\ 149 (defined GPT_EMIOS_1_CH_20_ISR_USED) ||\ 150 (defined GPT_EMIOS_1_CH_21_ISR_USED) ||\ 151 (defined GPT_EMIOS_1_CH_22_ISR_USED) ||\ 152 (defined GPT_EMIOS_1_CH_23_ISR_USED) ||\ 153 (defined GPT_EMIOS_1_CH_24_ISR_USED) ||\ 154 (defined GPT_EMIOS_1_CH_25_ISR_USED) ||\ 155 (defined GPT_EMIOS_1_CH_26_ISR_USED) ||\ 156 (defined GPT_EMIOS_1_CH_27_ISR_USED) ||\ 157 (defined GPT_EMIOS_1_CH_28_ISR_USED) ||\ 158 (defined GPT_EMIOS_1_CH_29_ISR_USED) ||\ 159 (defined GPT_EMIOS_1_CH_30_ISR_USED) ||\ 160 (defined GPT_EMIOS_1_CH_31_ISR_USED) ||\ 161 (defined GPT_EMIOS_2_CH_0_ISR_USED) ||\ 162 (defined GPT_EMIOS_2_CH_1_ISR_USED) ||\ 163 (defined GPT_EMIOS_2_CH_2_ISR_USED) ||\ 164 (defined GPT_EMIOS_2_CH_3_ISR_USED) ||\ 165 (defined GPT_EMIOS_2_CH_4_ISR_USED) ||\ 166 (defined GPT_EMIOS_2_CH_5_ISR_USED) ||\ 167 (defined GPT_EMIOS_2_CH_6_ISR_USED) ||\ 168 (defined GPT_EMIOS_2_CH_7_ISR_USED) ||\ 169 (defined GPT_EMIOS_2_CH_8_ISR_USED) ||\ 170 (defined GPT_EMIOS_2_CH_9_ISR_USED) ||\ 171 (defined GPT_EMIOS_2_CH_10_ISR_USED) ||\ 172 (defined GPT_EMIOS_2_CH_11_ISR_USED) ||\ 173 (defined GPT_EMIOS_2_CH_12_ISR_USED) ||\ 174 (defined GPT_EMIOS_2_CH_13_ISR_USED) ||\ 175 (defined GPT_EMIOS_2_CH_14_ISR_USED) ||\ 176 (defined GPT_EMIOS_2_CH_15_ISR_USED) ||\ 177 (defined GPT_EMIOS_2_CH_16_ISR_USED) ||\ 178 (defined GPT_EMIOS_2_CH_17_ISR_USED) ||\ 179 (defined GPT_EMIOS_2_CH_18_ISR_USED) ||\ 180 (defined GPT_EMIOS_2_CH_19_ISR_USED) ||\ 181 (defined GPT_EMIOS_2_CH_20_ISR_USED) ||\ 182 (defined GPT_EMIOS_2_CH_21_ISR_USED) ||\ 183 (defined GPT_EMIOS_2_CH_22_ISR_USED) ||\ 184 (defined GPT_EMIOS_2_CH_23_ISR_USED) ||\ 185 (defined GPT_EMIOS_2_CH_24_ISR_USED) ||\ 186 (defined GPT_EMIOS_2_CH_25_ISR_USED) ||\ 187 (defined GPT_EMIOS_2_CH_26_ISR_USED) ||\ 188 (defined GPT_EMIOS_2_CH_27_ISR_USED) ||\ 189 (defined GPT_EMIOS_2_CH_28_ISR_USED) ||\ 190 (defined GPT_EMIOS_2_CH_29_ISR_USED) ||\ 191 (defined GPT_EMIOS_2_CH_30_ISR_USED) ||\ 192 (defined GPT_EMIOS_2_CH_31_ISR_USED)\ 193 ) 194 195 extern void Emios_Gpt_Ip_IrqHandler(uint8 instance, uint8 channel); 196 #endif 197 #if (\ 198 (defined ICU_EMIOS_0_CH_0_ISR_USED) ||\ 199 (defined ICU_EMIOS_0_CH_1_ISR_USED) ||\ 200 (defined ICU_EMIOS_0_CH_2_ISR_USED) ||\ 201 (defined ICU_EMIOS_0_CH_3_ISR_USED) ||\ 202 (defined ICU_EMIOS_0_CH_4_ISR_USED) ||\ 203 (defined ICU_EMIOS_0_CH_5_ISR_USED) ||\ 204 (defined ICU_EMIOS_0_CH_6_ISR_USED) ||\ 205 (defined ICU_EMIOS_0_CH_7_ISR_USED) ||\ 206 (defined ICU_EMIOS_0_CH_8_ISR_USED) ||\ 207 (defined ICU_EMIOS_0_CH_9_ISR_USED) ||\ 208 (defined ICU_EMIOS_0_CH_10_ISR_USED) ||\ 209 (defined ICU_EMIOS_0_CH_11_ISR_USED) ||\ 210 (defined ICU_EMIOS_0_CH_12_ISR_USED) ||\ 211 (defined ICU_EMIOS_0_CH_13_ISR_USED) ||\ 212 (defined ICU_EMIOS_0_CH_14_ISR_USED) ||\ 213 (defined ICU_EMIOS_0_CH_15_ISR_USED) ||\ 214 (defined ICU_EMIOS_0_CH_16_ISR_USED) ||\ 215 (defined ICU_EMIOS_0_CH_17_ISR_USED) ||\ 216 (defined ICU_EMIOS_0_CH_18_ISR_USED) ||\ 217 (defined ICU_EMIOS_0_CH_19_ISR_USED) ||\ 218 (defined ICU_EMIOS_0_CH_20_ISR_USED) ||\ 219 (defined ICU_EMIOS_0_CH_21_ISR_USED) ||\ 220 (defined ICU_EMIOS_0_CH_22_ISR_USED) ||\ 221 (defined ICU_EMIOS_0_CH_23_ISR_USED) ||\ 222 (defined ICU_EMIOS_0_CH_24_ISR_USED) ||\ 223 (defined ICU_EMIOS_0_CH_25_ISR_USED) ||\ 224 (defined ICU_EMIOS_0_CH_26_ISR_USED) ||\ 225 (defined ICU_EMIOS_0_CH_27_ISR_USED) ||\ 226 (defined ICU_EMIOS_0_CH_28_ISR_USED) ||\ 227 (defined ICU_EMIOS_0_CH_29_ISR_USED) ||\ 228 (defined ICU_EMIOS_0_CH_30_ISR_USED) ||\ 229 (defined ICU_EMIOS_0_CH_31_ISR_USED) ||\ 230 (defined ICU_EMIOS_1_CH_0_ISR_USED) ||\ 231 (defined ICU_EMIOS_1_CH_1_ISR_USED) ||\ 232 (defined ICU_EMIOS_1_CH_2_ISR_USED) ||\ 233 (defined ICU_EMIOS_1_CH_3_ISR_USED) ||\ 234 (defined ICU_EMIOS_1_CH_4_ISR_USED) ||\ 235 (defined ICU_EMIOS_1_CH_5_ISR_USED) ||\ 236 (defined ICU_EMIOS_1_CH_6_ISR_USED) ||\ 237 (defined ICU_EMIOS_1_CH_7_ISR_USED) ||\ 238 (defined ICU_EMIOS_1_CH_8_ISR_USED) ||\ 239 (defined ICU_EMIOS_1_CH_9_ISR_USED) ||\ 240 (defined ICU_EMIOS_1_CH_10_ISR_USED) ||\ 241 (defined ICU_EMIOS_1_CH_11_ISR_USED) ||\ 242 (defined ICU_EMIOS_1_CH_12_ISR_USED) ||\ 243 (defined ICU_EMIOS_1_CH_13_ISR_USED) ||\ 244 (defined ICU_EMIOS_1_CH_14_ISR_USED) ||\ 245 (defined ICU_EMIOS_1_CH_15_ISR_USED) ||\ 246 (defined ICU_EMIOS_1_CH_16_ISR_USED) ||\ 247 (defined ICU_EMIOS_1_CH_17_ISR_USED) ||\ 248 (defined ICU_EMIOS_1_CH_18_ISR_USED) ||\ 249 (defined ICU_EMIOS_1_CH_19_ISR_USED) ||\ 250 (defined ICU_EMIOS_1_CH_20_ISR_USED) ||\ 251 (defined ICU_EMIOS_1_CH_21_ISR_USED) ||\ 252 (defined ICU_EMIOS_1_CH_22_ISR_USED) ||\ 253 (defined ICU_EMIOS_1_CH_23_ISR_USED) ||\ 254 (defined ICU_EMIOS_1_CH_24_ISR_USED) ||\ 255 (defined ICU_EMIOS_1_CH_25_ISR_USED) ||\ 256 (defined ICU_EMIOS_1_CH_26_ISR_USED) ||\ 257 (defined ICU_EMIOS_1_CH_27_ISR_USED) ||\ 258 (defined ICU_EMIOS_1_CH_28_ISR_USED) ||\ 259 (defined ICU_EMIOS_1_CH_29_ISR_USED) ||\ 260 (defined ICU_EMIOS_1_CH_30_ISR_USED) ||\ 261 (defined ICU_EMIOS_1_CH_31_ISR_USED) ||\ 262 (defined ICU_EMIOS_2_CH_0_ISR_USED) ||\ 263 (defined ICU_EMIOS_2_CH_1_ISR_USED) ||\ 264 (defined ICU_EMIOS_2_CH_2_ISR_USED) ||\ 265 (defined ICU_EMIOS_2_CH_3_ISR_USED) ||\ 266 (defined ICU_EMIOS_2_CH_4_ISR_USED) ||\ 267 (defined ICU_EMIOS_2_CH_5_ISR_USED) ||\ 268 (defined ICU_EMIOS_2_CH_6_ISR_USED) ||\ 269 (defined ICU_EMIOS_2_CH_7_ISR_USED) ||\ 270 (defined ICU_EMIOS_2_CH_8_ISR_USED) ||\ 271 (defined ICU_EMIOS_2_CH_9_ISR_USED) ||\ 272 (defined ICU_EMIOS_2_CH_10_ISR_USED) ||\ 273 (defined ICU_EMIOS_2_CH_11_ISR_USED) ||\ 274 (defined ICU_EMIOS_2_CH_12_ISR_USED) ||\ 275 (defined ICU_EMIOS_2_CH_13_ISR_USED) ||\ 276 (defined ICU_EMIOS_2_CH_14_ISR_USED) ||\ 277 (defined ICU_EMIOS_2_CH_15_ISR_USED) ||\ 278 (defined ICU_EMIOS_2_CH_16_ISR_USED) ||\ 279 (defined ICU_EMIOS_2_CH_17_ISR_USED) ||\ 280 (defined ICU_EMIOS_2_CH_18_ISR_USED) ||\ 281 (defined ICU_EMIOS_2_CH_19_ISR_USED) ||\ 282 (defined ICU_EMIOS_2_CH_20_ISR_USED) ||\ 283 (defined ICU_EMIOS_2_CH_21_ISR_USED) ||\ 284 (defined ICU_EMIOS_2_CH_22_ISR_USED) ||\ 285 (defined ICU_EMIOS_2_CH_23_ISR_USED) ||\ 286 (defined ICU_EMIOS_2_CH_24_ISR_USED) ||\ 287 (defined ICU_EMIOS_2_CH_25_ISR_USED) ||\ 288 (defined ICU_EMIOS_2_CH_26_ISR_USED) ||\ 289 (defined ICU_EMIOS_2_CH_27_ISR_USED) ||\ 290 (defined ICU_EMIOS_2_CH_28_ISR_USED) ||\ 291 (defined ICU_EMIOS_2_CH_29_ISR_USED) ||\ 292 (defined ICU_EMIOS_2_CH_30_ISR_USED) ||\ 293 (defined ICU_EMIOS_2_CH_31_ISR_USED)\ 294 ) 295 296 extern void Emios_Icu_Ip_IrqHandler(uint8 instance, uint8 channel); 297 #endif 298 #if (\ 299 (defined OCU_EMIOS_0_CH_0_ISR_USED) ||\ 300 (defined OCU_EMIOS_0_CH_1_ISR_USED) ||\ 301 (defined OCU_EMIOS_0_CH_2_ISR_USED) ||\ 302 (defined OCU_EMIOS_0_CH_3_ISR_USED) ||\ 303 (defined OCU_EMIOS_0_CH_4_ISR_USED) ||\ 304 (defined OCU_EMIOS_0_CH_5_ISR_USED) ||\ 305 (defined OCU_EMIOS_0_CH_6_ISR_USED) ||\ 306 (defined OCU_EMIOS_0_CH_7_ISR_USED) ||\ 307 (defined OCU_EMIOS_0_CH_8_ISR_USED) ||\ 308 (defined OCU_EMIOS_0_CH_9_ISR_USED) ||\ 309 (defined OCU_EMIOS_0_CH_10_ISR_USED) ||\ 310 (defined OCU_EMIOS_0_CH_11_ISR_USED) ||\ 311 (defined OCU_EMIOS_0_CH_12_ISR_USED) ||\ 312 (defined OCU_EMIOS_0_CH_13_ISR_USED) ||\ 313 (defined OCU_EMIOS_0_CH_14_ISR_USED) ||\ 314 (defined OCU_EMIOS_0_CH_15_ISR_USED) ||\ 315 (defined OCU_EMIOS_0_CH_16_ISR_USED) ||\ 316 (defined OCU_EMIOS_0_CH_17_ISR_USED) ||\ 317 (defined OCU_EMIOS_0_CH_18_ISR_USED) ||\ 318 (defined OCU_EMIOS_0_CH_19_ISR_USED) ||\ 319 (defined OCU_EMIOS_0_CH_20_ISR_USED) ||\ 320 (defined OCU_EMIOS_0_CH_21_ISR_USED) ||\ 321 (defined OCU_EMIOS_0_CH_22_ISR_USED) ||\ 322 (defined OCU_EMIOS_0_CH_23_ISR_USED) ||\ 323 (defined OCU_EMIOS_0_CH_24_ISR_USED) ||\ 324 (defined OCU_EMIOS_0_CH_25_ISR_USED) ||\ 325 (defined OCU_EMIOS_0_CH_26_ISR_USED) ||\ 326 (defined OCU_EMIOS_0_CH_27_ISR_USED) ||\ 327 (defined OCU_EMIOS_0_CH_28_ISR_USED) ||\ 328 (defined OCU_EMIOS_0_CH_29_ISR_USED) ||\ 329 (defined OCU_EMIOS_0_CH_30_ISR_USED) ||\ 330 (defined OCU_EMIOS_0_CH_31_ISR_USED) ||\ 331 (defined OCU_EMIOS_1_CH_0_ISR_USED) ||\ 332 (defined OCU_EMIOS_1_CH_1_ISR_USED) ||\ 333 (defined OCU_EMIOS_1_CH_2_ISR_USED) ||\ 334 (defined OCU_EMIOS_1_CH_3_ISR_USED) ||\ 335 (defined OCU_EMIOS_1_CH_4_ISR_USED) ||\ 336 (defined OCU_EMIOS_1_CH_5_ISR_USED) ||\ 337 (defined OCU_EMIOS_1_CH_6_ISR_USED) ||\ 338 (defined OCU_EMIOS_1_CH_7_ISR_USED) ||\ 339 (defined OCU_EMIOS_1_CH_8_ISR_USED) ||\ 340 (defined OCU_EMIOS_1_CH_9_ISR_USED) ||\ 341 (defined OCU_EMIOS_1_CH_10_ISR_USED) ||\ 342 (defined OCU_EMIOS_1_CH_11_ISR_USED) ||\ 343 (defined OCU_EMIOS_1_CH_12_ISR_USED) ||\ 344 (defined OCU_EMIOS_1_CH_13_ISR_USED) ||\ 345 (defined OCU_EMIOS_1_CH_14_ISR_USED) ||\ 346 (defined OCU_EMIOS_1_CH_15_ISR_USED) ||\ 347 (defined OCU_EMIOS_1_CH_16_ISR_USED) ||\ 348 (defined OCU_EMIOS_1_CH_17_ISR_USED) ||\ 349 (defined OCU_EMIOS_1_CH_18_ISR_USED) ||\ 350 (defined OCU_EMIOS_1_CH_19_ISR_USED) ||\ 351 (defined OCU_EMIOS_1_CH_20_ISR_USED) ||\ 352 (defined OCU_EMIOS_1_CH_21_ISR_USED) ||\ 353 (defined OCU_EMIOS_1_CH_22_ISR_USED) ||\ 354 (defined OCU_EMIOS_1_CH_23_ISR_USED) ||\ 355 (defined OCU_EMIOS_1_CH_24_ISR_USED) ||\ 356 (defined OCU_EMIOS_1_CH_25_ISR_USED) ||\ 357 (defined OCU_EMIOS_1_CH_26_ISR_USED) ||\ 358 (defined OCU_EMIOS_1_CH_27_ISR_USED) ||\ 359 (defined OCU_EMIOS_1_CH_28_ISR_USED) ||\ 360 (defined OCU_EMIOS_1_CH_29_ISR_USED) ||\ 361 (defined OCU_EMIOS_1_CH_30_ISR_USED) ||\ 362 (defined OCU_EMIOS_1_CH_31_ISR_USED) ||\ 363 (defined OCU_EMIOS_2_CH_0_ISR_USED) ||\ 364 (defined OCU_EMIOS_2_CH_1_ISR_USED) ||\ 365 (defined OCU_EMIOS_2_CH_2_ISR_USED) ||\ 366 (defined OCU_EMIOS_2_CH_3_ISR_USED) ||\ 367 (defined OCU_EMIOS_2_CH_4_ISR_USED) ||\ 368 (defined OCU_EMIOS_2_CH_5_ISR_USED) ||\ 369 (defined OCU_EMIOS_2_CH_6_ISR_USED) ||\ 370 (defined OCU_EMIOS_2_CH_7_ISR_USED) ||\ 371 (defined OCU_EMIOS_2_CH_8_ISR_USED) ||\ 372 (defined OCU_EMIOS_2_CH_9_ISR_USED) ||\ 373 (defined OCU_EMIOS_2_CH_10_ISR_USED) ||\ 374 (defined OCU_EMIOS_2_CH_11_ISR_USED) ||\ 375 (defined OCU_EMIOS_2_CH_12_ISR_USED) ||\ 376 (defined OCU_EMIOS_2_CH_13_ISR_USED) ||\ 377 (defined OCU_EMIOS_2_CH_14_ISR_USED) ||\ 378 (defined OCU_EMIOS_2_CH_15_ISR_USED) ||\ 379 (defined OCU_EMIOS_2_CH_16_ISR_USED) ||\ 380 (defined OCU_EMIOS_2_CH_17_ISR_USED) ||\ 381 (defined OCU_EMIOS_2_CH_18_ISR_USED) ||\ 382 (defined OCU_EMIOS_2_CH_19_ISR_USED) ||\ 383 (defined OCU_EMIOS_2_CH_20_ISR_USED) ||\ 384 (defined OCU_EMIOS_2_CH_21_ISR_USED) ||\ 385 (defined OCU_EMIOS_2_CH_22_ISR_USED) ||\ 386 (defined OCU_EMIOS_2_CH_23_ISR_USED) ||\ 387 (defined OCU_EMIOS_2_CH_24_ISR_USED) ||\ 388 (defined OCU_EMIOS_2_CH_25_ISR_USED) ||\ 389 (defined OCU_EMIOS_2_CH_26_ISR_USED) ||\ 390 (defined OCU_EMIOS_2_CH_27_ISR_USED) ||\ 391 (defined OCU_EMIOS_2_CH_28_ISR_USED) ||\ 392 (defined OCU_EMIOS_2_CH_29_ISR_USED) ||\ 393 (defined OCU_EMIOS_2_CH_30_ISR_USED) ||\ 394 (defined OCU_EMIOS_2_CH_31_ISR_USED)\ 395 ) 396 397 extern void Emios_Ocu_Ip_IrqHandler(uint8 instance, uint8 channel); 398 #endif 399 #if (\ 400 (defined PWM_EMIOS_0_CH_0_ISR_USED) ||\ 401 (defined PWM_EMIOS_0_CH_1_ISR_USED) ||\ 402 (defined PWM_EMIOS_0_CH_2_ISR_USED) ||\ 403 (defined PWM_EMIOS_0_CH_3_ISR_USED) ||\ 404 (defined PWM_EMIOS_0_CH_4_ISR_USED) ||\ 405 (defined PWM_EMIOS_0_CH_5_ISR_USED) ||\ 406 (defined PWM_EMIOS_0_CH_6_ISR_USED) ||\ 407 (defined PWM_EMIOS_0_CH_7_ISR_USED) ||\ 408 (defined PWM_EMIOS_0_CH_8_ISR_USED) ||\ 409 (defined PWM_EMIOS_0_CH_9_ISR_USED) ||\ 410 (defined PWM_EMIOS_0_CH_10_ISR_USED) ||\ 411 (defined PWM_EMIOS_0_CH_11_ISR_USED) ||\ 412 (defined PWM_EMIOS_0_CH_12_ISR_USED) ||\ 413 (defined PWM_EMIOS_0_CH_13_ISR_USED) ||\ 414 (defined PWM_EMIOS_0_CH_14_ISR_USED) ||\ 415 (defined PWM_EMIOS_0_CH_15_ISR_USED) ||\ 416 (defined PWM_EMIOS_0_CH_16_ISR_USED) ||\ 417 (defined PWM_EMIOS_0_CH_17_ISR_USED) ||\ 418 (defined PWM_EMIOS_0_CH_18_ISR_USED) ||\ 419 (defined PWM_EMIOS_0_CH_19_ISR_USED) ||\ 420 (defined PWM_EMIOS_0_CH_20_ISR_USED) ||\ 421 (defined PWM_EMIOS_0_CH_21_ISR_USED) ||\ 422 (defined PWM_EMIOS_0_CH_22_ISR_USED) ||\ 423 (defined PWM_EMIOS_0_CH_23_ISR_USED) ||\ 424 (defined PWM_EMIOS_0_CH_24_ISR_USED) ||\ 425 (defined PWM_EMIOS_0_CH_25_ISR_USED) ||\ 426 (defined PWM_EMIOS_0_CH_26_ISR_USED) ||\ 427 (defined PWM_EMIOS_0_CH_27_ISR_USED) ||\ 428 (defined PWM_EMIOS_0_CH_28_ISR_USED) ||\ 429 (defined PWM_EMIOS_0_CH_29_ISR_USED) ||\ 430 (defined PWM_EMIOS_0_CH_30_ISR_USED) ||\ 431 (defined PWM_EMIOS_0_CH_31_ISR_USED) ||\ 432 (defined PWM_EMIOS_1_CH_0_ISR_USED) ||\ 433 (defined PWM_EMIOS_1_CH_1_ISR_USED) ||\ 434 (defined PWM_EMIOS_1_CH_2_ISR_USED) ||\ 435 (defined PWM_EMIOS_1_CH_3_ISR_USED) ||\ 436 (defined PWM_EMIOS_1_CH_4_ISR_USED) ||\ 437 (defined PWM_EMIOS_1_CH_5_ISR_USED) ||\ 438 (defined PWM_EMIOS_1_CH_6_ISR_USED) ||\ 439 (defined PWM_EMIOS_1_CH_7_ISR_USED) ||\ 440 (defined PWM_EMIOS_1_CH_8_ISR_USED) ||\ 441 (defined PWM_EMIOS_1_CH_9_ISR_USED) ||\ 442 (defined PWM_EMIOS_1_CH_10_ISR_USED) ||\ 443 (defined PWM_EMIOS_1_CH_11_ISR_USED) ||\ 444 (defined PWM_EMIOS_1_CH_12_ISR_USED) ||\ 445 (defined PWM_EMIOS_1_CH_13_ISR_USED) ||\ 446 (defined PWM_EMIOS_1_CH_14_ISR_USED) ||\ 447 (defined PWM_EMIOS_1_CH_15_ISR_USED) ||\ 448 (defined PWM_EMIOS_1_CH_16_ISR_USED) ||\ 449 (defined PWM_EMIOS_1_CH_17_ISR_USED) ||\ 450 (defined PWM_EMIOS_1_CH_18_ISR_USED) ||\ 451 (defined PWM_EMIOS_1_CH_19_ISR_USED) ||\ 452 (defined PWM_EMIOS_1_CH_20_ISR_USED) ||\ 453 (defined PWM_EMIOS_1_CH_21_ISR_USED) ||\ 454 (defined PWM_EMIOS_1_CH_22_ISR_USED) ||\ 455 (defined PWM_EMIOS_1_CH_23_ISR_USED) ||\ 456 (defined PWM_EMIOS_1_CH_24_ISR_USED) ||\ 457 (defined PWM_EMIOS_1_CH_25_ISR_USED) ||\ 458 (defined PWM_EMIOS_1_CH_26_ISR_USED) ||\ 459 (defined PWM_EMIOS_1_CH_27_ISR_USED) ||\ 460 (defined PWM_EMIOS_1_CH_28_ISR_USED) ||\ 461 (defined PWM_EMIOS_1_CH_29_ISR_USED) ||\ 462 (defined PWM_EMIOS_1_CH_30_ISR_USED) ||\ 463 (defined PWM_EMIOS_1_CH_31_ISR_USED) ||\ 464 (defined PWM_EMIOS_2_CH_0_ISR_USED) ||\ 465 (defined PWM_EMIOS_2_CH_1_ISR_USED) ||\ 466 (defined PWM_EMIOS_2_CH_2_ISR_USED) ||\ 467 (defined PWM_EMIOS_2_CH_3_ISR_USED) ||\ 468 (defined PWM_EMIOS_2_CH_4_ISR_USED) ||\ 469 (defined PWM_EMIOS_2_CH_5_ISR_USED) ||\ 470 (defined PWM_EMIOS_2_CH_6_ISR_USED) ||\ 471 (defined PWM_EMIOS_2_CH_7_ISR_USED) ||\ 472 (defined PWM_EMIOS_2_CH_8_ISR_USED) ||\ 473 (defined PWM_EMIOS_2_CH_9_ISR_USED) ||\ 474 (defined PWM_EMIOS_2_CH_10_ISR_USED) ||\ 475 (defined PWM_EMIOS_2_CH_11_ISR_USED) ||\ 476 (defined PWM_EMIOS_2_CH_12_ISR_USED) ||\ 477 (defined PWM_EMIOS_2_CH_13_ISR_USED) ||\ 478 (defined PWM_EMIOS_2_CH_14_ISR_USED) ||\ 479 (defined PWM_EMIOS_2_CH_15_ISR_USED) ||\ 480 (defined PWM_EMIOS_2_CH_16_ISR_USED) ||\ 481 (defined PWM_EMIOS_2_CH_17_ISR_USED) ||\ 482 (defined PWM_EMIOS_2_CH_18_ISR_USED) ||\ 483 (defined PWM_EMIOS_2_CH_19_ISR_USED) ||\ 484 (defined PWM_EMIOS_2_CH_20_ISR_USED) ||\ 485 (defined PWM_EMIOS_2_CH_21_ISR_USED) ||\ 486 (defined PWM_EMIOS_2_CH_22_ISR_USED) ||\ 487 (defined PWM_EMIOS_2_CH_23_ISR_USED) ||\ 488 (defined PWM_EMIOS_2_CH_24_ISR_USED) ||\ 489 (defined PWM_EMIOS_2_CH_25_ISR_USED) ||\ 490 (defined PWM_EMIOS_2_CH_26_ISR_USED) ||\ 491 (defined PWM_EMIOS_2_CH_27_ISR_USED) ||\ 492 (defined PWM_EMIOS_2_CH_28_ISR_USED) ||\ 493 (defined PWM_EMIOS_2_CH_29_ISR_USED) ||\ 494 (defined PWM_EMIOS_2_CH_30_ISR_USED) ||\ 495 (defined PWM_EMIOS_2_CH_31_ISR_USED)\ 496 ) 497 498 extern void Emios_Pwm_Ip_IrqHandler(uint8 instance, uint8 channel); 499 #endif 500 501 502 #define MCL_START_SEC_CODE 503 #include "Mcl_MemMap.h" 504 505 #if (\ 506 (defined GPT_EMIOS_0_CH_0_ISR_USED) ||\ 507 (defined GPT_EMIOS_0_CH_1_ISR_USED) ||\ 508 (defined GPT_EMIOS_0_CH_2_ISR_USED) ||\ 509 (defined GPT_EMIOS_0_CH_3_ISR_USED) ||\ 510 (defined ICU_EMIOS_0_CH_0_ISR_USED) ||\ 511 (defined ICU_EMIOS_0_CH_1_ISR_USED) ||\ 512 (defined ICU_EMIOS_0_CH_2_ISR_USED) ||\ 513 (defined ICU_EMIOS_0_CH_3_ISR_USED) ||\ 514 (defined OCU_EMIOS_0_CH_0_ISR_USED) ||\ 515 (defined OCU_EMIOS_0_CH_1_ISR_USED) ||\ 516 (defined OCU_EMIOS_0_CH_2_ISR_USED) ||\ 517 (defined OCU_EMIOS_0_CH_3_ISR_USED) ||\ 518 (defined PWM_EMIOS_0_CH_0_ISR_USED) ||\ 519 (defined PWM_EMIOS_0_CH_1_ISR_USED) ||\ 520 (defined PWM_EMIOS_0_CH_2_ISR_USED) ||\ 521 (defined PWM_EMIOS_0_CH_3_ISR_USED)\ 522 ) 523 /** 524 * @brief Interrupt handler for EMIOS channels 0-3 for Emios instance 0 525 * @details Process the interrupt of EMIOS channels 0-3 526 * 527 * @note This will be defined only if EMIOS channels 0, 1, 2, 3 are configured in GPT, ICU, 528 * OCU or PWM mode. 529 */ 530 ISR(EMIOS0_5_IRQ); 531 #endif 532 533 #if (\ 534 (defined GPT_EMIOS_0_CH_4_ISR_USED) ||\ 535 (defined GPT_EMIOS_0_CH_5_ISR_USED) ||\ 536 (defined GPT_EMIOS_0_CH_6_ISR_USED) ||\ 537 (defined GPT_EMIOS_0_CH_7_ISR_USED) ||\ 538 (defined ICU_EMIOS_0_CH_4_ISR_USED) ||\ 539 (defined ICU_EMIOS_0_CH_5_ISR_USED) ||\ 540 (defined ICU_EMIOS_0_CH_6_ISR_USED) ||\ 541 (defined ICU_EMIOS_0_CH_7_ISR_USED) ||\ 542 (defined OCU_EMIOS_0_CH_4_ISR_USED) ||\ 543 (defined OCU_EMIOS_0_CH_5_ISR_USED) ||\ 544 (defined OCU_EMIOS_0_CH_6_ISR_USED) ||\ 545 (defined OCU_EMIOS_0_CH_7_ISR_USED) ||\ 546 (defined PWM_EMIOS_0_CH_4_ISR_USED) ||\ 547 (defined PWM_EMIOS_0_CH_5_ISR_USED) ||\ 548 (defined PWM_EMIOS_0_CH_6_ISR_USED) ||\ 549 (defined PWM_EMIOS_0_CH_7_ISR_USED)\ 550 ) 551 /** 552 * @brief Interrupt handler for EMIOS channels 4-7 for Emios instance 0 553 * @details Process the interrupt of EMIOS channels 4-7 554 * 555 * @note This will be defined only if EMIOS channels 4, 5, 6, 7 are configured in GPT, ICU, 556 * OCU or PWM mode. 557 */ 558 ISR(EMIOS0_4_IRQ); 559 #endif 560 561 #if (\ 562 (defined GPT_EMIOS_0_CH_8_ISR_USED) ||\ 563 (defined GPT_EMIOS_0_CH_9_ISR_USED) ||\ 564 (defined GPT_EMIOS_0_CH_10_ISR_USED) ||\ 565 (defined GPT_EMIOS_0_CH_11_ISR_USED) ||\ 566 (defined ICU_EMIOS_0_CH_8_ISR_USED) ||\ 567 (defined ICU_EMIOS_0_CH_9_ISR_USED) ||\ 568 (defined ICU_EMIOS_0_CH_10_ISR_USED) ||\ 569 (defined ICU_EMIOS_0_CH_11_ISR_USED) ||\ 570 (defined OCU_EMIOS_0_CH_8_ISR_USED) ||\ 571 (defined OCU_EMIOS_0_CH_9_ISR_USED) ||\ 572 (defined OCU_EMIOS_0_CH_10_ISR_USED) ||\ 573 (defined OCU_EMIOS_0_CH_11_ISR_USED) ||\ 574 (defined PWM_EMIOS_0_CH_8_ISR_USED) ||\ 575 (defined PWM_EMIOS_0_CH_9_ISR_USED) ||\ 576 (defined PWM_EMIOS_0_CH_10_ISR_USED) ||\ 577 (defined PWM_EMIOS_0_CH_11_ISR_USED)\ 578 ) 579 /** 580 * @brief Interrupt handler for EMIOS channels 8-11 for Emios instance 0 581 * @details Process the interrupt of EMIOS channels 8-11 582 * 583 * @note This will be defined only if EMIOS channels 8, 9, 10, 11 are configured in GPT, ICU, 584 * OCU or PWM mode. 585 */ 586 ISR(EMIOS0_3_IRQ); 587 #endif 588 589 #if (\ 590 (defined GPT_EMIOS_0_CH_12_ISR_USED) ||\ 591 (defined GPT_EMIOS_0_CH_13_ISR_USED) ||\ 592 (defined GPT_EMIOS_0_CH_14_ISR_USED) ||\ 593 (defined GPT_EMIOS_0_CH_15_ISR_USED) ||\ 594 (defined ICU_EMIOS_0_CH_12_ISR_USED) ||\ 595 (defined ICU_EMIOS_0_CH_13_ISR_USED) ||\ 596 (defined ICU_EMIOS_0_CH_14_ISR_USED) ||\ 597 (defined ICU_EMIOS_0_CH_15_ISR_USED) ||\ 598 (defined OCU_EMIOS_0_CH_12_ISR_USED) ||\ 599 (defined OCU_EMIOS_0_CH_13_ISR_USED) ||\ 600 (defined OCU_EMIOS_0_CH_14_ISR_USED) ||\ 601 (defined OCU_EMIOS_0_CH_15_ISR_USED) ||\ 602 (defined PWM_EMIOS_0_CH_12_ISR_USED) ||\ 603 (defined PWM_EMIOS_0_CH_13_ISR_USED) ||\ 604 (defined PWM_EMIOS_0_CH_14_ISR_USED) ||\ 605 (defined PWM_EMIOS_0_CH_15_ISR_USED)\ 606 ) 607 /** 608 * @brief Interrupt handler for EMIOS channels 12-15 for Emios instance 0 609 * @details Process the interrupt of EMIOS channels 12-15 610 * 611 * @note This will be defined only if EMIOS channels 12, 13, 14, 15 are configured in GPT, ICU, 612 * OCU or PWM mode. 613 */ 614 ISR(EMIOS0_2_IRQ); 615 #endif 616 617 #if (\ 618 (defined GPT_EMIOS_0_CH_16_ISR_USED) ||\ 619 (defined GPT_EMIOS_0_CH_17_ISR_USED) ||\ 620 (defined GPT_EMIOS_0_CH_18_ISR_USED) ||\ 621 (defined GPT_EMIOS_0_CH_19_ISR_USED) ||\ 622 (defined ICU_EMIOS_0_CH_16_ISR_USED) ||\ 623 (defined ICU_EMIOS_0_CH_17_ISR_USED) ||\ 624 (defined ICU_EMIOS_0_CH_18_ISR_USED) ||\ 625 (defined ICU_EMIOS_0_CH_19_ISR_USED) ||\ 626 (defined OCU_EMIOS_0_CH_16_ISR_USED) ||\ 627 (defined OCU_EMIOS_0_CH_17_ISR_USED) ||\ 628 (defined OCU_EMIOS_0_CH_18_ISR_USED) ||\ 629 (defined OCU_EMIOS_0_CH_19_ISR_USED) ||\ 630 (defined PWM_EMIOS_0_CH_16_ISR_USED) ||\ 631 (defined PWM_EMIOS_0_CH_17_ISR_USED) ||\ 632 (defined PWM_EMIOS_0_CH_18_ISR_USED) ||\ 633 (defined PWM_EMIOS_0_CH_19_ISR_USED)\ 634 ) 635 /** 636 * @brief Interrupt handler for EMIOS channels 16-19 for Emios instance 0 637 * @details Process the interrupt of EMIOS channels 16-19 638 * 639 * @note This will be defined only if EMIOS channels 16, 17, 18, 19 are configured in GPT, ICU, 640 * OCU or PWM mode. 641 */ 642 ISR(EMIOS0_1_IRQ); 643 #endif 644 645 #if (\ 646 (defined GPT_EMIOS_0_CH_20_ISR_USED) ||\ 647 (defined GPT_EMIOS_0_CH_21_ISR_USED) ||\ 648 (defined GPT_EMIOS_0_CH_22_ISR_USED) ||\ 649 (defined GPT_EMIOS_0_CH_23_ISR_USED) ||\ 650 (defined ICU_EMIOS_0_CH_20_ISR_USED) ||\ 651 (defined ICU_EMIOS_0_CH_21_ISR_USED) ||\ 652 (defined ICU_EMIOS_0_CH_22_ISR_USED) ||\ 653 (defined ICU_EMIOS_0_CH_23_ISR_USED) ||\ 654 (defined OCU_EMIOS_0_CH_20_ISR_USED) ||\ 655 (defined OCU_EMIOS_0_CH_21_ISR_USED) ||\ 656 (defined OCU_EMIOS_0_CH_22_ISR_USED) ||\ 657 (defined OCU_EMIOS_0_CH_23_ISR_USED) ||\ 658 (defined PWM_EMIOS_0_CH_20_ISR_USED) ||\ 659 (defined PWM_EMIOS_0_CH_21_ISR_USED) ||\ 660 (defined PWM_EMIOS_0_CH_22_ISR_USED) ||\ 661 (defined PWM_EMIOS_0_CH_23_ISR_USED)\ 662 ) 663 /** 664 * @brief Interrupt handler for EMIOS channels 20-23 for Emios instance 0 665 * @details Process the interrupt of EMIOS channels 20-23 666 * 667 * @note This will be defined only if EMIOS channels 20, 21, 22, 23 are configured in GPT, ICU, 668 * OCU or PWM mode. 669 */ 670 ISR(EMIOS0_0_IRQ); 671 #endif 672 673 #if (\ 674 (defined GPT_EMIOS_1_CH_0_ISR_USED) ||\ 675 (defined GPT_EMIOS_1_CH_1_ISR_USED) ||\ 676 (defined GPT_EMIOS_1_CH_2_ISR_USED) ||\ 677 (defined GPT_EMIOS_1_CH_3_ISR_USED) ||\ 678 (defined ICU_EMIOS_1_CH_0_ISR_USED) ||\ 679 (defined ICU_EMIOS_1_CH_1_ISR_USED) ||\ 680 (defined ICU_EMIOS_1_CH_2_ISR_USED) ||\ 681 (defined ICU_EMIOS_1_CH_3_ISR_USED) ||\ 682 (defined OCU_EMIOS_1_CH_0_ISR_USED) ||\ 683 (defined OCU_EMIOS_1_CH_1_ISR_USED) ||\ 684 (defined OCU_EMIOS_1_CH_2_ISR_USED) ||\ 685 (defined OCU_EMIOS_1_CH_3_ISR_USED) ||\ 686 (defined PWM_EMIOS_1_CH_0_ISR_USED) ||\ 687 (defined PWM_EMIOS_1_CH_1_ISR_USED) ||\ 688 (defined PWM_EMIOS_1_CH_2_ISR_USED) ||\ 689 (defined PWM_EMIOS_1_CH_3_ISR_USED)\ 690 ) 691 /** 692 * @brief Interrupt handler for EMIOS channels 0-3 for Emios instance 1 693 * @details Process the interrupt of EMIOS channels 0-3 694 * 695 * @note This will be defined only if EMIOS channels 0, 1, 2, 3 are configured in GPT, ICU, 696 * OCU or PWM mode. 697 */ 698 ISR(EMIOS1_5_IRQ); 699 #endif 700 701 #if (\ 702 (defined GPT_EMIOS_1_CH_4_ISR_USED) ||\ 703 (defined GPT_EMIOS_1_CH_5_ISR_USED) ||\ 704 (defined GPT_EMIOS_1_CH_6_ISR_USED) ||\ 705 (defined GPT_EMIOS_1_CH_7_ISR_USED) ||\ 706 (defined ICU_EMIOS_1_CH_4_ISR_USED) ||\ 707 (defined ICU_EMIOS_1_CH_5_ISR_USED) ||\ 708 (defined ICU_EMIOS_1_CH_6_ISR_USED) ||\ 709 (defined ICU_EMIOS_1_CH_7_ISR_USED) ||\ 710 (defined OCU_EMIOS_1_CH_4_ISR_USED) ||\ 711 (defined OCU_EMIOS_1_CH_5_ISR_USED) ||\ 712 (defined OCU_EMIOS_1_CH_6_ISR_USED) ||\ 713 (defined OCU_EMIOS_1_CH_7_ISR_USED) ||\ 714 (defined PWM_EMIOS_1_CH_4_ISR_USED) ||\ 715 (defined PWM_EMIOS_1_CH_5_ISR_USED) ||\ 716 (defined PWM_EMIOS_1_CH_6_ISR_USED) ||\ 717 (defined PWM_EMIOS_1_CH_7_ISR_USED)\ 718 ) 719 /** 720 * @brief Interrupt handler for EMIOS channels 4-7 for Emios instance 1 721 * @details Process the interrupt of EMIOS channels 4-7 722 * 723 * @note This will be defined only if EMIOS channels 4, 5, 6, 7 are configured in GPT, ICU, 724 * OCU or PWM mode. 725 */ 726 ISR(EMIOS1_4_IRQ); 727 #endif 728 729 #if (\ 730 (defined GPT_EMIOS_1_CH_8_ISR_USED) ||\ 731 (defined GPT_EMIOS_1_CH_9_ISR_USED) ||\ 732 (defined GPT_EMIOS_1_CH_10_ISR_USED) ||\ 733 (defined GPT_EMIOS_1_CH_11_ISR_USED) ||\ 734 (defined ICU_EMIOS_1_CH_8_ISR_USED) ||\ 735 (defined ICU_EMIOS_1_CH_9_ISR_USED) ||\ 736 (defined ICU_EMIOS_1_CH_10_ISR_USED) ||\ 737 (defined ICU_EMIOS_1_CH_11_ISR_USED) ||\ 738 (defined OCU_EMIOS_1_CH_8_ISR_USED) ||\ 739 (defined OCU_EMIOS_1_CH_9_ISR_USED) ||\ 740 (defined OCU_EMIOS_1_CH_10_ISR_USED) ||\ 741 (defined OCU_EMIOS_1_CH_11_ISR_USED) ||\ 742 (defined PWM_EMIOS_1_CH_8_ISR_USED) ||\ 743 (defined PWM_EMIOS_1_CH_9_ISR_USED) ||\ 744 (defined PWM_EMIOS_1_CH_10_ISR_USED) ||\ 745 (defined PWM_EMIOS_1_CH_11_ISR_USED)\ 746 ) 747 /** 748 * @brief Interrupt handler for EMIOS channels 8-11 for Emios instance 1 749 * @details Process the interrupt of EMIOS channels 8-11 750 * 751 * @note This will be defined only if EMIOS channels 8, 9, 10, 11 are configured in GPT, ICU, 752 * OCU or PWM mode. 753 */ 754 ISR(EMIOS1_3_IRQ); 755 #endif 756 757 #if (\ 758 (defined GPT_EMIOS_1_CH_12_ISR_USED) ||\ 759 (defined GPT_EMIOS_1_CH_13_ISR_USED) ||\ 760 (defined GPT_EMIOS_1_CH_14_ISR_USED) ||\ 761 (defined GPT_EMIOS_1_CH_15_ISR_USED) ||\ 762 (defined ICU_EMIOS_1_CH_12_ISR_USED) ||\ 763 (defined ICU_EMIOS_1_CH_13_ISR_USED) ||\ 764 (defined ICU_EMIOS_1_CH_14_ISR_USED) ||\ 765 (defined ICU_EMIOS_1_CH_15_ISR_USED) ||\ 766 (defined OCU_EMIOS_1_CH_12_ISR_USED) ||\ 767 (defined OCU_EMIOS_1_CH_13_ISR_USED) ||\ 768 (defined OCU_EMIOS_1_CH_14_ISR_USED) ||\ 769 (defined OCU_EMIOS_1_CH_15_ISR_USED) ||\ 770 (defined PWM_EMIOS_1_CH_12_ISR_USED) ||\ 771 (defined PWM_EMIOS_1_CH_13_ISR_USED) ||\ 772 (defined PWM_EMIOS_1_CH_14_ISR_USED) ||\ 773 (defined PWM_EMIOS_1_CH_15_ISR_USED)\ 774 ) 775 /** 776 * @brief Interrupt handler for EMIOS channels 12-15 for Emios instance 1 777 * @details Process the interrupt of EMIOS channels 12-15 778 * 779 * @note This will be defined only if EMIOS channels 12, 13, 14, 15 are configured in GPT, ICU, 780 * OCU or PWM mode. 781 */ 782 ISR(EMIOS1_2_IRQ); 783 #endif 784 785 #if (\ 786 (defined GPT_EMIOS_1_CH_16_ISR_USED) ||\ 787 (defined GPT_EMIOS_1_CH_17_ISR_USED) ||\ 788 (defined GPT_EMIOS_1_CH_18_ISR_USED) ||\ 789 (defined GPT_EMIOS_1_CH_19_ISR_USED) ||\ 790 (defined ICU_EMIOS_1_CH_16_ISR_USED) ||\ 791 (defined ICU_EMIOS_1_CH_17_ISR_USED) ||\ 792 (defined ICU_EMIOS_1_CH_18_ISR_USED) ||\ 793 (defined ICU_EMIOS_1_CH_19_ISR_USED) ||\ 794 (defined OCU_EMIOS_1_CH_16_ISR_USED) ||\ 795 (defined OCU_EMIOS_1_CH_17_ISR_USED) ||\ 796 (defined OCU_EMIOS_1_CH_18_ISR_USED) ||\ 797 (defined OCU_EMIOS_1_CH_19_ISR_USED) ||\ 798 (defined PWM_EMIOS_1_CH_16_ISR_USED) ||\ 799 (defined PWM_EMIOS_1_CH_17_ISR_USED) ||\ 800 (defined PWM_EMIOS_1_CH_18_ISR_USED) ||\ 801 (defined PWM_EMIOS_1_CH_19_ISR_USED)\ 802 ) 803 /** 804 * @brief Interrupt handler for EMIOS channels 16-19 for Emios instance 1 805 * @details Process the interrupt of EMIOS channels 16-19 806 * 807 * @note This will be defined only if EMIOS channels 16, 17, 18, 19 are configured in GPT, ICU, 808 * OCU or PWM mode. 809 */ 810 ISR(EMIOS1_1_IRQ); 811 #endif 812 813 #if (\ 814 (defined GPT_EMIOS_1_CH_20_ISR_USED) ||\ 815 (defined GPT_EMIOS_1_CH_21_ISR_USED) ||\ 816 (defined GPT_EMIOS_1_CH_22_ISR_USED) ||\ 817 (defined GPT_EMIOS_1_CH_23_ISR_USED) ||\ 818 (defined ICU_EMIOS_1_CH_20_ISR_USED) ||\ 819 (defined ICU_EMIOS_1_CH_21_ISR_USED) ||\ 820 (defined ICU_EMIOS_1_CH_22_ISR_USED) ||\ 821 (defined ICU_EMIOS_1_CH_23_ISR_USED) ||\ 822 (defined OCU_EMIOS_1_CH_20_ISR_USED) ||\ 823 (defined OCU_EMIOS_1_CH_21_ISR_USED) ||\ 824 (defined OCU_EMIOS_1_CH_22_ISR_USED) ||\ 825 (defined OCU_EMIOS_1_CH_23_ISR_USED) ||\ 826 (defined PWM_EMIOS_1_CH_20_ISR_USED) ||\ 827 (defined PWM_EMIOS_1_CH_21_ISR_USED) ||\ 828 (defined PWM_EMIOS_1_CH_22_ISR_USED) ||\ 829 (defined PWM_EMIOS_1_CH_23_ISR_USED)\ 830 ) 831 /** 832 * @brief Interrupt handler for EMIOS channels 20-23 for Emios instance 1 833 * @details Process the interrupt of EMIOS channels 20-23 834 * 835 * @note This will be defined only if EMIOS channels 20, 21, 22, 23 are configured in GPT, ICU, 836 * OCU or PWM mode. 837 */ 838 ISR(EMIOS1_0_IRQ); 839 #endif 840 841 #if (\ 842 (defined GPT_EMIOS_2_CH_0_ISR_USED) ||\ 843 (defined GPT_EMIOS_2_CH_1_ISR_USED) ||\ 844 (defined GPT_EMIOS_2_CH_2_ISR_USED) ||\ 845 (defined GPT_EMIOS_2_CH_3_ISR_USED) ||\ 846 (defined ICU_EMIOS_2_CH_0_ISR_USED) ||\ 847 (defined ICU_EMIOS_2_CH_1_ISR_USED) ||\ 848 (defined ICU_EMIOS_2_CH_2_ISR_USED) ||\ 849 (defined ICU_EMIOS_2_CH_3_ISR_USED) ||\ 850 (defined OCU_EMIOS_2_CH_0_ISR_USED) ||\ 851 (defined OCU_EMIOS_2_CH_1_ISR_USED) ||\ 852 (defined OCU_EMIOS_2_CH_2_ISR_USED) ||\ 853 (defined OCU_EMIOS_2_CH_3_ISR_USED) ||\ 854 (defined PWM_EMIOS_2_CH_0_ISR_USED) ||\ 855 (defined PWM_EMIOS_2_CH_1_ISR_USED) ||\ 856 (defined PWM_EMIOS_2_CH_2_ISR_USED) ||\ 857 (defined PWM_EMIOS_2_CH_3_ISR_USED)\ 858 ) 859 /** 860 * @brief Interrupt handler for EMIOS channels 0-3 for Emios instance 2 861 * @details Process the interrupt of EMIOS channels 0-3 862 * 863 * @note This will be defined only if EMIOS channels 0, 1, 2, 3 are configured in GPT, ICU, 864 * OCU or PWM mode. 865 */ 866 ISR(EMIOS2_5_IRQ); 867 #endif 868 869 #if (\ 870 (defined GPT_EMIOS_2_CH_4_ISR_USED) ||\ 871 (defined GPT_EMIOS_2_CH_5_ISR_USED) ||\ 872 (defined GPT_EMIOS_2_CH_6_ISR_USED) ||\ 873 (defined GPT_EMIOS_2_CH_7_ISR_USED) ||\ 874 (defined ICU_EMIOS_2_CH_4_ISR_USED) ||\ 875 (defined ICU_EMIOS_2_CH_5_ISR_USED) ||\ 876 (defined ICU_EMIOS_2_CH_6_ISR_USED) ||\ 877 (defined ICU_EMIOS_2_CH_7_ISR_USED) ||\ 878 (defined OCU_EMIOS_2_CH_4_ISR_USED) ||\ 879 (defined OCU_EMIOS_2_CH_5_ISR_USED) ||\ 880 (defined OCU_EMIOS_2_CH_6_ISR_USED) ||\ 881 (defined OCU_EMIOS_2_CH_7_ISR_USED) ||\ 882 (defined PWM_EMIOS_2_CH_4_ISR_USED) ||\ 883 (defined PWM_EMIOS_2_CH_5_ISR_USED) ||\ 884 (defined PWM_EMIOS_2_CH_6_ISR_USED) ||\ 885 (defined PWM_EMIOS_2_CH_7_ISR_USED)\ 886 ) 887 /** 888 * @brief Interrupt handler for EMIOS channels 4-7 for Emios instance 2 889 * @details Process the interrupt of EMIOS channels 4-7 890 * 891 * @note This will be defined only if EMIOS channels 4, 5, 6, 7 are configured in GPT, ICU, 892 * OCU or PWM mode. 893 */ 894 ISR(EMIOS2_4_IRQ); 895 #endif 896 897 #if (\ 898 (defined GPT_EMIOS_2_CH_8_ISR_USED) ||\ 899 (defined GPT_EMIOS_2_CH_9_ISR_USED) ||\ 900 (defined GPT_EMIOS_2_CH_10_ISR_USED) ||\ 901 (defined GPT_EMIOS_2_CH_11_ISR_USED) ||\ 902 (defined ICU_EMIOS_2_CH_8_ISR_USED) ||\ 903 (defined ICU_EMIOS_2_CH_9_ISR_USED) ||\ 904 (defined ICU_EMIOS_2_CH_10_ISR_USED) ||\ 905 (defined ICU_EMIOS_2_CH_11_ISR_USED) ||\ 906 (defined OCU_EMIOS_2_CH_8_ISR_USED) ||\ 907 (defined OCU_EMIOS_2_CH_9_ISR_USED) ||\ 908 (defined OCU_EMIOS_2_CH_10_ISR_USED) ||\ 909 (defined OCU_EMIOS_2_CH_11_ISR_USED) ||\ 910 (defined PWM_EMIOS_2_CH_8_ISR_USED) ||\ 911 (defined PWM_EMIOS_2_CH_9_ISR_USED) ||\ 912 (defined PWM_EMIOS_2_CH_10_ISR_USED) ||\ 913 (defined PWM_EMIOS_2_CH_11_ISR_USED)\ 914 ) 915 /** 916 * @brief Interrupt handler for EMIOS channels 8-11 for Emios instance 2 917 * @details Process the interrupt of EMIOS channels 8-11 918 * 919 * @note This will be defined only if EMIOS channels 8, 9, 10, 11 are configured in GPT, ICU, 920 * OCU or PWM mode. 921 */ 922 ISR(EMIOS2_3_IRQ); 923 #endif 924 925 #if (\ 926 (defined GPT_EMIOS_2_CH_12_ISR_USED) ||\ 927 (defined GPT_EMIOS_2_CH_13_ISR_USED) ||\ 928 (defined GPT_EMIOS_2_CH_14_ISR_USED) ||\ 929 (defined GPT_EMIOS_2_CH_15_ISR_USED) ||\ 930 (defined ICU_EMIOS_2_CH_12_ISR_USED) ||\ 931 (defined ICU_EMIOS_2_CH_13_ISR_USED) ||\ 932 (defined ICU_EMIOS_2_CH_14_ISR_USED) ||\ 933 (defined ICU_EMIOS_2_CH_15_ISR_USED) ||\ 934 (defined OCU_EMIOS_2_CH_12_ISR_USED) ||\ 935 (defined OCU_EMIOS_2_CH_13_ISR_USED) ||\ 936 (defined OCU_EMIOS_2_CH_14_ISR_USED) ||\ 937 (defined OCU_EMIOS_2_CH_15_ISR_USED) ||\ 938 (defined PWM_EMIOS_2_CH_12_ISR_USED) ||\ 939 (defined PWM_EMIOS_2_CH_13_ISR_USED) ||\ 940 (defined PWM_EMIOS_2_CH_14_ISR_USED) ||\ 941 (defined PWM_EMIOS_2_CH_15_ISR_USED)\ 942 ) 943 /** 944 * @brief Interrupt handler for EMIOS channels 12-15 for Emios instance 2 945 * @details Process the interrupt of EMIOS channels 12-15 946 * 947 * @note This will be defined only if EMIOS channels 12, 13, 14, 15 are configured in GPT, ICU, 948 * OCU or PWM mode. 949 */ 950 ISR(EMIOS2_2_IRQ); 951 #endif 952 953 #if (\ 954 (defined GPT_EMIOS_2_CH_16_ISR_USED) ||\ 955 (defined GPT_EMIOS_2_CH_17_ISR_USED) ||\ 956 (defined GPT_EMIOS_2_CH_18_ISR_USED) ||\ 957 (defined GPT_EMIOS_2_CH_19_ISR_USED) ||\ 958 (defined ICU_EMIOS_2_CH_16_ISR_USED) ||\ 959 (defined ICU_EMIOS_2_CH_17_ISR_USED) ||\ 960 (defined ICU_EMIOS_2_CH_18_ISR_USED) ||\ 961 (defined ICU_EMIOS_2_CH_19_ISR_USED) ||\ 962 (defined OCU_EMIOS_2_CH_16_ISR_USED) ||\ 963 (defined OCU_EMIOS_2_CH_17_ISR_USED) ||\ 964 (defined OCU_EMIOS_2_CH_18_ISR_USED) ||\ 965 (defined OCU_EMIOS_2_CH_19_ISR_USED) ||\ 966 (defined PWM_EMIOS_2_CH_16_ISR_USED) ||\ 967 (defined PWM_EMIOS_2_CH_17_ISR_USED) ||\ 968 (defined PWM_EMIOS_2_CH_18_ISR_USED) ||\ 969 (defined PWM_EMIOS_2_CH_19_ISR_USED)\ 970 ) 971 /** 972 * @brief Interrupt handler for EMIOS channels 16-19 for Emios instance 2 973 * @details Process the interrupt of EMIOS channels 16-19 974 * 975 * @note This will be defined only if EMIOS channels 16, 17, 18, 19 are configured in GPT, ICU, 976 * OCU or PWM mode. 977 */ 978 ISR(EMIOS2_1_IRQ); 979 #endif 980 981 #if (\ 982 (defined GPT_EMIOS_2_CH_20_ISR_USED) ||\ 983 (defined GPT_EMIOS_2_CH_21_ISR_USED) ||\ 984 (defined GPT_EMIOS_2_CH_22_ISR_USED) ||\ 985 (defined GPT_EMIOS_2_CH_23_ISR_USED) ||\ 986 (defined ICU_EMIOS_2_CH_20_ISR_USED) ||\ 987 (defined ICU_EMIOS_2_CH_21_ISR_USED) ||\ 988 (defined ICU_EMIOS_2_CH_22_ISR_USED) ||\ 989 (defined ICU_EMIOS_2_CH_23_ISR_USED) ||\ 990 (defined OCU_EMIOS_2_CH_20_ISR_USED) ||\ 991 (defined OCU_EMIOS_2_CH_21_ISR_USED) ||\ 992 (defined OCU_EMIOS_2_CH_22_ISR_USED) ||\ 993 (defined OCU_EMIOS_2_CH_23_ISR_USED) ||\ 994 (defined PWM_EMIOS_2_CH_20_ISR_USED) ||\ 995 (defined PWM_EMIOS_2_CH_21_ISR_USED) ||\ 996 (defined PWM_EMIOS_2_CH_22_ISR_USED) ||\ 997 (defined PWM_EMIOS_2_CH_23_ISR_USED)\ 998 ) 999 /** 1000 * @brief Interrupt handler for EMIOS channels 20-23 for Emios instance 2 1001 * @details Process the interrupt of EMIOS channels 20-23 1002 * 1003 * @note This will be defined only if EMIOS channels 20, 21, 22, 23 are configured in GPT, ICU, 1004 * OCU or PWM mode. 1005 */ 1006 ISR(EMIOS2_0_IRQ); 1007 #endif 1008 1009 1010 #define MCL_STOP_SEC_CODE 1011 #include "Mcl_MemMap.h" 1012 1013 #ifdef __cplusplus 1014 } 1015 #endif 1016 1017 /** @} */ 1018 1019 #endif /* EMIOS_MCL_IP_IRQ_H */ 1020
