1 /* 2 * Copyright 2022, 2024 NXP 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /** 8 * @brief Driver for External interrupt/event controller in NXP S32 MCUs 9 * 10 */ 11 12 #ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_EIRQ_NXP_S32_H_ 13 #define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_EIRQ_NXP_S32_H_ 14 15 /** NXP SIUL2 EIRQ callback */ 16 typedef void (*eirq_nxp_s32_callback_t)(uint8_t pin, void *arg); 17 18 /** 19 * @brief NXP SIUL2 EIRQ pin activation type 20 */ 21 enum eirq_nxp_s32_trigger { 22 /** Interrupt triggered on rising edge */ 23 EIRQ_NXP_S32_RISING_EDGE, 24 /** Interrupt triggered on falling edge */ 25 EIRQ_NXP_S32_FALLING_EDGE, 26 /** Interrupt triggered on either edge */ 27 EIRQ_NXP_S32_BOTH_EDGES, 28 }; 29 30 /** 31 * @brief Unset interrupt callback 32 * 33 * @param dev SIUL2 EIRQ device 34 * @param irq interrupt number 35 */ 36 void eirq_nxp_s32_unset_callback(const struct device *dev, uint8_t irq); 37 38 /** 39 * @brief Set callback for an interrupt associated with a given pin 40 * 41 * @param dev SIUL2 EIRQ device 42 * @param irq interrupt number 43 * @param pin GPIO pin associated with the interrupt 44 * @param cb callback to install 45 * @param arg user data to include in callback 46 * 47 * @retval 0 on success 48 * @retval -EBUSY if callback for the interrupt is already set 49 */ 50 int eirq_nxp_s32_set_callback(const struct device *dev, uint8_t irq, uint8_t pin, 51 eirq_nxp_s32_callback_t cb, void *arg); 52 53 /** 54 * @brief Enable interrupt on a given trigger event 55 * 56 * @param dev SIUL2 EIRQ device 57 * @param irq interrupt number 58 * @param trigger trigger event 59 */ 60 void eirq_nxp_s32_enable_interrupt(const struct device *dev, uint8_t irq, 61 enum eirq_nxp_s32_trigger trigger); 62 63 /** 64 * @brief Disable interrupt 65 * 66 * @param dev SIUL2 EIRQ device 67 * @param irq interrupt number 68 */ 69 void eirq_nxp_s32_disable_interrupt(const struct device *dev, uint8_t irq); 70 71 /** 72 * @brief Get pending interrupts 73 * 74 * @param dev SIUL2 EIRQ device 75 * @return A bitmask containing pending pending interrupts 76 */ 77 uint32_t eirq_nxp_s32_get_pending(const struct device *dev); 78 79 #endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_EIRQ_NXP_S32_H_ */ 80
