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Searched defs:EFUSE_WR_TIM_CONF0_REG (Results 1 – 4 of 4) sorted by relevance

/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32c2/
Dmem_definition.py50 EFUSE_WR_TIM_CONF0_REG = DR_REG_EFUSE_BASE + 0x110 variable in EfuseDefineRegisters
/hal_espressif-latest/tools/esptool_py/espefuse/efuse/esp32s2/
Dmem_definition.py75 EFUSE_WR_TIM_CONF0_REG = DR_REG_EFUSE_BASE + 0x1F0 variable in EfuseDefineRegisters
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Defuse_reg.h1143 #define EFUSE_WR_TIM_CONF0_REG (DR_REG_EFUSE_BASE + 0x110) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Defuse_reg.h2681 #define EFUSE_WR_TIM_CONF0_REG (DR_REG_EFUSE_BASE + 0x1f0) macro