1 /*
2 * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
3 * Copyright (c) 2016, Freescale Semiconductor, Inc. Not a Contribution.
4 * Copyright 2016-2017, 2020, 2023 NXP. Not a Contribution.
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 *
8 * Licensed under the Apache License, Version 2.0 (the License); you may
9 * not use this file except in compliance with the License.
10 * You may obtain a copy of the License at
11 *
12 * http://www.apache.org/licenses/LICENSE-2.0
13 *
14 * Unless required by applicable law or agreed to in writing, software
15 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
16 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
17 * See the License for the specific language governing permissions and
18 * limitations under the License.
19 */
20
21 #include "fsl_usart_cmsis.h"
22
23 /* Component ID definition, used by tools. */
24 #ifndef FSL_COMPONENT_ID
25 #define FSL_COMPONENT_ID "platform.drivers.flexcomm_usart_cmsis"
26 #endif
27
28 #if ((defined(RTE_USART0) && RTE_USART0) || (defined(RTE_USART1) && RTE_USART1) || \
29 (defined(RTE_USART2) && RTE_USART2) || (defined(RTE_USART3) && RTE_USART3) || \
30 (defined(RTE_USART4) && RTE_USART4) || (defined(RTE_USART5) && RTE_USART5) || \
31 (defined(RTE_USART6) && RTE_USART6) || (defined(RTE_USART7) && RTE_USART7) || \
32 (defined(RTE_USART8) && RTE_USART8) || (defined(RTE_USART9) && RTE_USART9) || \
33 (defined(RTE_USART10) && RTE_USART10) || (defined(RTE_USART11) && RTE_USART11) || \
34 (defined(RTE_USART12) && RTE_USART12) || (defined(RTE_USART13) && RTE_USART13))
35
36 #define ARM_USART_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR((2), (4))
37
38 /*
39 * ARMCC does not support split the data section automatically, so the driver
40 * needs to split the data to separate sections explicitly, to reduce codesize.
41 */
42 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
43 #define ARMCC_SECTION(section_name) __attribute__((section(section_name)))
44 #endif
45
46 typedef const struct _cmsis_usart_resource
47 {
48 USART_Type *base; /*!< usart peripheral base address. */
49 uint32_t (*GetFreq)(void); /*!< Function to get the clock frequency. */
50 } cmsis_usart_resource_t;
51
52 typedef struct _cmsis_usart_non_blocking_driver_state
53 {
54 cmsis_usart_resource_t *resource; /*!< Basic usart resource. */
55 usart_handle_t *handle; /*!< Interupt transfer handle. */
56 ARM_USART_SignalEvent_t cb_event; /*!< Callback function. */
57 uint8_t flags; /*!< Control and state flags. */
58 } cmsis_usart_non_blocking_driver_state_t;
59
60 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
61 typedef const struct _cmsis_usart_dma_resource
62 {
63 DMA_Type *txDmaBase; /*!< DMA peripheral base address for TX. */
64 uint32_t txDmaChannel; /*!< DMA channel for usart TX. */
65
66 DMA_Type *rxDmaBase; /*!< DMA peripheral base address for RX. */
67 uint32_t rxDmaChannel; /*!< DMA channel for usart RX. */
68 } cmsis_usart_dma_resource_t;
69
70 typedef struct _cmsis_usart_dma_driver_state
71 {
72 cmsis_usart_resource_t *resource; /*!< usart basic resource. */
73 cmsis_usart_dma_resource_t *dmaResource; /*!< usart DMA resource. */
74 usart_dma_handle_t *handle; /*!< usart DMA transfer handle. */
75 dma_handle_t *rxHandle; /*!< DMA RX handle. */
76 dma_handle_t *txHandle; /*!< DMA TX handle. */
77 ARM_USART_SignalEvent_t cb_event; /*!< Callback function. */
78 uint8_t flags; /*!< Control and state flags. */
79 } cmsis_usart_dma_driver_state_t;
80 #endif
81
82 enum _usart_transfer_states
83 {
84 kUSART_TxIdle, /*!< TX idle. */
85 kUSART_TxBusy, /*!< TX busy. */
86 kUSART_RxIdle, /*!< RX idle. */
87 kUSART_RxBusy /*!< RX busy. */
88 };
89
90 /* Driver Version */
91 static const ARM_DRIVER_VERSION s_usartDriverVersion = {ARM_USART_API_VERSION, ARM_USART_DRV_VERSION};
92
93 static const ARM_USART_CAPABILITIES s_usartDriverCapabilities = {
94 1, /* supports usart (Asynchronous) mode */
95 0, /* supports Synchronous Master mode */
96 0, /* supports Synchronous Slave mode */
97 0, /* supports usart Single-wire mode */
98 0, /* supports usart IrDA mode */
99 0, /* supports usart Smart Card mode */
100 0, /* Smart Card Clock generator */
101 0, /* RTS Flow Control available */
102 0, /* CTS Flow Control available */
103 0, /* Transmit completed event: \ref ARM_USART_EVENT_TX_COMPLETE */
104 0, /* Signal receive character timeout event: \ref ARM_USART_EVENT_RX_TIMEOUT */
105 0, /* RTS Line: 0=not available, 1=available */
106 0, /* CTS Line: 0=not available, 1=available */
107 0, /* DTR Line: 0=not available, 1=available */
108 0, /* DSR Line: 0=not available, 1=available */
109 0, /* DCD Line: 0=not available, 1=available */
110 0, /* RI Line: 0=not available, 1=available */
111 0, /* Signal CTS change event: \ref ARM_USART_EVENT_CTS */
112 0, /* Signal DSR change event: \ref ARM_USART_EVENT_DSR */
113 0, /* Signal DCD change event: \ref ARM_USART_EVENT_DCD */
114 0, /* Signal RI change event: \ref ARM_USART_EVENT_RI */
115 };
116
117 /*
118 * Common control function used by usart_NonBlockingControl/usart_DmaControl/usart_EdmaControl
119 */
USART_CommonControl(uint32_t control,uint32_t arg,cmsis_usart_resource_t * resource,uint8_t * isConfigured)120 static int32_t USART_CommonControl(uint32_t control,
121 uint32_t arg,
122 cmsis_usart_resource_t *resource,
123 uint8_t *isConfigured)
124 {
125 usart_config_t config;
126
127 USART_GetDefaultConfig(&config);
128 int32_t result = ARM_DRIVER_OK;
129
130 switch (control & ARM_USART_CONTROL_Msk)
131 {
132 case ARM_USART_MODE_ASYNCHRONOUS:
133 /* USART Baudrate */
134 config.baudRate_Bps = arg;
135 break;
136
137 default:
138 result = ARM_DRIVER_ERROR_UNSUPPORTED;
139 break;
140 }
141
142 if (result != ARM_DRIVER_OK)
143 {
144 return result;
145 }
146
147 switch (control & ARM_USART_PARITY_Msk)
148 {
149 case ARM_USART_PARITY_NONE:
150 config.parityMode = kUSART_ParityDisabled;
151 break;
152 case ARM_USART_PARITY_EVEN:
153 config.parityMode = kUSART_ParityEven;
154 break;
155 case ARM_USART_PARITY_ODD:
156 config.parityMode = kUSART_ParityOdd;
157 break;
158 default:
159 result = ARM_USART_ERROR_PARITY;
160 break;
161 }
162
163 if (result == ARM_USART_ERROR_PARITY)
164 {
165 return result;
166 }
167
168 switch (control & ARM_USART_STOP_BITS_Msk)
169 {
170 case ARM_USART_STOP_BITS_1:
171 /* The GetDefaultConfig has already set for this case. */
172 break;
173 case ARM_USART_STOP_BITS_2:
174 config.stopBitCount = kUSART_TwoStopBit;
175 break;
176 default:
177 result = ARM_USART_ERROR_STOP_BITS;
178 break;
179 }
180 if (result == ARM_USART_ERROR_STOP_BITS)
181 {
182 return result;
183 }
184
185 /* If usart is already configured, deinit it first. */
186 if (((*isConfigured) & (uint8_t)USART_FLAG_CONFIGURED) != 0U)
187 {
188 USART_Deinit(resource->base);
189 *isConfigured &= ~(uint8_t)USART_FLAG_CONFIGURED;
190 }
191
192 config.enableTx = true;
193 config.enableRx = true;
194
195 if (kStatus_USART_BaudrateNotSupport == USART_Init(resource->base, &config, resource->GetFreq()))
196 {
197 result = ARM_USART_ERROR_BAUDRATE;
198 }
199 else
200 {
201 *isConfigured |= (uint8_t)USART_FLAG_CONFIGURED;
202 }
203
204 return result;
205 }
206
USARTx_GetVersion(void)207 static ARM_DRIVER_VERSION USARTx_GetVersion(void)
208 {
209 return s_usartDriverVersion;
210 }
211
USARTx_GetCapabilities(void)212 static ARM_USART_CAPABILITIES USARTx_GetCapabilities(void)
213 {
214 return s_usartDriverCapabilities;
215 }
216
USARTx_SetModemControl(ARM_USART_MODEM_CONTROL control)217 static int32_t USARTx_SetModemControl(ARM_USART_MODEM_CONTROL control)
218 {
219 return ARM_DRIVER_ERROR_UNSUPPORTED;
220 }
221
USARTx_GetModemStatus(void)222 static ARM_USART_MODEM_STATUS USARTx_GetModemStatus(void)
223 {
224 ARM_USART_MODEM_STATUS modem_status = {0};
225
226 modem_status.cts = 0U;
227 modem_status.dsr = 0U;
228 modem_status.ri = 0U;
229 modem_status.dcd = 0U;
230 modem_status.reserved = 0U;
231
232 return modem_status;
233 }
234
235 #endif
236
237 #if ((defined(RTE_USART0_DMA_EN) && RTE_USART0_DMA_EN) || (defined(RTE_USART1_DMA_EN) && RTE_USART1_DMA_EN) || \
238 (defined(RTE_USART2_DMA_EN) && RTE_USART2_DMA_EN) || (defined(RTE_USART3_DMA_EN) && RTE_USART3_DMA_EN) || \
239 (defined(RTE_USART4_DMA_EN) && RTE_USART4_DMA_EN) || (defined(RTE_USART5_DMA_EN) && RTE_USART5_DMA_EN) || \
240 (defined(RTE_USART6_DMA_EN) && RTE_USART6_DMA_EN) || (defined(RTE_USART7_DMA_EN) && RTE_USART7_DMA_EN) || \
241 (defined(RTE_USART8_DMA_EN) && RTE_USART8_DMA_EN) || (defined(RTE_USART9_DMA_EN) && RTE_USART9_DMA_EN) || \
242 (defined(RTE_USART10_DMA_EN) && RTE_USART10_DMA_EN) || (defined(RTE_USART11_DMA_EN) && RTE_USART11_DMA_EN) || \
243 (defined(RTE_USART12_DMA_EN) && RTE_USART12_DMA_EN) || (defined(RTE_USART13_DMA_EN) && RTE_USART13_DMA_EN))
244
245 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
KSDK_USART_DmaCallback(USART_Type * base,usart_dma_handle_t * handle,status_t status,void * userData)246 static void KSDK_USART_DmaCallback(USART_Type *base, usart_dma_handle_t *handle, status_t status, void *userData)
247 {
248 uint32_t event = 0U;
249
250 if (kStatus_USART_TxIdle == status)
251 {
252 event = ARM_USART_EVENT_SEND_COMPLETE;
253 }
254
255 if (kStatus_USART_RxIdle == status)
256 {
257 event = ARM_USART_EVENT_RECEIVE_COMPLETE;
258 }
259 else
260 {
261 /* Avoid MISRA 2012 15.7 violation */
262 }
263
264 /* User data is actually CMSIS driver callback. */
265 if (userData != NULL)
266 {
267 ((ARM_USART_SignalEvent_t)userData)(event);
268 }
269 }
270
USART_DmaInitialize(ARM_USART_SignalEvent_t cb_event,cmsis_usart_dma_driver_state_t * usart)271 static int32_t USART_DmaInitialize(ARM_USART_SignalEvent_t cb_event, cmsis_usart_dma_driver_state_t *usart)
272 {
273 if (0U == (usart->flags & USART_FLAG_INIT))
274 {
275 usart->cb_event = cb_event;
276 usart->flags = (uint8_t)USART_FLAG_INIT;
277 }
278
279 return ARM_DRIVER_OK;
280 }
281
USART_DmaUninitialize(cmsis_usart_dma_driver_state_t * usart)282 static int32_t USART_DmaUninitialize(cmsis_usart_dma_driver_state_t *usart)
283 {
284 usart->flags = (uint8_t)USART_FLAG_UNINIT;
285 return ARM_DRIVER_OK;
286 }
287
USART_DmaPowerControl(ARM_POWER_STATE state,cmsis_usart_dma_driver_state_t * usart)288 static int32_t USART_DmaPowerControl(ARM_POWER_STATE state, cmsis_usart_dma_driver_state_t *usart)
289 {
290 usart_config_t config;
291 int32_t result = ARM_DRIVER_OK;
292
293 switch (state)
294 {
295 case ARM_POWER_OFF:
296 if ((usart->flags & (uint8_t)USART_FLAG_POWER) != 0U)
297 {
298 USART_Deinit(usart->resource->base);
299 DMA_DisableChannel(usart->dmaResource->rxDmaBase, usart->dmaResource->rxDmaChannel);
300 DMA_DisableChannel(usart->dmaResource->txDmaBase, usart->dmaResource->txDmaChannel);
301 usart->flags = (uint8_t)USART_FLAG_INIT;
302 }
303 break;
304 case ARM_POWER_LOW:
305 result = ARM_DRIVER_ERROR_UNSUPPORTED;
306 break;
307 case ARM_POWER_FULL:
308 /* Must be initialized first. */
309 if (usart->flags == (uint8_t)USART_FLAG_UNINIT)
310 {
311 result = ARM_DRIVER_ERROR;
312 break;
313 }
314
315 if ((usart->flags & (uint8_t)USART_FLAG_POWER) != 0U)
316 {
317 /* Driver already powered */
318 break;
319 }
320
321 USART_GetDefaultConfig(&config);
322 config.enableTx = true;
323 config.enableRx = true;
324
325 /* Set up DMA setting. */
326 DMA_EnableChannel(usart->dmaResource->txDmaBase, usart->dmaResource->txDmaChannel);
327 DMA_EnableChannel(usart->dmaResource->rxDmaBase, usart->dmaResource->rxDmaChannel);
328
329 DMA_CreateHandle(usart->rxHandle, usart->dmaResource->rxDmaBase, usart->dmaResource->rxDmaChannel);
330 DMA_CreateHandle(usart->txHandle, usart->dmaResource->txDmaBase, usart->dmaResource->txDmaChannel);
331
332 /* Setup the usart. */
333 (void)USART_Init(usart->resource->base, &config, usart->resource->GetFreq());
334 (void)USART_TransferCreateHandleDMA(usart->resource->base, usart->handle, KSDK_USART_DmaCallback,
335 (void *)usart->cb_event, usart->txHandle, usart->rxHandle);
336
337 usart->flags |= ((uint8_t)USART_FLAG_POWER | (uint8_t)USART_FLAG_CONFIGURED);
338 break;
339 default:
340 result = ARM_DRIVER_ERROR_UNSUPPORTED;
341 break;
342 }
343
344 return result;
345 }
346
USART_DmaSend(const void * data,uint32_t num,cmsis_usart_dma_driver_state_t * usart)347 static int32_t USART_DmaSend(const void *data, uint32_t num, cmsis_usart_dma_driver_state_t *usart)
348 {
349 int32_t ret;
350 status_t status;
351 usart_transfer_t xfer;
352
353 xfer.txData = (const uint8_t *)data;
354 xfer.dataSize = num;
355
356 status = USART_TransferSendDMA(usart->resource->base, usart->handle, &xfer);
357
358 switch (status)
359 {
360 case kStatus_Success:
361 ret = ARM_DRIVER_OK;
362 break;
363 case kStatus_InvalidArgument:
364 ret = ARM_DRIVER_ERROR_PARAMETER;
365 break;
366 case kStatus_USART_TxBusy:
367 ret = ARM_DRIVER_ERROR_BUSY;
368 break;
369 default:
370 ret = ARM_DRIVER_ERROR;
371 break;
372 }
373
374 return ret;
375 }
376
USART_DmaReceive(void * data,uint32_t num,cmsis_usart_dma_driver_state_t * usart)377 static int32_t USART_DmaReceive(void *data, uint32_t num, cmsis_usart_dma_driver_state_t *usart)
378 {
379 int32_t ret;
380 status_t status;
381 usart_transfer_t xfer;
382
383 xfer.rxData = (uint8_t *)data;
384 xfer.dataSize = num;
385
386 status = USART_TransferReceiveDMA(usart->resource->base, usart->handle, &xfer);
387
388 switch (status)
389 {
390 case kStatus_Success:
391 ret = ARM_DRIVER_OK;
392 break;
393 case kStatus_InvalidArgument:
394 ret = ARM_DRIVER_ERROR_PARAMETER;
395 break;
396 case kStatus_USART_RxBusy:
397 ret = ARM_DRIVER_ERROR_BUSY;
398 break;
399 default:
400 ret = ARM_DRIVER_ERROR;
401 break;
402 }
403
404 return ret;
405 }
406
USART_DmaTransfer(const void * data_out,void * data_in,uint32_t num,cmsis_usart_dma_driver_state_t * usart)407 static int32_t USART_DmaTransfer(const void *data_out,
408 void *data_in,
409 uint32_t num,
410 cmsis_usart_dma_driver_state_t *usart)
411 {
412 /* Only in synchronous mode */
413 return ARM_DRIVER_ERROR;
414 }
415
USART_DmaGetTxCount(cmsis_usart_dma_driver_state_t * usart)416 static uint32_t USART_DmaGetTxCount(cmsis_usart_dma_driver_state_t *usart)
417 {
418 uint32_t cnt;
419
420 /* If TX not in progress, then the TX count is txDataSizeAll saved in handle. */
421 if (kStatus_NoTransferInProgress == USART_TransferGetSendCountDMA(usart->resource->base, usart->handle, &cnt))
422 {
423 cnt = usart->handle->txDataSizeAll;
424 }
425
426 return cnt;
427 }
428
USART_DmaGetRxCount(cmsis_usart_dma_driver_state_t * usart)429 static uint32_t USART_DmaGetRxCount(cmsis_usart_dma_driver_state_t *usart)
430 {
431 uint32_t cnt;
432
433 if (kStatus_NoTransferInProgress == USART_TransferGetReceiveCountDMA(usart->resource->base, usart->handle, &cnt))
434 {
435 cnt = usart->handle->rxDataSizeAll;
436 }
437
438 return cnt;
439 }
440
USART_DmaControl(uint32_t control,uint32_t arg,cmsis_usart_dma_driver_state_t * usart)441 static int32_t USART_DmaControl(uint32_t control, uint32_t arg, cmsis_usart_dma_driver_state_t *usart)
442 {
443 int32_t result = ARM_DRIVER_OK;
444 bool isContinue = false;
445 /* Must be power on. */
446 if (0U == (usart->flags & (uint8_t)USART_FLAG_POWER))
447 {
448 return ARM_DRIVER_ERROR;
449 }
450
451 /* Does not support these features. */
452 if ((control & (ARM_USART_FLOW_CONTROL_Msk | ARM_USART_CPOL_Msk | ARM_USART_CPHA_Msk)) != 0U)
453 {
454 return ARM_DRIVER_ERROR_UNSUPPORTED;
455 }
456
457 switch (control & ARM_USART_CONTROL_Msk)
458 {
459 /* Abort Send */
460 case ARM_USART_ABORT_SEND:
461 USART_EnableTxDMA(usart->resource->base, false);
462 DMA_AbortTransfer(usart->handle->txDmaHandle);
463 usart->handle->txState = (uint8_t)kUSART_TxIdle;
464 result = ARM_DRIVER_OK;
465 break;
466
467 /* Abort receive */
468 case ARM_USART_ABORT_RECEIVE:
469 USART_EnableRxDMA(usart->resource->base, false);
470 DMA_AbortTransfer(usart->handle->rxDmaHandle);
471 usart->handle->rxState = (uint8_t)kUSART_RxIdle;
472 result = ARM_DRIVER_OK;
473 break;
474
475 default:
476 isContinue = true;
477 break;
478 }
479 if (isContinue)
480 {
481 result = USART_CommonControl(control, arg, usart->resource, &usart->flags);
482 }
483 return result;
484 }
485
USART_DmaGetStatus(cmsis_usart_dma_driver_state_t * usart)486 static ARM_USART_STATUS USART_DmaGetStatus(cmsis_usart_dma_driver_state_t *usart)
487 {
488 ARM_USART_STATUS stat = {0};
489 uint32_t ksdk_usart_status = usart->resource->base->STAT;
490
491 stat.tx_busy = (((uint8_t)kUSART_TxBusy == usart->handle->txState) ? (1U) : (0U));
492 stat.rx_busy = (((uint8_t)kUSART_RxBusy == usart->handle->rxState) ? (1U) : (0U));
493
494 stat.tx_underflow = 0U;
495 stat.rx_overflow = 0U;
496
497 stat.rx_break = (uint32_t)(((ksdk_usart_status & USART_STAT_RXBRK_MASK)) != 0U);
498
499 stat.rx_framing_error = (uint32_t)(((ksdk_usart_status & USART_STAT_FRAMERRINT_MASK)) != 0U);
500 stat.rx_parity_error = (uint32_t)(((ksdk_usart_status & USART_STAT_PARITYERRINT_MASK)) != 0U);
501 stat.reserved = 0U;
502
503 return stat;
504 }
505 #endif
506
507 #endif
508
509 #if ((defined(RTE_USART0) && RTE_USART0 && !(defined(RTE_USART0_DMA_EN) && RTE_USART0_DMA_EN)) || \
510 (defined(RTE_USART1) && RTE_USART1 && !(defined(RTE_USART1_DMA_EN) && RTE_USART1_DMA_EN)) || \
511 (defined(RTE_USART2) && RTE_USART2 && !(defined(RTE_USART2_DMA_EN) && RTE_USART2_DMA_EN)) || \
512 (defined(RTE_USART3) && RTE_USART3 && !(defined(RTE_USART3_DMA_EN) && RTE_USART3_DMA_EN)) || \
513 (defined(RTE_USART4) && RTE_USART4 && !(defined(RTE_USART4_DMA_EN) && RTE_USART4_DMA_EN)) || \
514 (defined(RTE_USART5) && RTE_USART5 && !(defined(RTE_USART5_DMA_EN) && RTE_USART5_DMA_EN)) || \
515 (defined(RTE_USART6) && RTE_USART6 && !(defined(RTE_USART6_DMA_EN) && RTE_USART6_DMA_EN)) || \
516 (defined(RTE_USART7) && RTE_USART7 && !(defined(RTE_USART7_DMA_EN) && RTE_USART7_DMA_EN)) || \
517 (defined(RTE_USART8) && RTE_USART8 && !(defined(RTE_USART8_DMA_EN) && RTE_USART8_DMA_EN)) || \
518 (defined(RTE_USART9) && RTE_USART9 && !(defined(RTE_USART9_DMA_EN) && RTE_USART9_DMA_EN)) || \
519 (defined(RTE_USART10) && RTE_USART10 && !(defined(RTE_USART10_DMA_EN) && RTE_USART10_DMA_EN)) || \
520 (defined(RTE_USART11) && RTE_USART11 && !(defined(RTE_USART11_DMA_EN) && RTE_USART11_DMA_EN)) || \
521 (defined(RTE_USART12) && RTE_USART12 && !(defined(RTE_USART12_DMA_EN) && RTE_USART12_DMA_EN)) || \
522 (defined(RTE_USART13) && RTE_USART13 && !(defined(RTE_USART13_DMA_EN) && RTE_USART13_DMA_EN)))
523
KSDK_USART_NonBlockingCallback(USART_Type * base,usart_handle_t * handle,status_t status,void * userData)524 static void KSDK_USART_NonBlockingCallback(USART_Type *base, usart_handle_t *handle, status_t status, void *userData)
525 {
526 uint32_t event = 0U;
527
528 switch (status)
529 {
530 case kStatus_USART_TxIdle:
531 event = ARM_USART_EVENT_SEND_COMPLETE;
532 break;
533 case kStatus_USART_RxIdle:
534 event = ARM_USART_EVENT_RECEIVE_COMPLETE;
535 break;
536 case kStatus_USART_RxError:
537 event = ARM_USART_EVENT_RX_OVERFLOW;
538 break;
539 case kStatus_USART_TxError:
540 event = ARM_USART_EVENT_TX_UNDERFLOW;
541 break;
542 case kStatus_USART_FramingError:
543 event = ARM_USART_EVENT_RX_FRAMING_ERROR;
544 break;
545 case kStatus_USART_ParityError:
546 event = ARM_USART_EVENT_RX_PARITY_ERROR;
547 break;
548 default:
549 /* Avoid MISRA 16.4. */
550 break;
551 }
552
553 /* User data is actually CMSIS driver callback. */
554 if (userData != NULL)
555 {
556 ((ARM_USART_SignalEvent_t)userData)(event);
557 }
558 }
559
USART_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event,cmsis_usart_non_blocking_driver_state_t * usart)560 static int32_t USART_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event,
561 cmsis_usart_non_blocking_driver_state_t *usart)
562 {
563 if (0U == (usart->flags & (uint8_t)USART_FLAG_INIT))
564 {
565 usart->cb_event = cb_event;
566 usart->flags = (uint8_t)USART_FLAG_INIT;
567 }
568
569 return ARM_DRIVER_OK;
570 }
571
USART_NonBlockingUninitialize(cmsis_usart_non_blocking_driver_state_t * usart)572 static int32_t USART_NonBlockingUninitialize(cmsis_usart_non_blocking_driver_state_t *usart)
573 {
574 usart->flags = (uint8_t)USART_FLAG_UNINIT;
575 return ARM_DRIVER_OK;
576 }
577
USART_NonBlockingPowerControl(ARM_POWER_STATE state,cmsis_usart_non_blocking_driver_state_t * usart)578 static int32_t USART_NonBlockingPowerControl(ARM_POWER_STATE state, cmsis_usart_non_blocking_driver_state_t *usart)
579 {
580 usart_config_t config;
581 int32_t result = ARM_DRIVER_OK;
582
583 switch (state)
584 {
585 case ARM_POWER_OFF:
586 if ((usart->flags & (uint8_t)USART_FLAG_POWER) != 0U)
587 {
588 USART_Deinit(usart->resource->base);
589 usart->flags = (uint8_t)USART_FLAG_INIT;
590 }
591 break;
592 case ARM_POWER_LOW:
593 result = ARM_DRIVER_ERROR_UNSUPPORTED;
594 break;
595 case ARM_POWER_FULL:
596 /* Must be initialized first. */
597 if (usart->flags == (uint8_t)USART_FLAG_UNINIT)
598 {
599 result = ARM_DRIVER_ERROR;
600 break;
601 }
602
603 if ((usart->flags & (uint8_t)USART_FLAG_POWER) != 0U)
604 {
605 /* Driver already powered */
606 break;
607 }
608
609 USART_GetDefaultConfig(&config);
610 config.enableTx = true;
611 config.enableRx = true;
612
613 (void)USART_Init(usart->resource->base, &config, usart->resource->GetFreq());
614 (void)USART_TransferCreateHandle(usart->resource->base, usart->handle, KSDK_USART_NonBlockingCallback,
615 (void *)usart->cb_event);
616 usart->flags |= ((uint8_t)USART_FLAG_POWER | (uint8_t)USART_FLAG_CONFIGURED);
617
618 break;
619 default:
620 result = ARM_DRIVER_ERROR_UNSUPPORTED;
621 break;
622 }
623
624 return result;
625 }
626
USART_NonBlockingSend(const void * data,uint32_t num,cmsis_usart_non_blocking_driver_state_t * usart)627 static int32_t USART_NonBlockingSend(const void *data, uint32_t num, cmsis_usart_non_blocking_driver_state_t *usart)
628 {
629 int32_t ret;
630 status_t status;
631 usart_transfer_t xfer;
632
633 xfer.txData = (const uint8_t *)data;
634 xfer.dataSize = num;
635
636 status = USART_TransferSendNonBlocking(usart->resource->base, usart->handle, &xfer);
637
638 switch (status)
639 {
640 case kStatus_Success:
641 ret = ARM_DRIVER_OK;
642 break;
643 case kStatus_InvalidArgument:
644 ret = ARM_DRIVER_ERROR_PARAMETER;
645 break;
646 case kStatus_USART_TxBusy:
647 ret = ARM_DRIVER_ERROR_BUSY;
648 break;
649 default:
650 ret = ARM_DRIVER_ERROR;
651 break;
652 }
653
654 return ret;
655 }
656
USART_NonBlockingReceive(void * data,uint32_t num,cmsis_usart_non_blocking_driver_state_t * usart)657 static int32_t USART_NonBlockingReceive(void *data, uint32_t num, cmsis_usart_non_blocking_driver_state_t *usart)
658 {
659 int32_t ret;
660 status_t status;
661 usart_transfer_t xfer;
662
663 xfer.rxData = (uint8_t *)data;
664 xfer.dataSize = num;
665
666 status = USART_TransferReceiveNonBlocking(usart->resource->base, usart->handle, &xfer, NULL);
667
668 switch (status)
669 {
670 case kStatus_Success:
671 ret = ARM_DRIVER_OK;
672 break;
673 case kStatus_InvalidArgument:
674 ret = ARM_DRIVER_ERROR_PARAMETER;
675 break;
676 case kStatus_USART_RxBusy:
677 ret = ARM_DRIVER_ERROR_BUSY;
678 break;
679 default:
680 ret = ARM_DRIVER_ERROR;
681 break;
682 }
683
684 return ret;
685 }
686
USART_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num,cmsis_usart_non_blocking_driver_state_t * usart)687 static int32_t USART_NonBlockingTransfer(const void *data_out,
688 void *data_in,
689 uint32_t num,
690 cmsis_usart_non_blocking_driver_state_t *usart)
691 {
692 /* Only in synchronous mode */
693 return ARM_DRIVER_ERROR;
694 }
695
USART_NonBlockingGetTxCount(cmsis_usart_non_blocking_driver_state_t * usart)696 static uint32_t USART_NonBlockingGetTxCount(cmsis_usart_non_blocking_driver_state_t *usart)
697 {
698 uint32_t cnt;
699
700 /* If TX not in progress, then the TX count is txDataSizeAll saved in handle. */
701 if ((uint8_t)kUSART_TxIdle == usart->handle->txState)
702 {
703 cnt = usart->handle->txDataSizeAll;
704 }
705 else
706 {
707 cnt = usart->handle->txDataSizeAll - usart->handle->txDataSize;
708 }
709
710 return cnt;
711 }
712
USART_NonBlockingGetRxCount(cmsis_usart_non_blocking_driver_state_t * usart)713 static uint32_t USART_NonBlockingGetRxCount(cmsis_usart_non_blocking_driver_state_t *usart)
714 {
715 uint32_t cnt;
716
717 if ((uint8_t)kUSART_RxIdle == usart->handle->rxState)
718 {
719 cnt = usart->handle->rxDataSizeAll;
720 }
721 else
722 {
723 cnt = usart->handle->rxDataSizeAll - usart->handle->rxDataSize;
724 }
725
726 return cnt;
727 }
728
USART_NonBlockingControl(uint32_t control,uint32_t arg,cmsis_usart_non_blocking_driver_state_t * usart)729 static int32_t USART_NonBlockingControl(uint32_t control, uint32_t arg, cmsis_usart_non_blocking_driver_state_t *usart)
730 {
731 int32_t result = ARM_DRIVER_OK;
732 bool isContinue = false;
733 /* Must be power on. */
734 if (0U == (usart->flags & (uint8_t)USART_FLAG_POWER))
735 {
736 return ARM_DRIVER_ERROR;
737 }
738
739 /* Does not support these features. */
740 if ((control & (ARM_USART_FLOW_CONTROL_Msk | ARM_USART_CPOL_Msk | ARM_USART_CPHA_Msk)) != 0U)
741 {
742 return ARM_DRIVER_ERROR_UNSUPPORTED;
743 }
744
745 switch (control & ARM_USART_CONTROL_Msk)
746 {
747 /* Abort Send */
748 case ARM_USART_ABORT_SEND:
749 usart->resource->base->FIFOINTENSET &= ~USART_FIFOINTENSET_TXLVL_MASK;
750 usart->handle->txDataSize = 0;
751 usart->handle->txState = (uint8_t)kUSART_TxIdle;
752 result = ARM_DRIVER_OK;
753 break;
754
755 /* Abort receive */
756 case ARM_USART_ABORT_RECEIVE:
757 usart->resource->base->FIFOINTENSET &= ~USART_FIFOINTENSET_RXLVL_MASK;
758 usart->handle->rxDataSize = 0U;
759 usart->handle->rxState = (uint8_t)kUSART_RxIdle;
760 result = ARM_DRIVER_OK;
761 break;
762
763 default:
764 isContinue = true;
765 break;
766 }
767
768 if (isContinue)
769 {
770 result = USART_CommonControl(control, arg, usart->resource, &usart->flags);
771 }
772 return result;
773 }
774
USART_NonBlockingGetStatus(cmsis_usart_non_blocking_driver_state_t * usart)775 static ARM_USART_STATUS USART_NonBlockingGetStatus(cmsis_usart_non_blocking_driver_state_t *usart)
776 {
777 ARM_USART_STATUS stat = {0};
778 uint32_t ksdk_usart_status = usart->resource->base->STAT;
779
780 stat.tx_busy = (((uint8_t)kUSART_TxBusy == usart->handle->txState) ? (1U) : (0U));
781 stat.rx_busy = (((uint8_t)kUSART_RxBusy == usart->handle->rxState) ? (1U) : (0U));
782
783 stat.tx_underflow = 0U;
784 stat.rx_overflow = 0U;
785
786 stat.rx_break = (uint32_t)(((ksdk_usart_status & (uint32_t)USART_STAT_RXBRK_MASK)) != 0U);
787
788 stat.rx_framing_error = (uint32_t)(((ksdk_usart_status & USART_STAT_FRAMERRINT_MASK)) != 0U);
789 stat.rx_parity_error = (uint32_t)(((ksdk_usart_status & USART_STAT_PARITYERRINT_MASK)) != 0U);
790 stat.reserved = 0U;
791
792 return stat;
793 }
794
795 #endif
796
797 #if defined(USART0) && defined(RTE_USART0) && RTE_USART0
798
799 /* User needs to provide the implementation for USART0_GetFreq/InitPins/DeinitPins
800 in the application for enabling according instance. */
801 extern uint32_t USART0_GetFreq(void);
802
803 static cmsis_usart_resource_t usart0_Resource = {USART0, USART0_GetFreq};
804
805 /* usart0 Driver Control Block */
806
807 #if defined(RTE_USART0_DMA_EN) && RTE_USART0_DMA_EN
808
809 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
810
811 static cmsis_usart_dma_resource_t usart0_DmaResource = {
812 RTE_USART0_DMA_TX_DMA_BASE,
813 RTE_USART0_DMA_TX_CH,
814 RTE_USART0_DMA_RX_DMA_BASE,
815 RTE_USART0_DMA_RX_CH,
816 };
817
818 static usart_dma_handle_t USART0_DmaHandle;
819 static dma_handle_t USART0_DmaRxHandle;
820 static dma_handle_t USART0_DmaTxHandle;
821
822 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
823 ARMCC_SECTION("usart0_dma_driver_state")
824 static cmsis_usart_dma_driver_state_t usart0_DmaDriverState = {
825 #else
826 static cmsis_usart_dma_driver_state_t usart0_DmaDriverState = {
827 #endif
828 &usart0_Resource, &usart0_DmaResource, &USART0_DmaHandle, &USART0_DmaRxHandle, &USART0_DmaTxHandle,
829 };
830
USART0_DmaInitialize(ARM_USART_SignalEvent_t cb_event)831 static int32_t USART0_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
832 {
833 #ifdef RTE_USART0_PIN_INIT
834 RTE_USART0_PIN_INIT();
835 #endif
836 return USART_DmaInitialize(cb_event, &usart0_DmaDriverState);
837 }
838
USART0_DmaUninitialize(void)839 static int32_t USART0_DmaUninitialize(void)
840 {
841 #ifdef RTE_USART0_PIN_DEINIT
842 RTE_USART0_PIN_DEINIT();
843 #endif
844 return USART_DmaUninitialize(&usart0_DmaDriverState);
845 }
846
USART0_DmaPowerControl(ARM_POWER_STATE state)847 static int32_t USART0_DmaPowerControl(ARM_POWER_STATE state)
848 {
849 return USART_DmaPowerControl(state, &usart0_DmaDriverState);
850 }
851
USART0_DmaSend(const void * data,uint32_t num)852 static int32_t USART0_DmaSend(const void *data, uint32_t num)
853 {
854 return USART_DmaSend(data, num, &usart0_DmaDriverState);
855 }
856
USART0_DmaReceive(void * data,uint32_t num)857 static int32_t USART0_DmaReceive(void *data, uint32_t num)
858 {
859 return USART_DmaReceive(data, num, &usart0_DmaDriverState);
860 }
861
USART0_DmaTransfer(const void * data_out,void * data_in,uint32_t num)862 static int32_t USART0_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
863 {
864 return USART_DmaTransfer(data_out, data_in, num, &usart0_DmaDriverState);
865 }
866
USART0_DmaGetTxCount(void)867 static uint32_t USART0_DmaGetTxCount(void)
868 {
869 return USART_DmaGetTxCount(&usart0_DmaDriverState);
870 }
871
USART0_DmaGetRxCount(void)872 static uint32_t USART0_DmaGetRxCount(void)
873 {
874 return USART_DmaGetRxCount(&usart0_DmaDriverState);
875 }
876
USART0_DmaControl(uint32_t control,uint32_t arg)877 static int32_t USART0_DmaControl(uint32_t control, uint32_t arg)
878 {
879 return USART_DmaControl(control, arg, &usart0_DmaDriverState);
880 }
881
USART0_DmaGetStatus(void)882 static ARM_USART_STATUS USART0_DmaGetStatus(void)
883 {
884 return USART_DmaGetStatus(&usart0_DmaDriverState);
885 }
886
887 #endif
888
889 #else
890
891 static usart_handle_t USART0_Handle;
892 #if defined(USART0_RX_BUFFER_ENABLE) && (USART0_RX_BUFFER_ENABLE == 1)
893 static uint8_t usart0_rxRingBuffer[USART_RX_BUFFER_LEN];
894 #endif
895
896 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
897 ARMCC_SECTION("usart0_non_blocking_driver_state")
898 static cmsis_usart_non_blocking_driver_state_t usart0_NonBlockingDriverState = {
899 #else
900 static cmsis_usart_non_blocking_driver_state_t usart0_NonBlockingDriverState = {
901 #endif
902 &usart0_Resource,
903 &USART0_Handle,
904 };
905
USART0_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)906 static int32_t USART0_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
907 {
908 #ifdef RTE_USART0_PIN_INIT
909 RTE_USART0_PIN_INIT();
910 #endif
911 return USART_NonBlockingInitialize(cb_event, &usart0_NonBlockingDriverState);
912 }
913
USART0_NonBlockingUninitialize(void)914 static int32_t USART0_NonBlockingUninitialize(void)
915 {
916 #ifdef RTE_USART0_PIN_DEINIT
917 RTE_USART0_PIN_DEINIT();
918 #endif
919 return USART_NonBlockingUninitialize(&usart0_NonBlockingDriverState);
920 }
921
USART0_NonBlockingPowerControl(ARM_POWER_STATE state)922 static int32_t USART0_NonBlockingPowerControl(ARM_POWER_STATE state)
923 {
924 int32_t result;
925
926 result = USART_NonBlockingPowerControl(state, &usart0_NonBlockingDriverState);
927 #if defined(USART0_RX_BUFFER_ENABLE) && (USART0_RX_BUFFER_ENABLE == 1)
928 if ((state == ARM_POWER_FULL) && (usart0_NonBlockingDriverState.handle->rxRingBuffer == NULL))
929 {
930 USART_TransferStartRingBuffer(usart0_NonBlockingDriverState.resource->base,
931 usart0_NonBlockingDriverState.handle, usart0_rxRingBuffer, USART_RX_BUFFER_LEN);
932 }
933 #endif
934 return result;
935 }
936
USART0_NonBlockingSend(const void * data,uint32_t num)937 static int32_t USART0_NonBlockingSend(const void *data, uint32_t num)
938 {
939 return USART_NonBlockingSend(data, num, &usart0_NonBlockingDriverState);
940 }
941
USART0_NonBlockingReceive(void * data,uint32_t num)942 static int32_t USART0_NonBlockingReceive(void *data, uint32_t num)
943 {
944 return USART_NonBlockingReceive(data, num, &usart0_NonBlockingDriverState);
945 }
946
USART0_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)947 static int32_t USART0_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
948 {
949 return USART_NonBlockingTransfer(data_out, data_in, num, &usart0_NonBlockingDriverState);
950 }
951
USART0_NonBlockingGetTxCount(void)952 static uint32_t USART0_NonBlockingGetTxCount(void)
953 {
954 return USART_NonBlockingGetTxCount(&usart0_NonBlockingDriverState);
955 }
956
USART0_NonBlockingGetRxCount(void)957 static uint32_t USART0_NonBlockingGetRxCount(void)
958 {
959 return USART_NonBlockingGetRxCount(&usart0_NonBlockingDriverState);
960 }
961
USART0_NonBlockingControl(uint32_t control,uint32_t arg)962 static int32_t USART0_NonBlockingControl(uint32_t control, uint32_t arg)
963 {
964 int32_t result;
965
966 result = USART_NonBlockingControl(control, arg, &usart0_NonBlockingDriverState);
967 if (ARM_DRIVER_OK != result)
968 {
969 return result;
970 }
971 #if defined(USART0_RX_BUFFER_ENABLE) && (USART0_RX_BUFFER_ENABLE == 1)
972 /* Start receiving interrupts */
973 usart0_NonBlockingDriverState.resource->base->FIFOINTENSET |=
974 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
975 #endif
976 return ARM_DRIVER_OK;
977 }
978
USART0_NonBlockingGetStatus(void)979 static ARM_USART_STATUS USART0_NonBlockingGetStatus(void)
980 {
981 return USART_NonBlockingGetStatus(&usart0_NonBlockingDriverState);
982 }
983
984 #endif
985
986 ARM_DRIVER_USART Driver_USART0 = {
987 USARTx_GetVersion, USARTx_GetCapabilities,
988 #if RTE_USART0_DMA_EN
989 USART0_DmaInitialize, USART0_DmaUninitialize, USART0_DmaPowerControl, USART0_DmaSend, USART0_DmaReceive,
990 USART0_DmaTransfer, USART0_DmaGetTxCount, USART0_DmaGetRxCount, USART0_DmaControl, USART0_DmaGetStatus,
991 #else
992 USART0_NonBlockingInitialize,
993 USART0_NonBlockingUninitialize,
994 USART0_NonBlockingPowerControl,
995 USART0_NonBlockingSend,
996 USART0_NonBlockingReceive,
997 USART0_NonBlockingTransfer,
998 USART0_NonBlockingGetTxCount,
999 USART0_NonBlockingGetRxCount,
1000 USART0_NonBlockingControl,
1001 USART0_NonBlockingGetStatus,
1002 #endif
1003 USARTx_SetModemControl, USARTx_GetModemStatus};
1004
1005 #endif /* usart0 */
1006
1007 #if defined(USART1) && defined(RTE_USART1) && RTE_USART1
1008
1009 /* User needs to provide the implementation for USART1_GetFreq/InitPins/DeinitPins
1010 in the application for enabling according instance. */
1011 extern uint32_t USART1_GetFreq(void);
1012
1013 static cmsis_usart_resource_t usart1_Resource = {USART1, USART1_GetFreq};
1014
1015 #if defined(RTE_USART1_DMA_EN) && RTE_USART1_DMA_EN
1016
1017 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
1018
1019 cmsis_usart_dma_resource_t usart1_DmaResource = {
1020 RTE_USART1_DMA_TX_DMA_BASE,
1021 RTE_USART1_DMA_TX_CH,
1022 RTE_USART1_DMA_RX_DMA_BASE,
1023 RTE_USART1_DMA_RX_CH,
1024 };
1025
1026 static usart_dma_handle_t USART1_DmaHandle;
1027 static dma_handle_t USART1_DmaRxHandle;
1028 static dma_handle_t USART1_DmaTxHandle;
1029
1030 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1031 ARMCC_SECTION("usart1_dma_driver_state")
1032 static cmsis_usart_dma_driver_state_t usart1_DmaDriverState = {
1033 #else
1034 static cmsis_usart_dma_driver_state_t usart1_DmaDriverState = {
1035 #endif
1036 &usart1_Resource, &usart1_DmaResource, &USART1_DmaHandle, &USART1_DmaRxHandle, &USART1_DmaTxHandle,
1037 };
1038
USART1_DmaInitialize(ARM_USART_SignalEvent_t cb_event)1039 static int32_t USART1_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
1040 {
1041 #ifdef RTE_USART1_PIN_INIT
1042 RTE_USART1_PIN_INIT();
1043 #endif
1044 return USART_DmaInitialize(cb_event, &usart1_DmaDriverState);
1045 }
1046
USART1_DmaUninitialize(void)1047 static int32_t USART1_DmaUninitialize(void)
1048 {
1049 #ifdef RTE_USART1_PIN_DEINIT
1050 RTE_USART1_PIN_DEINIT();
1051 #endif
1052 return USART_DmaUninitialize(&usart1_DmaDriverState);
1053 }
1054
USART1_DmaPowerControl(ARM_POWER_STATE state)1055 static int32_t USART1_DmaPowerControl(ARM_POWER_STATE state)
1056 {
1057 return USART_DmaPowerControl(state, &usart1_DmaDriverState);
1058 }
1059
USART1_DmaSend(const void * data,uint32_t num)1060 static int32_t USART1_DmaSend(const void *data, uint32_t num)
1061 {
1062 return USART_DmaSend(data, num, &usart1_DmaDriverState);
1063 }
1064
USART1_DmaReceive(void * data,uint32_t num)1065 static int32_t USART1_DmaReceive(void *data, uint32_t num)
1066 {
1067 return USART_DmaReceive(data, num, &usart1_DmaDriverState);
1068 }
1069
USART1_DmaTransfer(const void * data_out,void * data_in,uint32_t num)1070 static int32_t USART1_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
1071 {
1072 return USART_DmaTransfer(data_out, data_in, num, &usart1_DmaDriverState);
1073 }
1074
USART1_DmaGetTxCount(void)1075 static uint32_t USART1_DmaGetTxCount(void)
1076 {
1077 return USART_DmaGetTxCount(&usart1_DmaDriverState);
1078 }
1079
USART1_DmaGetRxCount(void)1080 static uint32_t USART1_DmaGetRxCount(void)
1081 {
1082 return USART_DmaGetRxCount(&usart1_DmaDriverState);
1083 }
1084
USART1_DmaControl(uint32_t control,uint32_t arg)1085 static int32_t USART1_DmaControl(uint32_t control, uint32_t arg)
1086 {
1087 return USART_DmaControl(control, arg, &usart1_DmaDriverState);
1088 }
1089
USART1_DmaGetStatus(void)1090 static ARM_USART_STATUS USART1_DmaGetStatus(void)
1091 {
1092 return USART_DmaGetStatus(&usart1_DmaDriverState);
1093 }
1094
1095 #endif
1096
1097 #else
1098
1099 static usart_handle_t USART1_Handle;
1100 #if defined(USART1_RX_BUFFER_ENABLE) && (USART1_RX_BUFFER_ENABLE == 1)
1101 static uint8_t usart1_rxRingBuffer[USART_RX_BUFFER_LEN];
1102 #endif
1103
1104 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1105 ARMCC_SECTION("usart1_non_blocking_driver_state")
1106 static cmsis_usart_non_blocking_driver_state_t usart1_NonBlockingDriverState = {
1107 #else
1108 static cmsis_usart_non_blocking_driver_state_t usart1_NonBlockingDriverState = {
1109 #endif
1110 &usart1_Resource,
1111 &USART1_Handle,
1112 };
1113
USART1_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)1114 static int32_t USART1_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
1115 {
1116 #ifdef RTE_USART1_PIN_INIT
1117 RTE_USART1_PIN_INIT();
1118 #endif
1119 return USART_NonBlockingInitialize(cb_event, &usart1_NonBlockingDriverState);
1120 }
1121
USART1_NonBlockingUninitialize(void)1122 static int32_t USART1_NonBlockingUninitialize(void)
1123 {
1124 #ifdef RTE_USART1_PIN_DEINIT
1125 RTE_USART1_PIN_DEINIT();
1126 #endif
1127 return USART_NonBlockingUninitialize(&usart1_NonBlockingDriverState);
1128 }
1129
USART1_NonBlockingPowerControl(ARM_POWER_STATE state)1130 static int32_t USART1_NonBlockingPowerControl(ARM_POWER_STATE state)
1131 {
1132 int32_t result;
1133
1134 result = USART_NonBlockingPowerControl(state, &usart1_NonBlockingDriverState);
1135 #if defined(USART1_RX_BUFFER_ENABLE) && (USART1_RX_BUFFER_ENABLE == 1)
1136 if ((state == ARM_POWER_FULL) && (usart1_NonBlockingDriverState.handle->rxRingBuffer == NULL))
1137 {
1138 USART_TransferStartRingBuffer(usart1_NonBlockingDriverState.resource->base,
1139 usart1_NonBlockingDriverState.handle, usart1_rxRingBuffer, USART_RX_BUFFER_LEN);
1140 }
1141 #endif
1142 return result;
1143 }
1144
USART1_NonBlockingSend(const void * data,uint32_t num)1145 static int32_t USART1_NonBlockingSend(const void *data, uint32_t num)
1146 {
1147 return USART_NonBlockingSend(data, num, &usart1_NonBlockingDriverState);
1148 }
1149
USART1_NonBlockingReceive(void * data,uint32_t num)1150 static int32_t USART1_NonBlockingReceive(void *data, uint32_t num)
1151 {
1152 return USART_NonBlockingReceive(data, num, &usart1_NonBlockingDriverState);
1153 }
1154
USART1_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)1155 static int32_t USART1_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
1156 {
1157 return USART_NonBlockingTransfer(data_out, data_in, num, &usart1_NonBlockingDriverState);
1158 }
1159
USART1_NonBlockingGetTxCount(void)1160 static uint32_t USART1_NonBlockingGetTxCount(void)
1161 {
1162 return USART_NonBlockingGetTxCount(&usart1_NonBlockingDriverState);
1163 }
1164
USART1_NonBlockingGetRxCount(void)1165 static uint32_t USART1_NonBlockingGetRxCount(void)
1166 {
1167 return USART_NonBlockingGetRxCount(&usart1_NonBlockingDriverState);
1168 }
1169
USART1_NonBlockingControl(uint32_t control,uint32_t arg)1170 static int32_t USART1_NonBlockingControl(uint32_t control, uint32_t arg)
1171 {
1172 int32_t result;
1173
1174 result = USART_NonBlockingControl(control, arg, &usart1_NonBlockingDriverState);
1175 if (ARM_DRIVER_OK != result)
1176 {
1177 return result;
1178 }
1179 #if defined(USART1_RX_BUFFER_ENABLE) && (USART1_RX_BUFFER_ENABLE == 1)
1180 /* Start receiving interrupts */
1181 usart1_NonBlockingDriverState.resource->base->FIFOINTENSET |=
1182 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
1183 #endif
1184 return ARM_DRIVER_OK;
1185 }
1186
USART1_NonBlockingGetStatus(void)1187 static ARM_USART_STATUS USART1_NonBlockingGetStatus(void)
1188 {
1189 return USART_NonBlockingGetStatus(&usart1_NonBlockingDriverState);
1190 }
1191
1192 #endif
1193
1194 ARM_DRIVER_USART Driver_USART1 = {
1195 USARTx_GetVersion, USARTx_GetCapabilities,
1196 #if RTE_USART1_DMA_EN
1197 USART1_DmaInitialize, USART1_DmaUninitialize, USART1_DmaPowerControl, USART1_DmaSend, USART1_DmaReceive,
1198 USART1_DmaTransfer, USART1_DmaGetTxCount, USART1_DmaGetRxCount, USART1_DmaControl, USART1_DmaGetStatus,
1199 #else
1200 USART1_NonBlockingInitialize,
1201 USART1_NonBlockingUninitialize,
1202 USART1_NonBlockingPowerControl,
1203 USART1_NonBlockingSend,
1204 USART1_NonBlockingReceive,
1205 USART1_NonBlockingTransfer,
1206 USART1_NonBlockingGetTxCount,
1207 USART1_NonBlockingGetRxCount,
1208 USART1_NonBlockingControl,
1209 USART1_NonBlockingGetStatus,
1210 #endif
1211 USARTx_SetModemControl, USARTx_GetModemStatus};
1212
1213 #endif /* usart1 */
1214
1215 #if defined(USART2) && defined(RTE_USART2) && RTE_USART2
1216
1217 /* User needs to provide the implementation for USART2_GetFreq/InitPins/DeinitPins
1218 in the application for enabling according instance. */
1219 extern uint32_t USART2_GetFreq(void);
1220
1221 static cmsis_usart_resource_t usart2_Resource = {USART2, USART2_GetFreq};
1222
1223 /* usart2 Driver Control Block */
1224
1225 #if defined(RTE_USART2_DMA_EN) && RTE_USART2_DMA_EN
1226
1227 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
1228
1229 cmsis_usart_dma_resource_t usart2_DmaResource = {
1230 RTE_USART2_DMA_TX_DMA_BASE,
1231 RTE_USART2_DMA_TX_CH,
1232 RTE_USART2_DMA_RX_DMA_BASE,
1233 RTE_USART2_DMA_RX_CH,
1234 };
1235
1236 static usart_dma_handle_t USART2_DmaHandle;
1237 static dma_handle_t USART2_DmaRxHandle;
1238 static dma_handle_t USART2_DmaTxHandle;
1239
1240 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1241 ARMCC_SECTION("usart2_dma_driver_state")
1242 static cmsis_usart_dma_driver_state_t usart2_DmaDriverState = {
1243 #else
1244 static cmsis_usart_dma_driver_state_t usart2_DmaDriverState = {
1245 #endif
1246 &usart2_Resource, &usart2_DmaResource, &USART2_DmaHandle, &USART2_DmaRxHandle, &USART2_DmaTxHandle,
1247 };
1248
USART2_DmaInitialize(ARM_USART_SignalEvent_t cb_event)1249 static int32_t USART2_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
1250 {
1251 #ifdef RTE_USART2_PIN_INIT
1252 RTE_USART2_PIN_INIT();
1253 #endif
1254 return USART_DmaInitialize(cb_event, &usart2_DmaDriverState);
1255 }
1256
USART2_DmaUninitialize(void)1257 static int32_t USART2_DmaUninitialize(void)
1258 {
1259 #ifdef RTE_USART2_PIN_DEINIT
1260 RTE_USART2_PIN_DEINIT();
1261 #endif
1262 return USART_DmaUninitialize(&usart2_DmaDriverState);
1263 }
1264
USART2_DmaPowerControl(ARM_POWER_STATE state)1265 static int32_t USART2_DmaPowerControl(ARM_POWER_STATE state)
1266 {
1267 return USART_DmaPowerControl(state, &usart2_DmaDriverState);
1268 }
1269
USART2_DmaSend(const void * data,uint32_t num)1270 static int32_t USART2_DmaSend(const void *data, uint32_t num)
1271 {
1272 return USART_DmaSend(data, num, &usart2_DmaDriverState);
1273 }
1274
USART2_DmaReceive(void * data,uint32_t num)1275 static int32_t USART2_DmaReceive(void *data, uint32_t num)
1276 {
1277 return USART_DmaReceive(data, num, &usart2_DmaDriverState);
1278 }
1279
USART2_DmaTransfer(const void * data_out,void * data_in,uint32_t num)1280 static int32_t USART2_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
1281 {
1282 return USART_DmaTransfer(data_out, data_in, num, &usart2_DmaDriverState);
1283 }
1284
USART2_DmaGetTxCount(void)1285 static uint32_t USART2_DmaGetTxCount(void)
1286 {
1287 return USART_DmaGetTxCount(&usart2_DmaDriverState);
1288 }
1289
USART2_DmaGetRxCount(void)1290 static uint32_t USART2_DmaGetRxCount(void)
1291 {
1292 return USART_DmaGetRxCount(&usart2_DmaDriverState);
1293 }
1294
USART2_DmaControl(uint32_t control,uint32_t arg)1295 static int32_t USART2_DmaControl(uint32_t control, uint32_t arg)
1296 {
1297 return USART_DmaControl(control, arg, &usart2_DmaDriverState);
1298 }
1299
USART2_DmaGetStatus(void)1300 static ARM_USART_STATUS USART2_DmaGetStatus(void)
1301 {
1302 return USART_DmaGetStatus(&usart2_DmaDriverState);
1303 }
1304
1305 #endif
1306
1307 #else
1308
1309 static usart_handle_t USART2_Handle;
1310 #if defined(USART2_RX_BUFFER_ENABLE) && (USART2_RX_BUFFER_ENABLE == 1)
1311 static uint8_t usart2_rxRingBuffer[USART_RX_BUFFER_LEN];
1312 #endif
1313
1314 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1315 ARMCC_SECTION("usart2_non_blocking_driver_state")
1316 static cmsis_usart_non_blocking_driver_state_t usart2_NonBlockingDriverState = {
1317 #else
1318 static cmsis_usart_non_blocking_driver_state_t usart2_NonBlockingDriverState = {
1319 #endif
1320 &usart2_Resource,
1321 &USART2_Handle,
1322 };
1323
USART2_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)1324 static int32_t USART2_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
1325 {
1326 #ifdef RTE_USART2_PIN_INIT
1327 RTE_USART2_PIN_INIT();
1328 #endif
1329 return USART_NonBlockingInitialize(cb_event, &usart2_NonBlockingDriverState);
1330 }
1331
USART2_NonBlockingUninitialize(void)1332 static int32_t USART2_NonBlockingUninitialize(void)
1333 {
1334 #ifdef RTE_USART2_PIN_DEINIT
1335 RTE_USART2_PIN_DEINIT();
1336 #endif
1337 return USART_NonBlockingUninitialize(&usart2_NonBlockingDriverState);
1338 }
1339
USART2_NonBlockingPowerControl(ARM_POWER_STATE state)1340 static int32_t USART2_NonBlockingPowerControl(ARM_POWER_STATE state)
1341 {
1342 int32_t result;
1343
1344 result = USART_NonBlockingPowerControl(state, &usart2_NonBlockingDriverState);
1345 #if defined(USART2_RX_BUFFER_ENABLE) && (USART2_RX_BUFFER_ENABLE == 1)
1346 if ((state == ARM_POWER_FULL) && (usart2_NonBlockingDriverState.handle->rxRingBuffer == NULL))
1347 {
1348 USART_TransferStartRingBuffer(usart2_NonBlockingDriverState.resource->base,
1349 usart2_NonBlockingDriverState.handle, usart2_rxRingBuffer, USART_RX_BUFFER_LEN);
1350 }
1351 #endif
1352 return result;
1353 }
1354
USART2_NonBlockingSend(const void * data,uint32_t num)1355 static int32_t USART2_NonBlockingSend(const void *data, uint32_t num)
1356 {
1357 return USART_NonBlockingSend(data, num, &usart2_NonBlockingDriverState);
1358 }
1359
USART2_NonBlockingReceive(void * data,uint32_t num)1360 static int32_t USART2_NonBlockingReceive(void *data, uint32_t num)
1361 {
1362 return USART_NonBlockingReceive(data, num, &usart2_NonBlockingDriverState);
1363 }
1364
USART2_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)1365 static int32_t USART2_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
1366 {
1367 return USART_NonBlockingTransfer(data_out, data_in, num, &usart2_NonBlockingDriverState);
1368 }
1369
USART2_NonBlockingGetTxCount(void)1370 static uint32_t USART2_NonBlockingGetTxCount(void)
1371 {
1372 return USART_NonBlockingGetTxCount(&usart2_NonBlockingDriverState);
1373 }
1374
USART2_NonBlockingGetRxCount(void)1375 static uint32_t USART2_NonBlockingGetRxCount(void)
1376 {
1377 return USART_NonBlockingGetRxCount(&usart2_NonBlockingDriverState);
1378 }
1379
USART2_NonBlockingControl(uint32_t control,uint32_t arg)1380 static int32_t USART2_NonBlockingControl(uint32_t control, uint32_t arg)
1381 {
1382 int32_t result;
1383
1384 result = USART_NonBlockingControl(control, arg, &usart2_NonBlockingDriverState);
1385 if (ARM_DRIVER_OK != result)
1386 {
1387 return result;
1388 }
1389 #if defined(USART2_RX_BUFFER_ENABLE) && (USART2_RX_BUFFER_ENABLE == 1)
1390 /* Start receiving interrupts */
1391 usart2_NonBlockingDriverState.resource->base->FIFOINTENSET |=
1392 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
1393 #endif
1394 return ARM_DRIVER_OK;
1395 }
1396
USART2_NonBlockingGetStatus(void)1397 static ARM_USART_STATUS USART2_NonBlockingGetStatus(void)
1398 {
1399 return USART_NonBlockingGetStatus(&usart2_NonBlockingDriverState);
1400 }
1401
1402 #endif
1403
1404 ARM_DRIVER_USART Driver_USART2 = {
1405 USARTx_GetVersion, USARTx_GetCapabilities,
1406 #if RTE_USART2_DMA_EN
1407 USART2_DmaInitialize, USART2_DmaUninitialize, USART2_DmaPowerControl, USART2_DmaSend, USART2_DmaReceive,
1408 USART2_DmaTransfer, USART2_DmaGetTxCount, USART2_DmaGetRxCount, USART2_DmaControl, USART2_DmaGetStatus,
1409 #else
1410 USART2_NonBlockingInitialize,
1411 USART2_NonBlockingUninitialize,
1412 USART2_NonBlockingPowerControl,
1413 USART2_NonBlockingSend,
1414 USART2_NonBlockingReceive,
1415 USART2_NonBlockingTransfer,
1416 USART2_NonBlockingGetTxCount,
1417 USART2_NonBlockingGetRxCount,
1418 USART2_NonBlockingControl,
1419 USART2_NonBlockingGetStatus,
1420 #endif
1421 USARTx_SetModemControl, USARTx_GetModemStatus};
1422
1423 #endif /* usart2 */
1424
1425 #if defined(USART3) && defined(RTE_USART3) && RTE_USART3
1426
1427 /* User needs to provide the implementation for USART3_GetFreq/InitPins/DeinitPins
1428 in the application for enabling according instance. */
1429 extern uint32_t USART3_GetFreq(void);
1430
1431 static cmsis_usart_resource_t usart3_Resource = {USART3, USART3_GetFreq};
1432
1433 /* usart3 Driver Control Block */
1434 #if defined(RTE_USART3_DMA_EN) && RTE_USART3_DMA_EN
1435
1436 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
1437
1438 cmsis_usart_dma_resource_t usart3_DmaResource = {
1439 RTE_USART3_DMA_TX_DMA_BASE,
1440 RTE_USART3_DMA_TX_CH,
1441 RTE_USART3_DMA_RX_DMA_BASE,
1442 RTE_USART3_DMA_RX_CH,
1443 };
1444
1445 static usart_dma_handle_t USART3_DmaHandle;
1446 static dma_handle_t USART3_DmaRxHandle;
1447 static dma_handle_t USART3_DmaTxHandle;
1448
1449 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1450 ARMCC_SECTION("usart3_dma_driver_state")
1451 static cmsis_usart_dma_driver_state_t usart3_DmaDriverState = {
1452 #else
1453 static cmsis_usart_dma_driver_state_t usart3_DmaDriverState = {
1454 #endif
1455 &usart3_Resource, &usart3_DmaResource, &USART3_DmaHandle, &USART3_DmaRxHandle, &USART3_DmaTxHandle,
1456 };
1457
USART3_DmaInitialize(ARM_USART_SignalEvent_t cb_event)1458 static int32_t USART3_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
1459 {
1460 #ifdef RTE_USART3_PIN_INIT
1461 RTE_USART3_PIN_INIT();
1462 #endif
1463 return USART_DmaInitialize(cb_event, &usart3_DmaDriverState);
1464 }
1465
USART3_DmaUninitialize(void)1466 static int32_t USART3_DmaUninitialize(void)
1467 {
1468 #ifdef RTE_USART3_PIN_DEINIT
1469 RTE_USART3_PIN_DEINIT();
1470 #endif
1471 return USART_DmaUninitialize(&usart3_DmaDriverState);
1472 }
1473
USART3_DmaPowerControl(ARM_POWER_STATE state)1474 static int32_t USART3_DmaPowerControl(ARM_POWER_STATE state)
1475 {
1476 return USART_DmaPowerControl(state, &usart3_DmaDriverState);
1477 }
1478
USART3_DmaSend(const void * data,uint32_t num)1479 static int32_t USART3_DmaSend(const void *data, uint32_t num)
1480 {
1481 return USART_DmaSend(data, num, &usart3_DmaDriverState);
1482 }
1483
USART3_DmaReceive(void * data,uint32_t num)1484 static int32_t USART3_DmaReceive(void *data, uint32_t num)
1485 {
1486 return USART_DmaReceive(data, num, &usart3_DmaDriverState);
1487 }
1488
USART3_DmaTransfer(const void * data_out,void * data_in,uint32_t num)1489 static int32_t USART3_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
1490 {
1491 return USART_DmaTransfer(data_out, data_in, num, &usart3_DmaDriverState);
1492 }
1493
USART3_DmaGetTxCount(void)1494 static uint32_t USART3_DmaGetTxCount(void)
1495 {
1496 return USART_DmaGetTxCount(&usart3_DmaDriverState);
1497 }
1498
USART3_DmaGetRxCount(void)1499 static uint32_t USART3_DmaGetRxCount(void)
1500 {
1501 return USART_DmaGetRxCount(&usart3_DmaDriverState);
1502 }
1503
USART3_DmaControl(uint32_t control,uint32_t arg)1504 static int32_t USART3_DmaControl(uint32_t control, uint32_t arg)
1505 {
1506 return USART_DmaControl(control, arg, &usart3_DmaDriverState);
1507 }
1508
USART3_DmaGetStatus(void)1509 static ARM_USART_STATUS USART3_DmaGetStatus(void)
1510 {
1511 return USART_DmaGetStatus(&usart3_DmaDriverState);
1512 }
1513
1514 #endif
1515
1516 #else
1517
1518 static usart_handle_t USART3_Handle;
1519 #if defined(USART3_RX_BUFFER_ENABLE) && (USART3_RX_BUFFER_ENABLE == 1)
1520 static uint8_t usart3_rxRingBuffer[USART_RX_BUFFER_LEN];
1521 #endif
1522
1523 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1524 ARMCC_SECTION("usart3_non_blocking_driver_state")
1525 static cmsis_usart_non_blocking_driver_state_t usart3_NonBlockingDriverState = {
1526 #else
1527 static cmsis_usart_non_blocking_driver_state_t usart3_NonBlockingDriverState = {
1528 #endif
1529 &usart3_Resource,
1530 &USART3_Handle,
1531 };
1532
USART3_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)1533 static int32_t USART3_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
1534 {
1535 #ifdef RTE_USART3_PIN_INIT
1536 RTE_USART3_PIN_INIT();
1537 #endif
1538 return USART_NonBlockingInitialize(cb_event, &usart3_NonBlockingDriverState);
1539 }
1540
USART3_NonBlockingUninitialize(void)1541 static int32_t USART3_NonBlockingUninitialize(void)
1542 {
1543 #ifdef RTE_USART3_PIN_DEINIT
1544 RTE_USART3_PIN_DEINIT();
1545 #endif
1546 return USART_NonBlockingUninitialize(&usart3_NonBlockingDriverState);
1547 }
1548
USART3_NonBlockingPowerControl(ARM_POWER_STATE state)1549 static int32_t USART3_NonBlockingPowerControl(ARM_POWER_STATE state)
1550 {
1551 int32_t result;
1552
1553 result = USART_NonBlockingPowerControl(state, &usart3_NonBlockingDriverState);
1554 #if defined(USART3_RX_BUFFER_ENABLE) && (USART3_RX_BUFFER_ENABLE == 1)
1555 if ((state == ARM_POWER_FULL) && (usart3_NonBlockingDriverState.handle->rxRingBuffer == NULL))
1556 {
1557 USART_TransferStartRingBuffer(usart3_NonBlockingDriverState.resource->base,
1558 usart3_NonBlockingDriverState.handle, usart3_rxRingBuffer, USART_RX_BUFFER_LEN);
1559 }
1560 #endif
1561 return result;
1562 }
1563
USART3_NonBlockingSend(const void * data,uint32_t num)1564 static int32_t USART3_NonBlockingSend(const void *data, uint32_t num)
1565 {
1566 return USART_NonBlockingSend(data, num, &usart3_NonBlockingDriverState);
1567 }
1568
USART3_NonBlockingReceive(void * data,uint32_t num)1569 static int32_t USART3_NonBlockingReceive(void *data, uint32_t num)
1570 {
1571 return USART_NonBlockingReceive(data, num, &usart3_NonBlockingDriverState);
1572 }
1573
USART3_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)1574 static int32_t USART3_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
1575 {
1576 return USART_NonBlockingTransfer(data_out, data_in, num, &usart3_NonBlockingDriverState);
1577 }
1578
USART3_NonBlockingGetTxCount(void)1579 static uint32_t USART3_NonBlockingGetTxCount(void)
1580 {
1581 return USART_NonBlockingGetTxCount(&usart3_NonBlockingDriverState);
1582 }
1583
USART3_NonBlockingGetRxCount(void)1584 static uint32_t USART3_NonBlockingGetRxCount(void)
1585 {
1586 return USART_NonBlockingGetRxCount(&usart3_NonBlockingDriverState);
1587 }
1588
USART3_NonBlockingControl(uint32_t control,uint32_t arg)1589 static int32_t USART3_NonBlockingControl(uint32_t control, uint32_t arg)
1590 {
1591 int32_t result;
1592
1593 result = USART_NonBlockingControl(control, arg, &usart3_NonBlockingDriverState);
1594 if (ARM_DRIVER_OK != result)
1595 {
1596 return result;
1597 }
1598 #if defined(USART3_RX_BUFFER_ENABLE) && (USART3_RX_BUFFER_ENABLE == 1)
1599 /* Start receiving interrupts */
1600 usart3_NonBlockingDriverState.resource->base->FIFOINTENSET |=
1601 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
1602 #endif
1603 return ARM_DRIVER_OK;
1604 }
1605
USART3_NonBlockingGetStatus(void)1606 static ARM_USART_STATUS USART3_NonBlockingGetStatus(void)
1607 {
1608 return USART_NonBlockingGetStatus(&usart3_NonBlockingDriverState);
1609 }
1610
1611 #endif
1612
1613 ARM_DRIVER_USART Driver_USART3 = {
1614 USARTx_GetVersion, USARTx_GetCapabilities,
1615 #if RTE_USART3_DMA_EN
1616 USART3_DmaInitialize, USART3_DmaUninitialize, USART3_DmaPowerControl, USART3_DmaSend, USART3_DmaReceive,
1617 USART3_DmaTransfer, USART3_DmaGetTxCount, USART3_DmaGetRxCount, USART3_DmaControl, USART3_DmaGetStatus,
1618 #else
1619 USART3_NonBlockingInitialize,
1620 USART3_NonBlockingUninitialize,
1621 USART3_NonBlockingPowerControl,
1622 USART3_NonBlockingSend,
1623 USART3_NonBlockingReceive,
1624 USART3_NonBlockingTransfer,
1625 USART3_NonBlockingGetTxCount,
1626 USART3_NonBlockingGetRxCount,
1627 USART3_NonBlockingControl,
1628 USART3_NonBlockingGetStatus,
1629 #endif
1630 USARTx_SetModemControl, USARTx_GetModemStatus};
1631
1632 #endif /* usart3 */
1633
1634 #if defined(USART4) && defined(RTE_USART4) && RTE_USART4
1635
1636 /* User needs to provide the implementation for USART4_GetFreq/InitPins/DeinitPins
1637 in the application for enabling according instance. */
1638 extern uint32_t USART4_GetFreq(void);
1639
1640 static cmsis_usart_resource_t usart4_Resource = {USART4, USART4_GetFreq};
1641
1642 #if defined(RTE_USART4_DMA_EN) && RTE_USART4_DMA_EN
1643
1644 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
1645
1646 cmsis_usart_dma_resource_t usart4_DmaResource = {
1647 RTE_USART4_DMA_TX_DMA_BASE,
1648 RTE_USART4_DMA_TX_CH,
1649 RTE_USART4_DMA_RX_DMA_BASE,
1650 RTE_USART4_DMA_RX_CH,
1651 };
1652
1653 static usart_dma_handle_t USART4_DmaHandle;
1654 static dma_handle_t USART4_DmaRxHandle;
1655 static dma_handle_t USART4_DmaTxHandle;
1656
1657 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1658 ARMCC_SECTION("usart4_dma_driver_state")
1659 static cmsis_usart_dma_driver_state_t usart4_DmaDriverState = {
1660 #else
1661 static cmsis_usart_dma_driver_state_t usart4_DmaDriverState = {
1662 #endif
1663 &usart4_Resource, &usart4_DmaResource, &USART4_DmaHandle, &USART4_DmaRxHandle, &USART4_DmaTxHandle,
1664 };
1665
USART4_DmaInitialize(ARM_USART_SignalEvent_t cb_event)1666 static int32_t USART4_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
1667 {
1668 #ifdef RTE_USART4_PIN_INIT
1669 RTE_USART4_PIN_INIT();
1670 #endif
1671 return USART_DmaInitialize(cb_event, &usart4_DmaDriverState);
1672 }
1673
USART4_DmaUninitialize(void)1674 static int32_t USART4_DmaUninitialize(void)
1675 {
1676 #ifdef RTE_USART4_PIN_DEINIT
1677 RTE_USART4_PIN_DEINIT();
1678 #endif
1679 return USART_DmaUninitialize(&usart4_DmaDriverState);
1680 }
1681
USART4_DmaPowerControl(ARM_POWER_STATE state)1682 static int32_t USART4_DmaPowerControl(ARM_POWER_STATE state)
1683 {
1684 return USART_DmaPowerControl(state, &usart4_DmaDriverState);
1685 }
1686
USART4_DmaSend(const void * data,uint32_t num)1687 static int32_t USART4_DmaSend(const void *data, uint32_t num)
1688 {
1689 return USART_DmaSend(data, num, &usart4_DmaDriverState);
1690 }
1691
USART4_DmaReceive(void * data,uint32_t num)1692 static int32_t USART4_DmaReceive(void *data, uint32_t num)
1693 {
1694 return USART_DmaReceive(data, num, &usart4_DmaDriverState);
1695 }
1696
USART4_DmaTransfer(const void * data_out,void * data_in,uint32_t num)1697 static int32_t USART4_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
1698 {
1699 return USART_DmaTransfer(data_out, data_in, num, &usart4_DmaDriverState);
1700 }
1701
USART4_DmaGetTxCount(void)1702 static uint32_t USART4_DmaGetTxCount(void)
1703 {
1704 return USART_DmaGetTxCount(&usart4_DmaDriverState);
1705 }
1706
USART4_DmaGetRxCount(void)1707 static uint32_t USART4_DmaGetRxCount(void)
1708 {
1709 return USART_DmaGetRxCount(&usart4_DmaDriverState);
1710 }
1711
USART4_DmaControl(uint32_t control,uint32_t arg)1712 static int32_t USART4_DmaControl(uint32_t control, uint32_t arg)
1713 {
1714 return USART_DmaControl(control, arg, &usart4_DmaDriverState);
1715 }
1716
USART4_DmaGetStatus(void)1717 static ARM_USART_STATUS USART4_DmaGetStatus(void)
1718 {
1719 return USART_DmaGetStatus(&usart4_DmaDriverState);
1720 }
1721
1722 #endif
1723
1724 #else
1725
1726 static usart_handle_t USART4_Handle;
1727 #if defined(USART4_RX_BUFFER_ENABLE) && (USART4_RX_BUFFER_ENABLE == 1)
1728 static uint8_t usart4_rxRingBuffer[USART_RX_BUFFER_LEN];
1729 #endif
1730
1731 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1732 ARMCC_SECTION("usart4_non_blocking_driver_state")
1733 static cmsis_usart_non_blocking_driver_state_t usart4_NonBlockingDriverState = {
1734 #else
1735 static cmsis_usart_non_blocking_driver_state_t usart4_NonBlockingDriverState = {
1736 #endif
1737 &usart4_Resource,
1738 &USART4_Handle,
1739 };
1740
USART4_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)1741 static int32_t USART4_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
1742 {
1743 #ifdef RTE_USART4_PIN_INIT
1744 RTE_USART4_PIN_INIT();
1745 #endif
1746 return USART_NonBlockingInitialize(cb_event, &usart4_NonBlockingDriverState);
1747 }
1748
USART4_NonBlockingUninitialize(void)1749 static int32_t USART4_NonBlockingUninitialize(void)
1750 {
1751 #ifdef RTE_USART4_PIN_DEINIT
1752 RTE_USART4_PIN_DEINIT();
1753 #endif
1754 return USART_NonBlockingUninitialize(&usart4_NonBlockingDriverState);
1755 }
1756
USART4_NonBlockingPowerControl(ARM_POWER_STATE state)1757 static int32_t USART4_NonBlockingPowerControl(ARM_POWER_STATE state)
1758 {
1759 uint32_t result;
1760
1761 result = USART_NonBlockingPowerControl(state, &usart4_NonBlockingDriverState);
1762 #if defined(USART4_RX_BUFFER_ENABLE) && (USART4_RX_BUFFER_ENABLE == 1)
1763 if ((state == ARM_POWER_FULL) && (usart4_NonBlockingDriverState.handle->rxRingBuffer == NULL))
1764 {
1765 USART_TransferStartRingBuffer(usart4_NonBlockingDriverState.resource->base,
1766 usart4_NonBlockingDriverState.handle, usart4_rxRingBuffer, USART_RX_BUFFER_LEN);
1767 }
1768 #endif
1769 return result;
1770 }
1771
USART4_NonBlockingSend(const void * data,uint32_t num)1772 static int32_t USART4_NonBlockingSend(const void *data, uint32_t num)
1773 {
1774 return USART_NonBlockingSend(data, num, &usart4_NonBlockingDriverState);
1775 }
1776
USART4_NonBlockingReceive(void * data,uint32_t num)1777 static int32_t USART4_NonBlockingReceive(void *data, uint32_t num)
1778 {
1779 return USART_NonBlockingReceive(data, num, &usart4_NonBlockingDriverState);
1780 }
1781
USART4_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)1782 static int32_t USART4_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
1783 {
1784 return USART_NonBlockingTransfer(data_out, data_in, num, &usart4_NonBlockingDriverState);
1785 }
1786
USART4_NonBlockingGetTxCount(void)1787 static uint32_t USART4_NonBlockingGetTxCount(void)
1788 {
1789 return USART_NonBlockingGetTxCount(&usart4_NonBlockingDriverState);
1790 }
1791
USART4_NonBlockingGetRxCount(void)1792 static uint32_t USART4_NonBlockingGetRxCount(void)
1793 {
1794 return USART_NonBlockingGetRxCount(&usart4_NonBlockingDriverState);
1795 }
1796
USART4_NonBlockingControl(uint32_t control,uint32_t arg)1797 static int32_t USART4_NonBlockingControl(uint32_t control, uint32_t arg)
1798 {
1799 int32_t result;
1800
1801 result = USART_NonBlockingControl(control, arg, &usart4_NonBlockingDriverState);
1802 if (ARM_DRIVER_OK != result)
1803 {
1804 return result;
1805 }
1806 #if defined(USART4_RX_BUFFER_ENABLE) && (USART4_RX_BUFFER_ENABLE == 1)
1807 /* Start receiving interrupts */
1808 usart4_NonBlockingDriverState.resource->base->FIFOINTENSET |=
1809 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
1810 #endif
1811 return ARM_DRIVER_OK;
1812 }
1813
USART4_NonBlockingGetStatus(void)1814 static ARM_USART_STATUS USART4_NonBlockingGetStatus(void)
1815 {
1816 return USART_NonBlockingGetStatus(&usart4_NonBlockingDriverState);
1817 }
1818
1819 #endif
1820
1821 ARM_DRIVER_USART Driver_USART4 = {
1822 USARTx_GetVersion, USARTx_GetCapabilities,
1823 #if RTE_USART4_DMA_EN
1824 USART4_DmaInitialize, USART4_DmaUninitialize, USART4_DmaPowerControl, USART4_DmaSend, USART4_DmaReceive,
1825 USART4_DmaTransfer, USART4_DmaGetTxCount, USART4_DmaGetRxCount, USART4_DmaControl, USART4_DmaGetStatus,
1826 #else
1827 USART4_NonBlockingInitialize,
1828 USART4_NonBlockingUninitialize,
1829 USART4_NonBlockingPowerControl,
1830 USART4_NonBlockingSend,
1831 USART4_NonBlockingReceive,
1832 USART4_NonBlockingTransfer,
1833 USART4_NonBlockingGetTxCount,
1834 USART4_NonBlockingGetRxCount,
1835 USART4_NonBlockingControl,
1836 USART4_NonBlockingGetStatus,
1837 #endif
1838 USARTx_SetModemControl, USARTx_GetModemStatus};
1839
1840 #endif /* usart4 */
1841
1842 #if defined(USART5) && defined(RTE_USART5) && RTE_USART5
1843
1844 /* User needs to provide the implementation for USART5_GetFreq/InitPins/DeinitPins
1845 in the application for enabling according instance. */
1846 extern uint32_t USART5_GetFreq(void);
1847
1848 static cmsis_usart_resource_t usart5_Resource = {USART5, USART5_GetFreq};
1849
1850 #if defined(RTE_USART5_DMA_EN) && RTE_USART5_DMA_EN
1851
1852 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
1853
1854 cmsis_usart_dma_resource_t usart5_DmaResource = {
1855 RTE_USART5_DMA_TX_DMA_BASE,
1856 RTE_USART5_DMA_TX_CH,
1857 RTE_USART5_DMA_RX_DMA_BASE,
1858 RTE_USART5_DMA_RX_CH,
1859 };
1860
1861 static usart_dma_handle_t USART5_DmaHandle;
1862 static dma_handle_t USART5_DmaRxHandle;
1863 static dma_handle_t USART5_DmaTxHandle;
1864
1865 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1866 ARMCC_SECTION("usart5_dma_driver_state")
1867 static cmsis_usart_dma_driver_state_t usart5_DmaDriverState = {
1868 #else
1869 static cmsis_usart_dma_driver_state_t usart5_DmaDriverState = {
1870 #endif
1871 &usart5_Resource, &usart5_DmaResource, &USART5_DmaHandle, &USART5_DmaRxHandle, &USART5_DmaTxHandle,
1872 };
1873
USART5_DmaInitialize(ARM_USART_SignalEvent_t cb_event)1874 static int32_t USART5_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
1875 {
1876 #ifdef RTE_USART5_PIN_INIT
1877 RTE_USART5_PIN_INIT();
1878 #endif
1879 return USART_DmaInitialize(cb_event, &usart5_DmaDriverState);
1880 }
1881
USART5_DmaUninitialize(void)1882 static int32_t USART5_DmaUninitialize(void)
1883 {
1884 #ifdef RTE_USART5_PIN_DEINIT
1885 RTE_USART5_PIN_DEINIT();
1886 #endif
1887 return USART_DmaUninitialize(&usart5_DmaDriverState);
1888 }
1889
USART5_DmaPowerControl(ARM_POWER_STATE state)1890 static int32_t USART5_DmaPowerControl(ARM_POWER_STATE state)
1891 {
1892 return USART_DmaPowerControl(state, &usart5_DmaDriverState);
1893 }
1894
USART5_DmaSend(const void * data,uint32_t num)1895 static int32_t USART5_DmaSend(const void *data, uint32_t num)
1896 {
1897 return USART_DmaSend(data, num, &usart5_DmaDriverState);
1898 }
1899
USART5_DmaReceive(void * data,uint32_t num)1900 static int32_t USART5_DmaReceive(void *data, uint32_t num)
1901 {
1902 return USART_DmaReceive(data, num, &usart5_DmaDriverState);
1903 }
1904
USART5_DmaTransfer(const void * data_out,void * data_in,uint32_t num)1905 static int32_t USART5_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
1906 {
1907 return USART_DmaTransfer(data_out, data_in, num, &usart5_DmaDriverState);
1908 }
1909
USART5_DmaGetTxCount(void)1910 static uint32_t USART5_DmaGetTxCount(void)
1911 {
1912 return USART_DmaGetTxCount(&usart5_DmaDriverState);
1913 }
1914
USART5_DmaGetRxCount(void)1915 static uint32_t USART5_DmaGetRxCount(void)
1916 {
1917 return USART_DmaGetRxCount(&usart5_DmaDriverState);
1918 }
1919
USART5_DmaControl(uint32_t control,uint32_t arg)1920 static int32_t USART5_DmaControl(uint32_t control, uint32_t arg)
1921 {
1922 return USART_DmaControl(control, arg, &usart5_DmaDriverState);
1923 }
1924
USART5_DmaGetStatus(void)1925 static ARM_USART_STATUS USART5_DmaGetStatus(void)
1926 {
1927 return USART_DmaGetStatus(&usart5_DmaDriverState);
1928 }
1929
1930 #endif
1931
1932 #else
1933
1934 static usart_handle_t USART5_Handle;
1935 #if defined(USART5_RX_BUFFER_ENABLE) && (USART5_RX_BUFFER_ENABLE == 1)
1936 static uint8_t usart5_rxRingBuffer[USART_RX_BUFFER_LEN];
1937 #endif
1938
1939 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1940 ARMCC_SECTION("usart5_non_blocking_driver_state")
1941 static cmsis_usart_non_blocking_driver_state_t usart5_NonBlockingDriverState = {
1942 #else
1943 static cmsis_usart_non_blocking_driver_state_t usart5_NonBlockingDriverState = {
1944 #endif
1945 &usart5_Resource,
1946 &USART5_Handle,
1947 };
1948
USART5_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)1949 static int32_t USART5_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
1950 {
1951 #ifdef RTE_USART5_PIN_INIT
1952 RTE_USART5_PIN_INIT();
1953 #endif
1954 return USART_NonBlockingInitialize(cb_event, &usart5_NonBlockingDriverState);
1955 }
1956
USART5_NonBlockingUninitialize(void)1957 static int32_t USART5_NonBlockingUninitialize(void)
1958 {
1959 #ifdef RTE_USART5_PIN_DEINIT
1960 RTE_USART5_PIN_DEINIT();
1961 #endif
1962 return USART_NonBlockingUninitialize(&usart5_NonBlockingDriverState);
1963 }
1964
USART5_NonBlockingPowerControl(ARM_POWER_STATE state)1965 static int32_t USART5_NonBlockingPowerControl(ARM_POWER_STATE state)
1966 {
1967 int32_t result;
1968
1969 result = USART_NonBlockingPowerControl(state, &usart5_NonBlockingDriverState);
1970 #if defined(USART5_RX_BUFFER_ENABLE) && (USART5_RX_BUFFER_ENABLE == 1)
1971 if ((state == ARM_POWER_FULL) && (usart5_NonBlockingDriverState.handle->rxRingBuffer == NULL))
1972 {
1973 USART_TransferStartRingBuffer(usart5_NonBlockingDriverState.resource->base,
1974 usart5_NonBlockingDriverState.handle, usart5_rxRingBuffer, USART_RX_BUFFER_LEN);
1975 }
1976 #endif
1977 return result;
1978 }
1979
USART5_NonBlockingSend(const void * data,uint32_t num)1980 static int32_t USART5_NonBlockingSend(const void *data, uint32_t num)
1981 {
1982 return USART_NonBlockingSend(data, num, &usart5_NonBlockingDriverState);
1983 }
1984
USART5_NonBlockingReceive(void * data,uint32_t num)1985 static int32_t USART5_NonBlockingReceive(void *data, uint32_t num)
1986 {
1987 return USART_NonBlockingReceive(data, num, &usart5_NonBlockingDriverState);
1988 }
1989
USART5_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)1990 static int32_t USART5_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
1991 {
1992 return USART_NonBlockingTransfer(data_out, data_in, num, &usart5_NonBlockingDriverState);
1993 }
1994
USART5_NonBlockingGetTxCount(void)1995 static uint32_t USART5_NonBlockingGetTxCount(void)
1996 {
1997 return USART_NonBlockingGetTxCount(&usart5_NonBlockingDriverState);
1998 }
1999
USART5_NonBlockingGetRxCount(void)2000 static uint32_t USART5_NonBlockingGetRxCount(void)
2001 {
2002 return USART_NonBlockingGetRxCount(&usart5_NonBlockingDriverState);
2003 }
2004
USART5_NonBlockingControl(uint32_t control,uint32_t arg)2005 static int32_t USART5_NonBlockingControl(uint32_t control, uint32_t arg)
2006 {
2007 int32_t result;
2008
2009 result = USART_NonBlockingControl(control, arg, &usart5_NonBlockingDriverState);
2010 if (ARM_DRIVER_OK != result)
2011 {
2012 return result;
2013 }
2014 #if defined(USART5_RX_BUFFER_ENABLE) && (USART5_RX_BUFFER_ENABLE == 1)
2015 /* Start receiving interrupts */
2016 usart5_NonBlockingDriverState.resource->base->FIFOINTENSET |=
2017 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
2018 #endif
2019 return ARM_DRIVER_OK;
2020 }
2021
USART5_NonBlockingGetStatus(void)2022 static ARM_USART_STATUS USART5_NonBlockingGetStatus(void)
2023 {
2024 return USART_NonBlockingGetStatus(&usart5_NonBlockingDriverState);
2025 }
2026
2027 #endif
2028
2029 ARM_DRIVER_USART Driver_USART5 = {
2030 USARTx_GetVersion, USARTx_GetCapabilities,
2031 #if RTE_USART5_DMA_EN
2032 USART5_DmaInitialize, USART5_DmaUninitialize, USART5_DmaPowerControl, USART5_DmaSend, USART5_DmaReceive,
2033 USART5_DmaTransfer, USART5_DmaGetTxCount, USART5_DmaGetRxCount, USART5_DmaControl, USART5_DmaGetStatus,
2034 #else
2035 USART5_NonBlockingInitialize,
2036 USART5_NonBlockingUninitialize,
2037 USART5_NonBlockingPowerControl,
2038 USART5_NonBlockingSend,
2039 USART5_NonBlockingReceive,
2040 USART5_NonBlockingTransfer,
2041 USART5_NonBlockingGetTxCount,
2042 USART5_NonBlockingGetRxCount,
2043 USART5_NonBlockingControl,
2044 USART5_NonBlockingGetStatus,
2045 #endif
2046 USARTx_SetModemControl, USARTx_GetModemStatus};
2047
2048 #endif /* usart5 */
2049
2050 #if defined(USART6) && defined(RTE_USART6) && RTE_USART6
2051
2052 /* User needs to provide the implementation for USART6_GetFreq/InitPins/DeinitPins
2053 in the application for enabling according instance. */
2054 extern uint32_t USART6_GetFreq(void);
2055
2056 static cmsis_usart_resource_t usart6_Resource = {USART6, USART6_GetFreq};
2057
2058 #if defined(RTE_USART6_DMA_EN) && RTE_USART6_DMA_EN
2059
2060 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
2061
2062 cmsis_usart_dma_resource_t usart6_DmaResource = {
2063 RTE_USART6_DMA_TX_DMA_BASE,
2064 RTE_USART6_DMA_TX_CH,
2065 RTE_USART6_DMA_RX_DMA_BASE,
2066 RTE_USART6_DMA_RX_CH,
2067 };
2068
2069 static usart_dma_handle_t USART6_DmaHandle;
2070 static dma_handle_t USART6_DmaRxHandle;
2071 static dma_handle_t USART6_DmaTxHandle;
2072
2073 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2074 ARMCC_SECTION("usart6_dma_driver_state")
2075 static cmsis_usart_dma_driver_state_t usart6_DmaDriverState = {
2076 #else
2077 static cmsis_usart_dma_driver_state_t usart6_DmaDriverState = {
2078 #endif
2079 &usart6_Resource, &usart6_DmaResource, &USART6_DmaHandle, &USART6_DmaRxHandle, &USART6_DmaTxHandle,
2080 };
2081
USART6_DmaInitialize(ARM_USART_SignalEvent_t cb_event)2082 static int32_t USART6_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
2083 {
2084 #ifdef RTE_USART6_PIN_INIT
2085 RTE_USART6_PIN_INIT();
2086 #endif
2087 return USART_DmaInitialize(cb_event, &usart6_DmaDriverState);
2088 }
2089
USART6_DmaUninitialize(void)2090 static int32_t USART6_DmaUninitialize(void)
2091 {
2092 #ifdef RTE_USART6_PIN_DEINIT
2093 RTE_USART6_PIN_DEINIT();
2094 #endif
2095 return USART_DmaUninitialize(&usart6_DmaDriverState);
2096 }
2097
USART6_DmaPowerControl(ARM_POWER_STATE state)2098 static int32_t USART6_DmaPowerControl(ARM_POWER_STATE state)
2099 {
2100 return USART_DmaPowerControl(state, &usart6_DmaDriverState);
2101 }
2102
USART6_DmaSend(const void * data,uint32_t num)2103 static int32_t USART6_DmaSend(const void *data, uint32_t num)
2104 {
2105 return USART_DmaSend(data, num, &usart6_DmaDriverState);
2106 }
2107
USART6_DmaReceive(void * data,uint32_t num)2108 static int32_t USART6_DmaReceive(void *data, uint32_t num)
2109 {
2110 return USART_DmaReceive(data, num, &usart6_DmaDriverState);
2111 }
2112
USART6_DmaTransfer(const void * data_out,void * data_in,uint32_t num)2113 static int32_t USART6_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
2114 {
2115 return USART_DmaTransfer(data_out, data_in, num, &usart6_DmaDriverState);
2116 }
2117
USART6_DmaGetTxCount(void)2118 static uint32_t USART6_DmaGetTxCount(void)
2119 {
2120 return USART_DmaGetTxCount(&usart6_DmaDriverState);
2121 }
2122
USART6_DmaGetRxCount(void)2123 static uint32_t USART6_DmaGetRxCount(void)
2124 {
2125 return USART_DmaGetRxCount(&usart6_DmaDriverState);
2126 }
2127
USART6_DmaControl(uint32_t control,uint32_t arg)2128 static int32_t USART6_DmaControl(uint32_t control, uint32_t arg)
2129 {
2130 return USART_DmaControl(control, arg, &usart6_DmaDriverState);
2131 }
2132
USART6_DmaGetStatus(void)2133 static ARM_USART_STATUS USART6_DmaGetStatus(void)
2134 {
2135 return USART_DmaGetStatus(&usart6_DmaDriverState);
2136 }
2137
2138 #endif
2139
2140 #else
2141
2142 static usart_handle_t USART6_Handle;
2143 #if defined(USART6_RX_BUFFER_ENABLE) && (USART6_RX_BUFFER_ENABLE == 1)
2144 static uint8_t usart6_rxRingBuffer[USART_RX_BUFFER_LEN];
2145 #endif
2146
2147 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2148 ARMCC_SECTION("usart6_non_blocking_driver_state")
2149 static cmsis_usart_non_blocking_driver_state_t usart6_NonBlockingDriverState = {
2150 #else
2151 static cmsis_usart_non_blocking_driver_state_t usart6_NonBlockingDriverState = {
2152 #endif
2153 &usart6_Resource,
2154 &USART6_Handle,
2155 };
2156
USART6_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)2157 static int32_t USART6_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
2158 {
2159 #ifdef RTE_USART6_PIN_INIT
2160 RTE_USART6_PIN_INIT();
2161 #endif
2162 return USART_NonBlockingInitialize(cb_event, &usart6_NonBlockingDriverState);
2163 }
2164
USART6_NonBlockingUninitialize(void)2165 static int32_t USART6_NonBlockingUninitialize(void)
2166 {
2167 #ifdef RTE_USART6_PIN_DEINIT
2168 RTE_USART6_PIN_DEINIT();
2169 #endif
2170 return USART_NonBlockingUninitialize(&usart6_NonBlockingDriverState);
2171 }
2172
USART6_NonBlockingPowerControl(ARM_POWER_STATE state)2173 static int32_t USART6_NonBlockingPowerControl(ARM_POWER_STATE state)
2174 {
2175 uint32_t result;
2176
2177 result = USART_NonBlockingPowerControl(state, &usart6_NonBlockingDriverState);
2178 #if defined(USART6_RX_BUFFER_ENABLE) && (USART6_RX_BUFFER_ENABLE == 1)
2179 if ((state == ARM_POWER_FULL) && (usart6_NonBlockingDriverState.handle->rxRingBuffer == NULL))
2180 {
2181 USART_TransferStartRingBuffer(usart6_NonBlockingDriverState.resource->base,
2182 usart6_NonBlockingDriverState.handle, usart6_rxRingBuffer, USART_RX_BUFFER_LEN);
2183 }
2184 #endif
2185 return result;
2186 }
2187
USART6_NonBlockingSend(const void * data,uint32_t num)2188 static int32_t USART6_NonBlockingSend(const void *data, uint32_t num)
2189 {
2190 return USART_NonBlockingSend(data, num, &usart6_NonBlockingDriverState);
2191 }
2192
USART6_NonBlockingReceive(void * data,uint32_t num)2193 static int32_t USART6_NonBlockingReceive(void *data, uint32_t num)
2194 {
2195 return USART_NonBlockingReceive(data, num, &usart6_NonBlockingDriverState);
2196 }
2197
USART6_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)2198 static int32_t USART6_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
2199 {
2200 return USART_NonBlockingTransfer(data_out, data_in, num, &usart6_NonBlockingDriverState);
2201 }
2202
USART6_NonBlockingGetTxCount(void)2203 static uint32_t USART6_NonBlockingGetTxCount(void)
2204 {
2205 return USART_NonBlockingGetTxCount(&usart6_NonBlockingDriverState);
2206 }
2207
USART6_NonBlockingGetRxCount(void)2208 static uint32_t USART6_NonBlockingGetRxCount(void)
2209 {
2210 return USART_NonBlockingGetRxCount(&usart6_NonBlockingDriverState);
2211 }
2212
USART6_NonBlockingControl(uint32_t control,uint32_t arg)2213 static int32_t USART6_NonBlockingControl(uint32_t control, uint32_t arg)
2214 {
2215 int32_t result;
2216
2217 result = USART_NonBlockingControl(control, arg, &usart6_NonBlockingDriverState);
2218 if (ARM_DRIVER_OK != result)
2219 {
2220 return result;
2221 }
2222 #if defined(USART6_RX_BUFFER_ENABLE) && (USART6_RX_BUFFER_ENABLE == 1)
2223 /* Start receiving interrupts */
2224 usart6_NonBlockingDriverState.resource->base->FIFOINTENSET |=
2225 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
2226 #endif
2227 return ARM_DRIVER_OK;
2228 }
2229
USART6_NonBlockingGetStatus(void)2230 static ARM_USART_STATUS USART6_NonBlockingGetStatus(void)
2231 {
2232 return USART_NonBlockingGetStatus(&usart6_NonBlockingDriverState);
2233 }
2234
2235 #endif
2236
2237 ARM_DRIVER_USART Driver_USART6 = {
2238 USARTx_GetVersion, USARTx_GetCapabilities,
2239 #if RTE_USART6_DMA_EN
2240 USART6_DmaInitialize, USART6_DmaUninitialize, USART6_DmaPowerControl, USART6_DmaSend, USART6_DmaReceive,
2241 USART6_DmaTransfer, USART6_DmaGetTxCount, USART6_DmaGetRxCount, USART6_DmaControl, USART6_DmaGetStatus,
2242 #else
2243 USART6_NonBlockingInitialize,
2244 USART6_NonBlockingUninitialize,
2245 USART6_NonBlockingPowerControl,
2246 USART6_NonBlockingSend,
2247 USART6_NonBlockingReceive,
2248 USART6_NonBlockingTransfer,
2249 USART6_NonBlockingGetTxCount,
2250 USART6_NonBlockingGetRxCount,
2251 USART6_NonBlockingControl,
2252 USART6_NonBlockingGetStatus,
2253 #endif
2254 USARTx_SetModemControl, USARTx_GetModemStatus};
2255
2256 #endif /* usart6 */
2257
2258 #if defined(USART7) && defined(RTE_USART7) && RTE_USART7
2259
2260 /* User needs to provide the implementation for USART7_GetFreq/InitPins/DeinitPins
2261 in the application for enabling according instance. */
2262 extern uint32_t USART7_GetFreq(void);
2263
2264 static cmsis_usart_resource_t usart7_Resource = {USART7, USART7_GetFreq};
2265
2266 #if defined(RTE_USART7_DMA_EN) && RTE_USART7_DMA_EN
2267
2268 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
2269
2270 cmsis_usart_dma_resource_t usart7_DmaResource = {
2271 RTE_USART7_DMA_TX_DMA_BASE,
2272 RTE_USART7_DMA_TX_CH,
2273 RTE_USART7_DMA_RX_DMA_BASE,
2274 RTE_USART7_DMA_RX_CH,
2275 };
2276
2277 static usart_dma_handle_t USART7_DmaHandle;
2278 static dma_handle_t USART7_DmaRxHandle;
2279 static dma_handle_t USART7_DmaTxHandle;
2280
2281 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2282 ARMCC_SECTION("usart7_dma_driver_state")
2283 static cmsis_usart_dma_driver_state_t usart7_DmaDriverState = {
2284 #else
2285 static cmsis_usart_dma_driver_state_t usart7_DmaDriverState = {
2286 #endif
2287 &usart7_Resource, &usart7_DmaResource, &USART7_DmaHandle, &USART7_DmaRxHandle, &USART7_DmaTxHandle,
2288 };
2289
USART7_DmaInitialize(ARM_USART_SignalEvent_t cb_event)2290 static int32_t USART7_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
2291 {
2292 #ifdef RTE_USART7_PIN_INIT
2293 RTE_USART7_PIN_INIT();
2294 #endif
2295 return USART_DmaInitialize(cb_event, &usart7_DmaDriverState);
2296 }
2297
USART7_DmaUninitialize(void)2298 static int32_t USART7_DmaUninitialize(void)
2299 {
2300 #ifdef RTE_USART7_PIN_DEINIT
2301 RTE_USART7_PIN_DEINIT();
2302 #endif
2303 return USART_DmaUninitialize(&usart7_DmaDriverState);
2304 }
2305
USART7_DmaPowerControl(ARM_POWER_STATE state)2306 static int32_t USART7_DmaPowerControl(ARM_POWER_STATE state)
2307 {
2308 return USART_DmaPowerControl(state, &usart7_DmaDriverState);
2309 }
2310
USART7_DmaSend(const void * data,uint32_t num)2311 static int32_t USART7_DmaSend(const void *data, uint32_t num)
2312 {
2313 return USART_DmaSend(data, num, &usart7_DmaDriverState);
2314 }
2315
USART7_DmaReceive(void * data,uint32_t num)2316 static int32_t USART7_DmaReceive(void *data, uint32_t num)
2317 {
2318 return USART_DmaReceive(data, num, &usart7_DmaDriverState);
2319 }
2320
USART7_DmaTransfer(const void * data_out,void * data_in,uint32_t num)2321 static int32_t USART7_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
2322 {
2323 return USART_DmaTransfer(data_out, data_in, num, &usart7_DmaDriverState);
2324 }
2325
USART7_DmaGetTxCount(void)2326 static uint32_t USART7_DmaGetTxCount(void)
2327 {
2328 return USART_DmaGetTxCount(&usart7_DmaDriverState);
2329 }
2330
USART7_DmaGetRxCount(void)2331 static uint32_t USART7_DmaGetRxCount(void)
2332 {
2333 return USART_DmaGetRxCount(&usart7_DmaDriverState);
2334 }
2335
USART7_DmaControl(uint32_t control,uint32_t arg)2336 static int32_t USART7_DmaControl(uint32_t control, uint32_t arg)
2337 {
2338 return USART_DmaControl(control, arg, &usart7_DmaDriverState);
2339 }
2340
USART7_DmaGetStatus(void)2341 static ARM_USART_STATUS USART7_DmaGetStatus(void)
2342 {
2343 return USART_DmaGetStatus(&usart7_DmaDriverState);
2344 }
2345
2346 #endif
2347
2348 #else
2349
2350 static usart_handle_t USART7_Handle;
2351 #if defined(USART7_RX_BUFFER_ENABLE) && (USART7_RX_BUFFER_ENABLE == 1)
2352 static uint8_t usart7_rxRingBuffer[USART_RX_BUFFER_LEN];
2353 #endif
2354
2355 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2356 ARMCC_SECTION("usart7_non_blocking_driver_state")
2357 static cmsis_usart_non_blocking_driver_state_t usart7_NonBlockingDriverState = {
2358 #else
2359 static cmsis_usart_non_blocking_driver_state_t usart7_NonBlockingDriverState = {
2360 #endif
2361 &usart7_Resource,
2362 &USART7_Handle,
2363 };
2364
USART7_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)2365 static int32_t USART7_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
2366 {
2367 #ifdef RTE_USART7_PIN_INIT
2368 RTE_USART7_PIN_INIT();
2369 #endif
2370 return USART_NonBlockingInitialize(cb_event, &usart7_NonBlockingDriverState);
2371 }
2372
USART7_NonBlockingUninitialize(void)2373 static int32_t USART7_NonBlockingUninitialize(void)
2374 {
2375 #ifdef RTE_USART7_PIN_DEINIT
2376 RTE_USART7_PIN_DEINIT();
2377 #endif
2378 return USART_NonBlockingUninitialize(&usart7_NonBlockingDriverState);
2379 }
2380
USART7_NonBlockingPowerControl(ARM_POWER_STATE state)2381 static int32_t USART7_NonBlockingPowerControl(ARM_POWER_STATE state)
2382 {
2383 uint32_t result;
2384
2385 result = USART_NonBlockingPowerControl(state, &usart7_NonBlockingDriverState);
2386 #if defined(USART7_RX_BUFFER_ENABLE) && (USART7_RX_BUFFER_ENABLE == 1)
2387 if ((state == ARM_POWER_FULL) && (usart7_NonBlockingDriverState.handle->rxRingBuffer == NULL))
2388 {
2389 USART_TransferStartRingBuffer(usart7_NonBlockingDriverState.resource->base,
2390 usart7_NonBlockingDriverState.handle, usart7_rxRingBuffer, USART_RX_BUFFER_LEN);
2391 }
2392 #endif
2393 return result;
2394 }
2395
USART7_NonBlockingSend(const void * data,uint32_t num)2396 static int32_t USART7_NonBlockingSend(const void *data, uint32_t num)
2397 {
2398 return USART_NonBlockingSend(data, num, &usart7_NonBlockingDriverState);
2399 }
2400
USART7_NonBlockingReceive(void * data,uint32_t num)2401 static int32_t USART7_NonBlockingReceive(void *data, uint32_t num)
2402 {
2403 return USART_NonBlockingReceive(data, num, &usart7_NonBlockingDriverState);
2404 }
2405
USART7_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)2406 static int32_t USART7_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
2407 {
2408 return USART_NonBlockingTransfer(data_out, data_in, num, &usart7_NonBlockingDriverState);
2409 }
2410
USART7_NonBlockingGetTxCount(void)2411 static uint32_t USART7_NonBlockingGetTxCount(void)
2412 {
2413 return USART_NonBlockingGetTxCount(&usart7_NonBlockingDriverState);
2414 }
2415
USART7_NonBlockingGetRxCount(void)2416 static uint32_t USART7_NonBlockingGetRxCount(void)
2417 {
2418 return USART_NonBlockingGetRxCount(&usart7_NonBlockingDriverState);
2419 }
2420
USART7_NonBlockingControl(uint32_t control,uint32_t arg)2421 static int32_t USART7_NonBlockingControl(uint32_t control, uint32_t arg)
2422 {
2423 int32_t result;
2424
2425 result = USART_NonBlockingControl(control, arg, &usart7_NonBlockingDriverState);
2426 if (ARM_DRIVER_OK != result)
2427 {
2428 return result;
2429 }
2430 #if defined(USART7_RX_BUFFER_ENABLE) && (USART7_RX_BUFFER_ENABLE == 1)
2431 /* Start receiving interrupts */
2432 usart7_NonBlockingDriverState.resource->base->FIFOINTENSET |=
2433 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
2434 #endif
2435 return ARM_DRIVER_OK;
2436 }
2437
USART7_NonBlockingGetStatus(void)2438 static ARM_USART_STATUS USART7_NonBlockingGetStatus(void)
2439 {
2440 return USART_NonBlockingGetStatus(&usart7_NonBlockingDriverState);
2441 }
2442
2443 #endif
2444
2445 ARM_DRIVER_USART Driver_USART7 = {
2446 USARTx_GetVersion, USARTx_GetCapabilities,
2447 #if RTE_USART7_DMA_EN
2448 USART7_DmaInitialize, USART7_DmaUninitialize, USART7_DmaPowerControl, USART7_DmaSend, USART7_DmaReceive,
2449 USART7_DmaTransfer, USART7_DmaGetTxCount, USART7_DmaGetRxCount, USART7_DmaControl, USART7_DmaGetStatus,
2450 #else
2451 USART7_NonBlockingInitialize,
2452 USART7_NonBlockingUninitialize,
2453 USART7_NonBlockingPowerControl,
2454 USART7_NonBlockingSend,
2455 USART7_NonBlockingReceive,
2456 USART7_NonBlockingTransfer,
2457 USART7_NonBlockingGetTxCount,
2458 USART7_NonBlockingGetRxCount,
2459 USART7_NonBlockingControl,
2460 USART7_NonBlockingGetStatus,
2461 #endif
2462 USARTx_SetModemControl, USARTx_GetModemStatus};
2463
2464 #endif /* usart7 */
2465
2466 #if defined(USART8) && defined(RTE_USART8) && RTE_USART8
2467
2468 /* User needs to provide the implementation for USART8_GetFreq/InitPins/DeinitPins
2469 in the application for enabling according instance. */
2470 extern uint32_t USART8_GetFreq(void);
2471
2472 static cmsis_usart_resource_t usart8_Resource = {USART8, USART8_GetFreq};
2473
2474 #if defined(RTE_USART8_DMA_EN) RTE_USART8_DMA_EN
2475
2476 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
2477
2478 cmsis_usart_dma_resource_t usart8_DmaResource = {
2479 RTE_USART8_DMA_TX_DMA_BASE,
2480 RTE_USART8_DMA_TX_CH,
2481 RTE_USART8_DMA_RX_DMA_BASE,
2482 RTE_USART8_DMA_RX_CH,
2483 };
2484
2485 static usart_dma_handle_t USART8_DmaHandle;
2486 static dma_handle_t USART8_DmaRxHandle;
2487 static dma_handle_t USART8_DmaTxHandle;
2488
2489 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2490 ARMCC_SECTION("usart8_dma_driver_state")
2491 static cmsis_usart_dma_driver_state_t usart8_DmaDriverState = {
2492 #else
2493 static cmsis_usart_dma_driver_state_t usart8_DmaDriverState = {
2494 #endif
2495 &usart8_Resource, &usart8_DmaResource, &USART8_DmaHandle, &USART8_DmaRxHandle, &USART8_DmaTxHandle,
2496 };
2497
USART8_DmaInitialize(ARM_USART_SignalEvent_t cb_event)2498 static int32_t USART8_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
2499 {
2500 #ifdef RTE_USART8_PIN_INIT
2501 RTE_USART8_PIN_INIT();
2502 #endif
2503 return USART_DmaInitialize(cb_event, &usart8_DmaDriverState);
2504 }
2505
USART8_DmaUninitialize(void)2506 static int32_t USART8_DmaUninitialize(void)
2507 {
2508 #ifdef RTE_USART8_PIN_DEINIT
2509 RTE_USART8_PIN_DEINIT();
2510 #endif
2511 return USART_DmaUninitialize(&usart8_DmaDriverState);
2512 }
2513
USART8_DmaPowerControl(ARM_POWER_STATE state)2514 static int32_t USART8_DmaPowerControl(ARM_POWER_STATE state)
2515 {
2516 return USART_DmaPowerControl(state, &usart8_DmaDriverState);
2517 }
2518
USART8_DmaSend(const void * data,uint32_t num)2519 static int32_t USART8_DmaSend(const void *data, uint32_t num)
2520 {
2521 return USART_DmaSend(data, num, &usart8_DmaDriverState);
2522 }
2523
USART8_DmaReceive(void * data,uint32_t num)2524 static int32_t USART8_DmaReceive(void *data, uint32_t num)
2525 {
2526 return USART_DmaReceive(data, num, &usart8_DmaDriverState);
2527 }
2528
USART8_DmaTransfer(const void * data_out,void * data_in,uint32_t num)2529 static int32_t USART8_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
2530 {
2531 return USART_DmaTransfer(data_out, data_in, num, &usart8_DmaDriverState);
2532 }
2533
USART8_DmaGetTxCount(void)2534 static uint32_t USART8_DmaGetTxCount(void)
2535 {
2536 return USART_DmaGetTxCount(&usart8_DmaDriverState);
2537 }
2538
USART8_DmaGetRxCount(void)2539 static uint32_t USART8_DmaGetRxCount(void)
2540 {
2541 return USART_DmaGetRxCount(&usart8_DmaDriverState);
2542 }
2543
USART8_DmaControl(uint32_t control,uint32_t arg)2544 static int32_t USART8_DmaControl(uint32_t control, uint32_t arg)
2545 {
2546 return USART_DmaControl(control, arg, &usart8_DmaDriverState);
2547 }
2548
USART8_DmaGetStatus(void)2549 static ARM_USART_STATUS USART8_DmaGetStatus(void)
2550 {
2551 return USART_DmaGetStatus(&usart8_DmaDriverState);
2552 }
2553
2554 #endif
2555
2556 #else
2557
2558 static usart_handle_t USART8_Handle;
2559 #if defined(USART8_RX_BUFFER_ENABLE) && (USART8_RX_BUFFER_ENABLE == 1)
2560 static uint8_t usart8_rxRingBuffer[USART_RX_BUFFER_LEN];
2561 #endif
2562
2563 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2564 ARMCC_SECTION("usart8_non_blocking_driver_state")
2565 static cmsis_usart_non_blocking_driver_state_t usart8_NonBlockingDriverState = {
2566 #else
2567 static cmsis_usart_non_blocking_driver_state_t usart8_NonBlockingDriverState = {
2568 #endif
2569 &usart8_Resource,
2570 &USART8_Handle,
2571 };
2572
USART8_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)2573 static int32_t USART8_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
2574 {
2575 #ifdef RTE_USART8_PIN_INIT
2576 RTE_USART8_PIN_INIT();
2577 #endif
2578 return USART_NonBlockingInitialize(cb_event, &usart8_NonBlockingDriverState);
2579 }
2580
USART8_NonBlockingUninitialize(void)2581 static int32_t USART8_NonBlockingUninitialize(void)
2582 {
2583 #ifdef RTE_USART8_PIN_DEINIT
2584 RTE_USART8_PIN_DEINIT();
2585 #endif
2586 return USART_NonBlockingUninitialize(&usart8_NonBlockingDriverState);
2587 }
2588
USART8_NonBlockingPowerControl(ARM_POWER_STATE state)2589 static int32_t USART8_NonBlockingPowerControl(ARM_POWER_STATE state)
2590 {
2591 uint32_t result;
2592
2593 result = USART_NonBlockingPowerControl(state, &usart8_NonBlockingDriverState);
2594 #if defined(USART8_RX_BUFFER_ENABLE) && (USART8_RX_BUFFER_ENABLE == 1)
2595 if ((state == ARM_POWER_FULL) && (usart8_NonBlockingDriverState.handle->rxRingBuffer == NULL))
2596 {
2597 USART_TransferStartRingBuffer(usart8_NonBlockingDriverState.resource->base,
2598 usart8_NonBlockingDriverState.handle, usart8_rxRingBuffer, USART_RX_BUFFER_LEN);
2599 }
2600 #endif
2601
2602 return result;
2603 }
2604
USART8_NonBlockingSend(const void * data,uint32_t num)2605 static int32_t USART8_NonBlockingSend(const void *data, uint32_t num)
2606 {
2607 return USART_NonBlockingSend(data, num, &usart8_NonBlockingDriverState);
2608 }
2609
USART8_NonBlockingReceive(void * data,uint32_t num)2610 static int32_t USART8_NonBlockingReceive(void *data, uint32_t num)
2611 {
2612 return USART_NonBlockingReceive(data, num, &usart8_NonBlockingDriverState);
2613 }
2614
USART8_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)2615 static int32_t USART8_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
2616 {
2617 return USART_NonBlockingTransfer(data_out, data_in, num, &usart8_NonBlockingDriverState);
2618 }
2619
USART8_NonBlockingGetTxCount(void)2620 static uint32_t USART8_NonBlockingGetTxCount(void)
2621 {
2622 return USART_NonBlockingGetTxCount(&usart8_NonBlockingDriverState);
2623 }
2624
USART8_NonBlockingGetRxCount(void)2625 static uint32_t USART8_NonBlockingGetRxCount(void)
2626 {
2627 return USART_NonBlockingGetRxCount(&usart8_NonBlockingDriverState);
2628 }
2629
USART8_NonBlockingControl(uint32_t control,uint32_t arg)2630 static int32_t USART8_NonBlockingControl(uint32_t control, uint32_t arg)
2631 {
2632 int32_t result;
2633
2634 result = USART_NonBlockingControl(control, arg, &usart8_NonBlockingDriverState);
2635 if (ARM_DRIVER_OK != result)
2636 {
2637 return result;
2638 }
2639 #if defined(USART8_RX_BUFFER_ENABLE) && (USART8_RX_BUFFER_ENABLE == 1)
2640 /* Start receiving interrupts */
2641 usart8_NonBlockingDriverState.resource->base->FIFOINTENSET |=
2642 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
2643 #endif
2644 return ARM_DRIVER_OK;
2645 }
2646
USART8_NonBlockingGetStatus(void)2647 static ARM_USART_STATUS USART8_NonBlockingGetStatus(void)
2648 {
2649 return USART_NonBlockingGetStatus(&usart8_NonBlockingDriverState);
2650 }
2651
2652 #endif
2653
2654 /* usart8 Driver Control Block */
2655 ARM_DRIVER_USART Driver_USART8 = {
2656 USARTx_GetVersion, USARTx_GetCapabilities,
2657 #if RTE_USART8_DMA_EN
2658 USART8_DmaInitialize, USART8_DmaUninitialize, USART8_DmaPowerControl, USART8_DmaSend, USART8_DmaReceive,
2659 USART8_DmaTransfer, USART8_DmaGetTxCount, USART8_DmaGetRxCount, USART8_DmaControl, USART8_DmaGetStatus,
2660 #else
2661 USART8_NonBlockingInitialize,
2662 USART8_NonBlockingUninitialize,
2663 USART8_NonBlockingPowerControl,
2664 USART8_NonBlockingSend,
2665 USART8_NonBlockingReceive,
2666 USART8_NonBlockingTransfer,
2667 USART8_NonBlockingGetTxCount,
2668 USART8_NonBlockingGetRxCount,
2669 USART8_NonBlockingControl,
2670 USART8_NonBlockingGetStatus,
2671 #endif
2672 USARTx_SetModemControl, USARTx_GetModemStatus};
2673
2674 #endif /* usart8 */
2675
2676 #if defined(USART9) && defined(RTE_USART9) && RTE_USART9
2677
2678 /* User needs to provide the implementation for USART9_GetFreq/InitPins/DeinitPins
2679 in the application for enabling according instance. */
2680 extern uint32_t USART9_GetFreq(void);
2681
2682 static cmsis_usart_resource_t usart9_Resource = {USART9, USART9_GetFreq};
2683
2684 #if defined(RTE_USART9_DMA_EN) && RTE_USART9_DMA_EN
2685
2686 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
2687
2688 cmsis_usart_dma_resource_t usart9_DmaResource = {
2689 RTE_USART9_DMA_TX_DMA_BASE,
2690 RTE_USART9_DMA_TX_CH,
2691 RTE_USART9_DMA_RX_DMA_BASE,
2692 RTE_USART9_DMA_RX_CH,
2693 };
2694
2695 static usart_dma_handle_t USART9_DmaHandle;
2696 static dma_handle_t USART9_DmaRxHandle;
2697 static dma_handle_t USART9_DmaTxHandle;
2698
2699 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2700 ARMCC_SECTION("usart9_dma_driver_state")
2701 static cmsis_usart_dma_driver_state_t usart9_DmaDriverState = {
2702 #else
2703 static cmsis_usart_dma_driver_state_t usart9_DmaDriverState = {
2704 #endif
2705 &usart9_Resource, &usart9_DmaResource, &USART9_DmaHandle, &USART9_DmaRxHandle, &USART9_DmaTxHandle,
2706 };
2707
USART9_DmaInitialize(ARM_USART_SignalEvent_t cb_event)2708 static int32_t USART9_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
2709 {
2710 #ifdef RTE_USART9_PIN_INIT
2711 RTE_USART9_PIN_INIT();
2712 #endif
2713 return USART_DmaInitialize(cb_event, &usart9_DmaDriverState);
2714 }
2715
USART9_DmaUninitialize(void)2716 static int32_t USART9_DmaUninitialize(void)
2717 {
2718 #ifdef RTE_USART9_PIN_DEINIT
2719 RTE_USART9_PIN_DEINIT();
2720 #endif
2721 return USART_DmaUninitialize(&usart9_DmaDriverState);
2722 }
2723
USART9_DmaPowerControl(ARM_POWER_STATE state)2724 static int32_t USART9_DmaPowerControl(ARM_POWER_STATE state)
2725 {
2726 return USART_DmaPowerControl(state, &usart9_DmaDriverState);
2727 }
2728
USART9_DmaSend(const void * data,uint32_t num)2729 static int32_t USART9_DmaSend(const void *data, uint32_t num)
2730 {
2731 return USART_DmaSend(data, num, &usart9_DmaDriverState);
2732 }
2733
USART9_DmaReceive(void * data,uint32_t num)2734 static int32_t USART9_DmaReceive(void *data, uint32_t num)
2735 {
2736 return USART_DmaReceive(data, num, &usart9_DmaDriverState);
2737 }
2738
USART9_DmaTransfer(const void * data_out,void * data_in,uint32_t num)2739 static int32_t USART9_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
2740 {
2741 return USART_DmaTransfer(data_out, data_in, num, &usart9_DmaDriverState);
2742 }
2743
USART9_DmaGetTxCount(void)2744 static uint32_t USART9_DmaGetTxCount(void)
2745 {
2746 return USART_DmaGetTxCount(&usart9_DmaDriverState);
2747 }
2748
USART9_DmaGetRxCount(void)2749 static uint32_t USART9_DmaGetRxCount(void)
2750 {
2751 return USART_DmaGetRxCount(&usart9_DmaDriverState);
2752 }
2753
USART9_DmaControl(uint32_t control,uint32_t arg)2754 static int32_t USART9_DmaControl(uint32_t control, uint32_t arg)
2755 {
2756 return USART_DmaControl(control, arg, &usart9_DmaDriverState);
2757 }
2758
USART9_DmaGetStatus(void)2759 static ARM_USART_STATUS USART9_DmaGetStatus(void)
2760 {
2761 return USART_DmaGetStatus(&usart9_DmaDriverState);
2762 }
2763
2764 #endif
2765
2766 #else
2767
2768 static usart_handle_t USART9_Handle;
2769 #if defined(USART9_RX_BUFFER_ENABLE) && (USART9_RX_BUFFER_ENABLE == 1)
2770 static uint8_t usart9_rxRingBuffer[USART_RX_BUFFER_LEN];
2771 #endif
2772
2773 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2774 ARMCC_SECTION("usart9_non_blocking_driver_state")
2775 static cmsis_usart_non_blocking_driver_state_t usart9_NonBlockingDriverState = {
2776 #else
2777 static cmsis_usart_non_blocking_driver_state_t usart9_NonBlockingDriverState = {
2778 #endif
2779 &usart9_Resource,
2780 &USART9_Handle,
2781 };
2782
USART9_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)2783 static int32_t USART9_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
2784 {
2785 #ifdef RTE_USART9_PIN_INIT
2786 RTE_USART9_PIN_INIT();
2787 #endif
2788 return USART_NonBlockingInitialize(cb_event, &usart9_NonBlockingDriverState);
2789 }
2790
USART9_NonBlockingUninitialize(void)2791 static int32_t USART9_NonBlockingUninitialize(void)
2792 {
2793 #ifdef RTE_USART9_PIN_DEINIT
2794 RTE_USART9_PIN_DEINIT();
2795 #endif
2796 return USART_NonBlockingUninitialize(&usart9_NonBlockingDriverState);
2797 }
2798
USART9_NonBlockingPowerControl(ARM_POWER_STATE state)2799 static int32_t USART9_NonBlockingPowerControl(ARM_POWER_STATE state)
2800 {
2801 uint32_t result;
2802
2803 result = USART_NonBlockingPowerControl(state, &usart9_NonBlockingDriverState);
2804 #if defined(USART9_RX_BUFFER_ENABLE) && (USART9_RX_BUFFER_ENABLE == 1)
2805 if ((state == ARM_POWER_FULL) && (usart9_NonBlockingDriverState.handle->rxRingBuffer == NULL))
2806 {
2807 USART_TransferStartRingBuffer(usart9_NonBlockingDriverState.resource->base,
2808 usart9_NonBlockingDriverState.handle, usart9_rxRingBuffer, USART_RX_BUFFER_LEN);
2809 }
2810 #endif
2811
2812 return result;
2813 }
2814
USART9_NonBlockingSend(const void * data,uint32_t num)2815 static int32_t USART9_NonBlockingSend(const void *data, uint32_t num)
2816 {
2817 return USART_NonBlockingSend(data, num, &usart9_NonBlockingDriverState);
2818 }
2819
USART9_NonBlockingReceive(void * data,uint32_t num)2820 static int32_t USART9_NonBlockingReceive(void *data, uint32_t num)
2821 {
2822 return USART_NonBlockingReceive(data, num, &usart9_NonBlockingDriverState);
2823 }
2824
USART9_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)2825 static int32_t USART9_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
2826 {
2827 return USART_NonBlockingTransfer(data_out, data_in, num, &usart9_NonBlockingDriverState);
2828 }
2829
USART9_NonBlockingGetTxCount(void)2830 static uint32_t USART9_NonBlockingGetTxCount(void)
2831 {
2832 return USART_NonBlockingGetTxCount(&usart9_NonBlockingDriverState);
2833 }
2834
USART9_NonBlockingGetRxCount(void)2835 static uint32_t USART9_NonBlockingGetRxCount(void)
2836 {
2837 return USART_NonBlockingGetRxCount(&usart9_NonBlockingDriverState);
2838 }
2839
USART9_NonBlockingControl(uint32_t control,uint32_t arg)2840 static int32_t USART9_NonBlockingControl(uint32_t control, uint32_t arg)
2841 {
2842 int32_t result;
2843
2844 result = USART_NonBlockingControl(control, arg, &usart9_NonBlockingDriverState);
2845 if (ARM_DRIVER_OK != result)
2846 {
2847 return result;
2848 }
2849 #if defined(USART9_RX_BUFFER_ENABLE) && (USART9_RX_BUFFER_ENABLE == 1)
2850 /* Start receiving interrupts */
2851 usart9_NonBlockingDriverState.resource->base->FIFOINTENSET |=
2852 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
2853 #endif
2854 return ARM_DRIVER_OK;
2855 }
2856
USART9_NonBlockingGetStatus(void)2857 static ARM_USART_STATUS USART9_NonBlockingGetStatus(void)
2858 {
2859 return USART_NonBlockingGetStatus(&usart9_NonBlockingDriverState);
2860 }
2861
2862 #endif
2863
2864 /* usart9 Driver Control Block */
2865 ARM_DRIVER_USART Driver_USART9 = {
2866 USARTx_GetVersion, USARTx_GetCapabilities,
2867 #if RTE_USART9_DMA_EN
2868 USART9_DmaInitialize, USART9_DmaUninitialize, USART9_DmaPowerControl, USART9_DmaSend, USART9_DmaReceive,
2869 USART9_DmaTransfer, USART9_DmaGetTxCount, USART9_DmaGetRxCount, USART9_DmaControl, USART9_DmaGetStatus,
2870 #else
2871 USART9_NonBlockingInitialize,
2872 USART9_NonBlockingUninitialize,
2873 USART9_NonBlockingPowerControl,
2874 USART9_NonBlockingSend,
2875 USART9_NonBlockingReceive,
2876 USART9_NonBlockingTransfer,
2877 USART9_NonBlockingGetTxCount,
2878 USART9_NonBlockingGetRxCount,
2879 USART9_NonBlockingControl,
2880 USART9_NonBlockingGetStatus,
2881 #endif
2882 USARTx_SetModemControl, USARTx_GetModemStatus};
2883
2884 #endif /* usart9 */
2885
2886 #if defined(USART10) && defined(RTE_USART10) && RTE_USART10
2887
2888 /* User needs to provide the implementation for USART10_GetFreq/InitPins/DeinitPins
2889 in the application for enabling according instance. */
2890 extern uint32_t USART10_GetFreq(void);
2891
2892 static cmsis_usart_resource_t usart10_Resource = {USART10, USART10_GetFreq};
2893
2894 #if defined(RTE_USART10_DMA_EN) && RTE_USART10_DMA_EN
2895
2896 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
2897
2898 cmsis_usart_dma_resource_t usart10_DmaResource = {
2899 RTE_USART10_DMA_TX_DMA_BASE,
2900 RTE_USART10_DMA_TX_CH,
2901 RTE_USART10_DMA_RX_DMA_BASE,
2902 RTE_USART10_DMA_RX_CH,
2903 };
2904
2905 static usart_dma_handle_t USART10_DmaHandle;
2906 static dma_handle_t USART10_DmaRxHandle;
2907 static dma_handle_t USART10_DmaTxHandle;
2908
2909 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2910 ARMCC_SECTION("usart10_dma_driver_state")
2911 static cmsis_usart_dma_driver_state_t usart10_DmaDriverState = {
2912 #else
2913 static cmsis_usart_dma_driver_state_t usart10_DmaDriverState = {
2914 #endif
2915 &usart10_Resource, &usart10_DmaResource, &USART10_DmaHandle, &USART10_DmaRxHandle, &USART10_DmaTxHandle,
2916 };
2917
USART10_DmaInitialize(ARM_USART_SignalEvent_t cb_event)2918 static int32_t USART10_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
2919 {
2920 #ifdef RTE_USART10_PIN_INIT
2921 RTE_USART10_PIN_INIT();
2922 #endif
2923 return USART_DmaInitialize(cb_event, &usart10_DmaDriverState);
2924 }
2925
USART10_DmaUninitialize(void)2926 static int32_t USART10_DmaUninitialize(void)
2927 {
2928 #ifdef RTE_USART10_PIN_DEINIT
2929 RTE_USART10_PIN_DEINIT();
2930 #endif
2931 return USART_DmaUninitialize(&usart10_DmaDriverState);
2932 }
2933
USART10_DmaPowerControl(ARM_POWER_STATE state)2934 static int32_t USART10_DmaPowerControl(ARM_POWER_STATE state)
2935 {
2936 return USART_DmaPowerControl(state, &usart10_DmaDriverState);
2937 }
2938
USART10_DmaSend(const void * data,uint32_t num)2939 static int32_t USART10_DmaSend(const void *data, uint32_t num)
2940 {
2941 return USART_DmaSend(data, num, &usart10_DmaDriverState);
2942 }
2943
USART10_DmaReceive(void * data,uint32_t num)2944 static int32_t USART10_DmaReceive(void *data, uint32_t num)
2945 {
2946 return USART_DmaReceive(data, num, &usart10_DmaDriverState);
2947 }
2948
USART10_DmaTransfer(const void * data_out,void * data_in,uint32_t num)2949 static int32_t USART10_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
2950 {
2951 return USART_DmaTransfer(data_out, data_in, num, &usart10_DmaDriverState);
2952 }
2953
USART10_DmaGetTxCount(void)2954 static uint32_t USART10_DmaGetTxCount(void)
2955 {
2956 return USART_DmaGetTxCount(&usart10_DmaDriverState);
2957 }
2958
USART10_DmaGetRxCount(void)2959 static uint32_t USART10_DmaGetRxCount(void)
2960 {
2961 return USART_DmaGetRxCount(&usart10_DmaDriverState);
2962 }
2963
USART10_DmaControl(uint32_t control,uint32_t arg)2964 static int32_t USART10_DmaControl(uint32_t control, uint32_t arg)
2965 {
2966 return USART_DmaControl(control, arg, &usart10_DmaDriverState);
2967 }
2968
USART10_DmaGetStatus(void)2969 static ARM_USART_STATUS USART10_DmaGetStatus(void)
2970 {
2971 return USART_DmaGetStatus(&usart10_DmaDriverState);
2972 }
2973
2974 #endif
2975
2976 #else
2977
2978 static usart_handle_t USART10_Handle;
2979 #if defined(USART10_RX_BUFFER_ENABLE) && (USART10_RX_BUFFER_ENABLE == 1)
2980 static uint8_t usart10_rxRingBuffer[USART_RX_BUFFER_LEN];
2981 #endif
2982
2983 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2984 ARMCC_SECTION("usart10_non_blocking_driver_state")
2985 static cmsis_usart_non_blocking_driver_state_t usart10_NonBlockingDriverState = {
2986 #else
2987 static cmsis_usart_non_blocking_driver_state_t usart10_NonBlockingDriverState = {
2988 #endif
2989 &usart10_Resource,
2990 &USART10_Handle,
2991 };
2992
USART10_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)2993 static int32_t USART10_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
2994 {
2995 #ifdef RTE_USART10_PIN_INIT
2996 RTE_USART10_PIN_INIT();
2997 #endif
2998 return USART_NonBlockingInitialize(cb_event, &usart10_NonBlockingDriverState);
2999 }
3000
USART10_NonBlockingUninitialize(void)3001 static int32_t USART10_NonBlockingUninitialize(void)
3002 {
3003 #ifdef RTE_USART10_PIN_DEINIT
3004 RTE_USART10_PIN_DEINIT();
3005 #endif
3006 return USART_NonBlockingUninitialize(&usart10_NonBlockingDriverState);
3007 }
3008
USART10_NonBlockingPowerControl(ARM_POWER_STATE state)3009 static int32_t USART10_NonBlockingPowerControl(ARM_POWER_STATE state)
3010 {
3011 uint32_t result;
3012
3013 result = USART_NonBlockingPowerControl(state, &usart10_NonBlockingDriverState);
3014 #if defined(USART10_RX_BUFFER_ENABLE) && (USART10_RX_BUFFER_ENABLE == 1)
3015 if ((state == ARM_POWER_FULL) && (usart10_NonBlockingDriverState.handle->rxRingBuffer == NULL))
3016 {
3017 USART_TransferStartRingBuffer(usart10_NonBlockingDriverState.resource->base,
3018 usart10_NonBlockingDriverState.handle, usart10_rxRingBuffer, USART_RX_BUFFER_LEN);
3019 }
3020 #endif
3021 return result;
3022 }
3023
USART10_NonBlockingSend(const void * data,uint32_t num)3024 static int32_t USART10_NonBlockingSend(const void *data, uint32_t num)
3025 {
3026 return USART_NonBlockingSend(data, num, &usart10_NonBlockingDriverState);
3027 }
3028
USART10_NonBlockingReceive(void * data,uint32_t num)3029 static int32_t USART10_NonBlockingReceive(void *data, uint32_t num)
3030 {
3031 return USART_NonBlockingReceive(data, num, &usart10_NonBlockingDriverState);
3032 }
3033
USART10_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)3034 static int32_t USART10_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
3035 {
3036 return USART_NonBlockingTransfer(data_out, data_in, num, &usart10_NonBlockingDriverState);
3037 }
3038
USART10_NonBlockingGetTxCount(void)3039 static uint32_t USART10_NonBlockingGetTxCount(void)
3040 {
3041 return USART_NonBlockingGetTxCount(&usart10_NonBlockingDriverState);
3042 }
3043
USART10_NonBlockingGetRxCount(void)3044 static uint32_t USART10_NonBlockingGetRxCount(void)
3045 {
3046 return USART_NonBlockingGetRxCount(&usart10_NonBlockingDriverState);
3047 }
3048
USART10_NonBlockingControl(uint32_t control,uint32_t arg)3049 static int32_t USART10_NonBlockingControl(uint32_t control, uint32_t arg)
3050 {
3051 int32_t result;
3052
3053 result = USART_NonBlockingControl(control, arg, &usart10_NonBlockingDriverState);
3054 if (ARM_DRIVER_OK != result)
3055 {
3056 return result;
3057 }
3058 #if defined(USART10_RX_BUFFER_ENABLE) && (USART10_RX_BUFFER_ENABLE == 1)
3059 /* Start receiving interrupts */
3060 usart10_NonBlockingDriverState.resource->base->FIFOINTENSET |=
3061 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
3062 #endif
3063 return ARM_DRIVER_OK;
3064 }
3065
USART10_NonBlockingGetStatus(void)3066 static ARM_USART_STATUS USART10_NonBlockingGetStatus(void)
3067 {
3068 return USART_NonBlockingGetStatus(&usart10_NonBlockingDriverState);
3069 }
3070
3071 #endif
3072
3073 ARM_DRIVER_USART Driver_USART10 = {
3074 USARTx_GetVersion, USARTx_GetCapabilities,
3075 #if RTE_USART10_DMA_EN
3076 USART10_DmaInitialize, USART10_DmaUninitialize, USART10_DmaPowerControl, USART10_DmaSend, USART10_DmaReceive,
3077 USART10_DmaTransfer, USART10_DmaGetTxCount, USART10_DmaGetRxCount, USART10_DmaControl, USART10_DmaGetStatus,
3078 #else
3079 USART10_NonBlockingInitialize,
3080 USART10_NonBlockingUninitialize,
3081 USART10_NonBlockingPowerControl,
3082 USART10_NonBlockingSend,
3083 USART10_NonBlockingReceive,
3084 USART10_NonBlockingTransfer,
3085 USART10_NonBlockingGetTxCount,
3086 USART10_NonBlockingGetRxCount,
3087 USART10_NonBlockingControl,
3088 USART10_NonBlockingGetStatus,
3089 #endif
3090 USARTx_SetModemControl, USARTx_GetModemStatus};
3091
3092 #endif /* usart10 */
3093
3094 #if defined(USART11) && defined(RTE_USART11) && RTE_USART11
3095
3096 /* User needs to provide the implementation for USART11_GetFreq/InitPins/DeinitPins
3097 in the application for enabling according instance. */
3098 extern uint32_t USART11_GetFreq(void);
3099
3100 static cmsis_usart_resource_t usart11_Resource = {USART11, USART11_GetFreq};
3101
3102 #if defined(RTE_USART11_DMA_EN) && RTE_USART11_DMA_EN
3103
3104 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
3105
3106 cmsis_usart_dma_resource_t usart11_DmaResource = {
3107 RTE_USART11_DMA_TX_DMA_BASE,
3108 RTE_USART11_DMA_TX_CH,
3109 RTE_USART11_DMA_RX_DMA_BASE,
3110 RTE_USART11_DMA_RX_CH,
3111 };
3112
3113 static usart_dma_handle_t USART11_DmaHandle;
3114 static dma_handle_t USART11_DmaRxHandle;
3115 static dma_handle_t USART11_DmaTxHandle;
3116
3117 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3118 ARMCC_SECTION("usart11_dma_driver_state")
3119 static cmsis_usart_dma_driver_state_t usart11_DmaDriverState = {
3120 #else
3121 static cmsis_usart_dma_driver_state_t usart11_DmaDriverState = {
3122 #endif
3123 &usart11_Resource, &usart11_DmaResource, &USART11_DmaHandle, &USART11_DmaRxHandle, &USART11_DmaTxHandle,
3124 };
3125
USART11_DmaInitialize(ARM_USART_SignalEvent_t cb_event)3126 static int32_t USART11_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
3127 {
3128 #ifdef RTE_USART11_PIN_INIT
3129 RTE_USART11_PIN_INIT();
3130 #endif
3131 return USART_DmaInitialize(cb_event, &usart11_DmaDriverState);
3132 }
3133
USART11_DmaUninitialize(void)3134 static int32_t USART11_DmaUninitialize(void)
3135 {
3136 #ifdef RTE_USART11_PIN_DEINIT
3137 RTE_USART11_PIN_DEINIT();
3138 #endif
3139 return USART_DmaUninitialize(&usart11_DmaDriverState);
3140 }
3141
USART11_DmaPowerControl(ARM_POWER_STATE state)3142 static int32_t USART11_DmaPowerControl(ARM_POWER_STATE state)
3143 {
3144 return USART_DmaPowerControl(state, &usart11_DmaDriverState);
3145 }
3146
USART11_DmaSend(const void * data,uint32_t num)3147 static int32_t USART11_DmaSend(const void *data, uint32_t num)
3148 {
3149 return USART_DmaSend(data, num, &usart11_DmaDriverState);
3150 }
3151
USART11_DmaReceive(void * data,uint32_t num)3152 static int32_t USART11_DmaReceive(void *data, uint32_t num)
3153 {
3154 return USART_DmaReceive(data, num, &usart11_DmaDriverState);
3155 }
3156
USART11_DmaTransfer(const void * data_out,void * data_in,uint32_t num)3157 static int32_t USART11_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
3158 {
3159 return USART_DmaTransfer(data_out, data_in, num, &usart11_DmaDriverState);
3160 }
3161
USART11_DmaGetTxCount(void)3162 static uint32_t USART11_DmaGetTxCount(void)
3163 {
3164 return USART_DmaGetTxCount(&usart11_DmaDriverState);
3165 }
3166
USART11_DmaGetRxCount(void)3167 static uint32_t USART11_DmaGetRxCount(void)
3168 {
3169 return USART_DmaGetRxCount(&usart11_DmaDriverState);
3170 }
3171
USART11_DmaControl(uint32_t control,uint32_t arg)3172 static int32_t USART11_DmaControl(uint32_t control, uint32_t arg)
3173 {
3174 return USART_DmaControl(control, arg, &usart11_DmaDriverState);
3175 }
3176
USART11_DmaGetStatus(void)3177 static ARM_USART_STATUS USART11_DmaGetStatus(void)
3178 {
3179 return USART_DmaGetStatus(&usart11_DmaDriverState);
3180 }
3181
3182 #endif
3183
3184 #else
3185
3186 static usart_handle_t USART11_Handle;
3187 #if defined(USART11_RX_BUFFER_ENABLE) && (USART11_RX_BUFFER_ENABLE == 1)
3188 static uint8_t usart11_rxRingBuffer[USART_RX_BUFFER_LEN];
3189 #endif
3190
3191 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3192 ARMCC_SECTION("usart11_non_blocking_driver_state")
3193 static cmsis_usart_non_blocking_driver_state_t usart11_NonBlockingDriverState = {
3194 #else
3195 static cmsis_usart_non_blocking_driver_state_t usart11_NonBlockingDriverState = {
3196 #endif
3197 &usart11_Resource,
3198 &USART11_Handle,
3199 };
3200
USART11_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)3201 static int32_t USART11_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
3202 {
3203 #ifdef RTE_USART11_PIN_INIT
3204 RTE_USART11_PIN_INIT();
3205 #endif
3206 return USART_NonBlockingInitialize(cb_event, &usart11_NonBlockingDriverState);
3207 }
3208
USART11_NonBlockingUninitialize(void)3209 static int32_t USART11_NonBlockingUninitialize(void)
3210 {
3211 #ifdef RTE_USART11_PIN_DEINIT
3212 RTE_USART11_PIN_DEINIT();
3213 #endif
3214 return USART_NonBlockingUninitialize(&usart11_NonBlockingDriverState);
3215 }
3216
USART11_NonBlockingPowerControl(ARM_POWER_STATE state)3217 static int32_t USART11_NonBlockingPowerControl(ARM_POWER_STATE state)
3218 {
3219 uint32_t result;
3220
3221 result = USART_NonBlockingPowerControl(state, &usart11_NonBlockingDriverState);
3222 #if defined(USART11_RX_BUFFER_ENABLE) && (USART11_RX_BUFFER_ENABLE == 1)
3223 if ((state == ARM_POWER_FULL) && (usart11_NonBlockingDriverState.handle->rxRingBuffer == NULL))
3224 {
3225 USART_TransferStartRingBuffer(usart11_NonBlockingDriverState.resource->base,
3226 usart11_NonBlockingDriverState.handle, usart11_rxRingBuffer, USART_RX_BUFFER_LEN);
3227 }
3228 #endif
3229 return result;
3230 }
3231
USART11_NonBlockingSend(const void * data,uint32_t num)3232 static int32_t USART11_NonBlockingSend(const void *data, uint32_t num)
3233 {
3234 return USART_NonBlockingSend(data, num, &usart11_NonBlockingDriverState);
3235 }
3236
USART11_NonBlockingReceive(void * data,uint32_t num)3237 static int32_t USART11_NonBlockingReceive(void *data, uint32_t num)
3238 {
3239 return USART_NonBlockingReceive(data, num, &usart11_NonBlockingDriverState);
3240 }
3241
USART11_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)3242 static int32_t USART11_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
3243 {
3244 return USART_NonBlockingTransfer(data_out, data_in, num, &usart11_NonBlockingDriverState);
3245 }
3246
USART11_NonBlockingGetTxCount(void)3247 static uint32_t USART11_NonBlockingGetTxCount(void)
3248 {
3249 return USART_NonBlockingGetTxCount(&usart11_NonBlockingDriverState);
3250 }
3251
USART11_NonBlockingGetRxCount(void)3252 static uint32_t USART11_NonBlockingGetRxCount(void)
3253 {
3254 return USART_NonBlockingGetRxCount(&usart11_NonBlockingDriverState);
3255 }
3256
USART11_NonBlockingControl(uint32_t control,uint32_t arg)3257 static int32_t USART11_NonBlockingControl(uint32_t control, uint32_t arg)
3258 {
3259 int32_t result;
3260
3261 result = USART_NonBlockingControl(control, arg, &usart11_NonBlockingDriverState);
3262 if (ARM_DRIVER_OK != result)
3263 {
3264 return result;
3265 }
3266 #if defined(USART11_RX_BUFFER_ENABLE) && (USART11_RX_BUFFER_ENABLE == 1)
3267 /* Start receiving interrupts */
3268 usart11_NonBlockingDriverState.resource->base->FIFOINTENSET |=
3269 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
3270 #endif
3271 return ARM_DRIVER_OK;
3272 }
3273
USART11_NonBlockingGetStatus(void)3274 static ARM_USART_STATUS USART11_NonBlockingGetStatus(void)
3275 {
3276 return USART_NonBlockingGetStatus(&usart11_NonBlockingDriverState);
3277 }
3278
3279 #endif
3280
3281 ARM_DRIVER_USART Driver_USART11 = {
3282 USARTx_GetVersion, USARTx_GetCapabilities,
3283 #if RTE_USART11_DMA_EN
3284 USART11_DmaInitialize, USART11_DmaUninitialize, USART11_DmaPowerControl, USART11_DmaSend, USART11_DmaReceive,
3285 USART11_DmaTransfer, USART11_DmaGetTxCount, USART11_DmaGetRxCount, USART11_DmaControl, USART11_DmaGetStatus,
3286 #else
3287 USART11_NonBlockingInitialize,
3288 USART11_NonBlockingUninitialize,
3289 USART11_NonBlockingPowerControl,
3290 USART11_NonBlockingSend,
3291 USART11_NonBlockingReceive,
3292 USART11_NonBlockingTransfer,
3293 USART11_NonBlockingGetTxCount,
3294 USART11_NonBlockingGetRxCount,
3295 USART11_NonBlockingControl,
3296 USART11_NonBlockingGetStatus,
3297 #endif
3298 USARTx_SetModemControl, USARTx_GetModemStatus};
3299
3300 #endif /* usart11 */
3301
3302 #if defined(USART12) && defined(RTE_USART12) && RTE_USART12
3303
3304 /* User needs to provide the implementation for USART12_GetFreq/InitPins/DeinitPins
3305 in the application for enabling according instance. */
3306 extern uint32_t USART12_GetFreq(void);
3307
3308 static cmsis_usart_resource_t usart12_Resource = {USART12, USART12_GetFreq};
3309
3310 #if defined(RTE_USART12_DMA_EN) && RTE_USART12_DMA_EN
3311
3312 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
3313
3314 cmsis_usart_dma_resource_t usart12_DmaResource = {
3315 RTE_USART12_DMA_TX_DMA_BASE,
3316 RTE_USART12_DMA_TX_CH,
3317 RTE_USART12_DMA_RX_DMA_BASE,
3318 RTE_USART12_DMA_RX_CH,
3319 };
3320
3321 static usart_dma_handle_t USART12_DmaHandle;
3322 static dma_handle_t USART12_DmaRxHandle;
3323 static dma_handle_t USART12_DmaTxHandle;
3324
3325 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3326 ARMCC_SECTION("usart12_dma_driver_state")
3327 static cmsis_usart_dma_driver_state_t usart12_DmaDriverState = {
3328 #else
3329 static cmsis_usart_dma_driver_state_t usart12_DmaDriverState = {
3330 #endif
3331 &usart12_Resource, &usart12_DmaResource, &USART12_DmaHandle, &USART12_DmaRxHandle, &USART12_DmaTxHandle,
3332 };
3333
USART12_DmaInitialize(ARM_USART_SignalEvent_t cb_event)3334 static int32_t USART12_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
3335 {
3336 #ifdef RTE_USART12_PIN_INIT
3337 RTE_USART12_PIN_INIT();
3338 #endif
3339 return USART_DmaInitialize(cb_event, &usart12_DmaDriverState);
3340 }
3341
USART12_DmaUninitialize(void)3342 static int32_t USART12_DmaUninitialize(void)
3343 {
3344 #ifdef RTE_USART12_PIN_DEINIT
3345 RTE_USART12_PIN_DEINIT();
3346 #endif
3347 return USART_DmaUninitialize(&usart12_DmaDriverState);
3348 }
3349
USART12_DmaPowerControl(ARM_POWER_STATE state)3350 static int32_t USART12_DmaPowerControl(ARM_POWER_STATE state)
3351 {
3352 return USART_DmaPowerControl(state, &usart12_DmaDriverState);
3353 }
3354
USART12_DmaSend(const void * data,uint32_t num)3355 static int32_t USART12_DmaSend(const void *data, uint32_t num)
3356 {
3357 return USART_DmaSend(data, num, &usart12_DmaDriverState);
3358 }
3359
USART12_DmaReceive(void * data,uint32_t num)3360 static int32_t USART12_DmaReceive(void *data, uint32_t num)
3361 {
3362 return USART_DmaReceive(data, num, &usart12_DmaDriverState);
3363 }
3364
USART12_DmaTransfer(const void * data_out,void * data_in,uint32_t num)3365 static int32_t USART12_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
3366 {
3367 return USART_DmaTransfer(data_out, data_in, num, &usart12_DmaDriverState);
3368 }
3369
USART12_DmaGetTxCount(void)3370 static uint32_t USART12_DmaGetTxCount(void)
3371 {
3372 return USART_DmaGetTxCount(&usart12_DmaDriverState);
3373 }
3374
USART12_DmaGetRxCount(void)3375 static uint32_t USART12_DmaGetRxCount(void)
3376 {
3377 return USART_DmaGetRxCount(&usart12_DmaDriverState);
3378 }
3379
USART12_DmaControl(uint32_t control,uint32_t arg)3380 static int32_t USART12_DmaControl(uint32_t control, uint32_t arg)
3381 {
3382 return USART_DmaControl(control, arg, &usart12_DmaDriverState);
3383 }
3384
USART12_DmaGetStatus(void)3385 static ARM_USART_STATUS USART12_DmaGetStatus(void)
3386 {
3387 return USART_DmaGetStatus(&usart12_DmaDriverState);
3388 }
3389
3390 #endif
3391
3392 #else
3393
3394 static usart_handle_t USART12_Handle;
3395 #if defined(USART12_RX_BUFFER_ENABLE) && (USART12_RX_BUFFER_ENABLE == 1)
3396 static uint8_t usart12_rxRingBuffer[USART_RX_BUFFER_LEN];
3397 #endif
3398
3399 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3400 ARMCC_SECTION("usart12_non_blocking_driver_state")
3401 static cmsis_usart_non_blocking_driver_state_t usart12_NonBlockingDriverState = {
3402 #else
3403 static cmsis_usart_non_blocking_driver_state_t usart12_NonBlockingDriverState = {
3404 #endif
3405 &usart12_Resource,
3406 &USART12_Handle,
3407 };
3408
USART12_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)3409 static int32_t USART12_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
3410 {
3411 #ifdef RTE_USART12_PIN_INIT
3412 RTE_USART12_PIN_INIT();
3413 #endif
3414 return USART_NonBlockingInitialize(cb_event, &usart12_NonBlockingDriverState);
3415 }
3416
USART12_NonBlockingUninitialize(void)3417 static int32_t USART12_NonBlockingUninitialize(void)
3418 {
3419 #ifdef RTE_USART12_PIN_DEINIT
3420 RTE_USART12_PIN_DEINIT();
3421 #endif
3422 return USART_NonBlockingUninitialize(&usart12_NonBlockingDriverState);
3423 }
3424
USART12_NonBlockingPowerControl(ARM_POWER_STATE state)3425 static int32_t USART12_NonBlockingPowerControl(ARM_POWER_STATE state)
3426 {
3427 uint32_t result;
3428
3429 result = USART_NonBlockingPowerControl(state, &usart12_NonBlockingDriverState);
3430 #if defined(USART12_RX_BUFFER_ENABLE) && (USART12_RX_BUFFER_ENABLE == 1)
3431 if ((state == ARM_POWER_FULL) && (usart12_NonBlockingDriverState.handle->rxRingBuffer == NULL))
3432 {
3433 USART_TransferStartRingBuffer(usart12_NonBlockingDriverState.resource->base,
3434 usart12_NonBlockingDriverState.handle, usart12_rxRingBuffer, USART_RX_BUFFER_LEN);
3435 }
3436 #endif
3437 return result;
3438 }
3439
USART12_NonBlockingSend(const void * data,uint32_t num)3440 static int32_t USART12_NonBlockingSend(const void *data, uint32_t num)
3441 {
3442 return USART_NonBlockingSend(data, num, &usart12_NonBlockingDriverState);
3443 }
3444
USART12_NonBlockingReceive(void * data,uint32_t num)3445 static int32_t USART12_NonBlockingReceive(void *data, uint32_t num)
3446 {
3447 return USART_NonBlockingReceive(data, num, &usart12_NonBlockingDriverState);
3448 }
3449
USART12_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)3450 static int32_t USART12_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
3451 {
3452 return USART_NonBlockingTransfer(data_out, data_in, num, &usart12_NonBlockingDriverState);
3453 }
3454
USART12_NonBlockingGetTxCount(void)3455 static uint32_t USART12_NonBlockingGetTxCount(void)
3456 {
3457 return USART_NonBlockingGetTxCount(&usart12_NonBlockingDriverState);
3458 }
3459
USART12_NonBlockingGetRxCount(void)3460 static uint32_t USART12_NonBlockingGetRxCount(void)
3461 {
3462 return USART_NonBlockingGetRxCount(&usart12_NonBlockingDriverState);
3463 }
3464
USART12_NonBlockingControl(uint32_t control,uint32_t arg)3465 static int32_t USART12_NonBlockingControl(uint32_t control, uint32_t arg)
3466 {
3467 int32_t result;
3468
3469 result = USART_NonBlockingControl(control, arg, &usart12_NonBlockingDriverState);
3470 if (ARM_DRIVER_OK != result)
3471 {
3472 return result;
3473 }
3474 #if defined(USART12_RX_BUFFER_ENABLE) && (USART12_RX_BUFFER_ENABLE == 1)
3475 /* Start receiving interrupts */
3476 usart12_NonBlockingDriverState.resource->base->FIFOINTENSET |=
3477 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
3478 #endif
3479 return ARM_DRIVER_OK;
3480 }
3481
USART12_NonBlockingGetStatus(void)3482 static ARM_USART_STATUS USART12_NonBlockingGetStatus(void)
3483 {
3484 return USART_NonBlockingGetStatus(&usart12_NonBlockingDriverState);
3485 }
3486
3487 #endif
3488
3489 ARM_DRIVER_USART Driver_USART12 = {
3490 USARTx_GetVersion, USARTx_GetCapabilities,
3491 #if RTE_USART12_DMA_EN
3492 USART12_DmaInitialize, USART12_DmaUninitialize, USART12_DmaPowerControl, USART12_DmaSend, USART12_DmaReceive,
3493 USART12_DmaTransfer, USART12_DmaGetTxCount, USART12_DmaGetRxCount, USART12_DmaControl, USART12_DmaGetStatus,
3494 #else
3495 USART12_NonBlockingInitialize,
3496 USART12_NonBlockingUninitialize,
3497 USART12_NonBlockingPowerControl,
3498 USART12_NonBlockingSend,
3499 USART12_NonBlockingReceive,
3500 USART12_NonBlockingTransfer,
3501 USART12_NonBlockingGetTxCount,
3502 USART12_NonBlockingGetRxCount,
3503 USART12_NonBlockingControl,
3504 USART12_NonBlockingGetStatus,
3505 #endif
3506 USARTx_SetModemControl, USARTx_GetModemStatus};
3507
3508 #endif /* usart12 */
3509
3510 #if defined(USART13) && defined(RTE_USART13) && RTE_USART13
3511
3512 /* User needs to provide the implementation for USART13_GetFreq/InitPins/DeinitPins
3513 in the application for enabling according instance. */
3514 extern uint32_t USART13_GetFreq(void);
3515
3516 static cmsis_usart_resource_t usart13_Resource = {USART13, USART13_GetFreq};
3517
3518 #if defined(RTE_USART13_DMA_EN) && RTE_USART13_DMA_EN
3519
3520 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
3521
3522 cmsis_usart_dma_resource_t usart13_DmaResource = {
3523 RTE_USART13_DMA_TX_DMA_BASE,
3524 RTE_USART13_DMA_TX_CH,
3525 RTE_USART13_DMA_RX_DMA_BASE,
3526 RTE_USART13_DMA_RX_CH,
3527 };
3528
3529 static usart_dma_handle_t USART13_DmaHandle;
3530 static dma_handle_t USART13_DmaRxHandle;
3531 static dma_handle_t USART13_DmaTxHandle;
3532
3533 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3534 ARMCC_SECTION("usart13_dma_driver_state")
3535 static cmsis_usart_dma_driver_state_t usart13_DmaDriverState = {
3536 #else
3537 static cmsis_usart_dma_driver_state_t usart13_DmaDriverState = {
3538 #endif
3539 &usart13_Resource, &usart13_DmaResource, &USART13_DmaHandle, &USART13_DmaRxHandle, &USART13_DmaTxHandle,
3540 };
3541
USART13_DmaInitialize(ARM_USART_SignalEvent_t cb_event)3542 static int32_t USART13_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
3543 {
3544 #ifdef RTE_USART13_PIN_INIT
3545 RTE_USART13_PIN_INIT();
3546 #endif
3547 return USART_DmaInitialize(cb_event, &usart13_DmaDriverState);
3548 }
3549
USART13_DmaUninitialize(void)3550 static int32_t USART13_DmaUninitialize(void)
3551 {
3552 #ifdef RTE_USART13_PIN_DEINIT
3553 RTE_USART13_PIN_DEINIT();
3554 #endif
3555 return USART_DmaUninitialize(&usart13_DmaDriverState);
3556 }
3557
USART13_DmaPowerControl(ARM_POWER_STATE state)3558 static int32_t USART13_DmaPowerControl(ARM_POWER_STATE state)
3559 {
3560 return USART_DmaPowerControl(state, &usart13_DmaDriverState);
3561 }
3562
USART13_DmaSend(const void * data,uint32_t num)3563 static int32_t USART13_DmaSend(const void *data, uint32_t num)
3564 {
3565 return USART_DmaSend(data, num, &usart13_DmaDriverState);
3566 }
3567
USART13_DmaReceive(void * data,uint32_t num)3568 static int32_t USART13_DmaReceive(void *data, uint32_t num)
3569 {
3570 return USART_DmaReceive(data, num, &usart13_DmaDriverState);
3571 }
3572
USART13_DmaTransfer(const void * data_out,void * data_in,uint32_t num)3573 static int32_t USART13_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
3574 {
3575 return USART_DmaTransfer(data_out, data_in, num, &usart13_DmaDriverState);
3576 }
3577
USART13_DmaGetTxCount(void)3578 static uint32_t USART13_DmaGetTxCount(void)
3579 {
3580 return USART_DmaGetTxCount(&usart13_DmaDriverState);
3581 }
3582
USART13_DmaGetRxCount(void)3583 static uint32_t USART13_DmaGetRxCount(void)
3584 {
3585 return USART_DmaGetRxCount(&usart13_DmaDriverState);
3586 }
3587
USART13_DmaControl(uint32_t control,uint32_t arg)3588 static int32_t USART13_DmaControl(uint32_t control, uint32_t arg)
3589 {
3590 return USART_DmaControl(control, arg, &usart13_DmaDriverState);
3591 }
3592
USART13_DmaGetStatus(void)3593 static ARM_USART_STATUS USART13_DmaGetStatus(void)
3594 {
3595 return USART_DmaGetStatus(&usart13_DmaDriverState);
3596 }
3597
3598 #endif
3599
3600 #else
3601
3602 static usart_handle_t USART13_Handle;
3603 #if defined(USART13_RX_BUFFER_ENABLE) && (USART13_RX_BUFFER_ENABLE == 1)
3604 static uint8_t usart13_rxRingBuffer[USART_RX_BUFFER_LEN];
3605 #endif
3606
3607 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3608 ARMCC_SECTION("usart13_non_blocking_driver_state")
3609 static cmsis_usart_non_blocking_driver_state_t usart13_NonBlockingDriverState = {
3610 #else
3611 static cmsis_usart_non_blocking_driver_state_t usart13_NonBlockingDriverState = {
3612 #endif
3613 &usart13_Resource,
3614 &USART13_Handle,
3615 };
3616
USART13_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)3617 static int32_t USART13_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
3618 {
3619 #ifdef RTE_USART13_PIN_INIT
3620 RTE_USART13_PIN_INIT();
3621 #endif
3622 return USART_NonBlockingInitialize(cb_event, &usart13_NonBlockingDriverState);
3623 }
3624
USART13_NonBlockingUninitialize(void)3625 static int32_t USART13_NonBlockingUninitialize(void)
3626 {
3627 #ifdef RTE_USART13_PIN_DEINIT
3628 RTE_USART13_PIN_DEINIT();
3629 #endif
3630 return USART_NonBlockingUninitialize(&usart13_NonBlockingDriverState);
3631 }
3632
USART13_NonBlockingPowerControl(ARM_POWER_STATE state)3633 static int32_t USART13_NonBlockingPowerControl(ARM_POWER_STATE state)
3634 {
3635 uint32_t result;
3636
3637 result = USART_NonBlockingPowerControl(state, &usart13_NonBlockingDriverState);
3638 #if defined(USART13_RX_BUFFER_ENABLE) && (USART13_RX_BUFFER_ENABLE == 1)
3639 if ((state == ARM_POWER_FULL) && (usart13_NonBlockingDriverState.handle->rxRingBuffer == NULL))
3640 {
3641 USART_TransferStartRingBuffer(usart13_NonBlockingDriverState.resource->base,
3642 usart13_NonBlockingDriverState.handle, usart13_rxRingBuffer, USART_RX_BUFFER_LEN);
3643 }
3644 #endif
3645 return result;
3646 }
3647
USART13_NonBlockingSend(const void * data,uint32_t num)3648 static int32_t USART13_NonBlockingSend(const void *data, uint32_t num)
3649 {
3650 return USART_NonBlockingSend(data, num, &usart13_NonBlockingDriverState);
3651 }
3652
USART13_NonBlockingReceive(void * data,uint32_t num)3653 static int32_t USART13_NonBlockingReceive(void *data, uint32_t num)
3654 {
3655 return USART_NonBlockingReceive(data, num, &usart13_NonBlockingDriverState);
3656 }
3657
USART13_NonBlockingTransfer(const void * data_out,void * data_in,uint32_t num)3658 static int32_t USART13_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
3659 {
3660 return USART_NonBlockingTransfer(data_out, data_in, num, &usart13_NonBlockingDriverState);
3661 }
3662
USART13_NonBlockingGetTxCount(void)3663 static uint32_t USART13_NonBlockingGetTxCount(void)
3664 {
3665 return USART_NonBlockingGetTxCount(&usart13_NonBlockingDriverState);
3666 }
3667
USART13_NonBlockingGetRxCount(void)3668 static uint32_t USART13_NonBlockingGetRxCount(void)
3669 {
3670 return USART_NonBlockingGetRxCount(&usart13_NonBlockingDriverState);
3671 }
3672
USART13_NonBlockingControl(uint32_t control,uint32_t arg)3673 static int32_t USART13_NonBlockingControl(uint32_t control, uint32_t arg)
3674 {
3675 int32_t result;
3676
3677 result = USART_NonBlockingControl(control, arg, &usart13_NonBlockingDriverState);
3678 if (ARM_DRIVER_OK != result)
3679 {
3680 return result;
3681 }
3682 #if defined(USART13_RX_BUFFER_ENABLE) && (USART13_RX_BUFFER_ENABLE == 1)
3683 /* Start receiving interrupts */
3684 usart13_NonBlockingDriverState.resource->base->FIFOINTENSET |=
3685 USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
3686 #endif
3687 return ARM_DRIVER_OK;
3688 }
3689
USART13_NonBlockingGetStatus(void)3690 static ARM_USART_STATUS USART13_NonBlockingGetStatus(void)
3691 {
3692 return USART_NonBlockingGetStatus(&usart13_NonBlockingDriverState);
3693 }
3694
3695 #endif
3696
3697 ARM_DRIVER_USART Driver_USART13 = {
3698 USARTx_GetVersion, USARTx_GetCapabilities,
3699 #if RTE_USART13_DMA_EN
3700 USART13_DmaInitialize, USART13_DmaUninitialize, USART13_DmaPowerControl, USART13_DmaSend, USART13_DmaReceive,
3701 USART13_DmaTransfer, USART13_DmaGetTxCount, USART13_DmaGetRxCount, USART13_DmaControl, USART13_DmaGetStatus,
3702 #else
3703 USART13_NonBlockingInitialize,
3704 USART13_NonBlockingUninitialize,
3705 USART13_NonBlockingPowerControl,
3706 USART13_NonBlockingSend,
3707 USART13_NonBlockingReceive,
3708 USART13_NonBlockingTransfer,
3709 USART13_NonBlockingGetTxCount,
3710 USART13_NonBlockingGetRxCount,
3711 USART13_NonBlockingControl,
3712 USART13_NonBlockingGetStatus,
3713 #endif
3714 USARTx_SetModemControl, USARTx_GetModemStatus};
3715
3716 #endif /* usart13 */
3717
