1 /*
2 * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
3 * Copyright (c) 2016, Freescale Semiconductor, Inc. Not a Contribution.
4 * Copyright 2016-2017,2020,2024 NXP. Not a Contribution.
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 *
8 * Licensed under the Apache License, Version 2.0 (the License); you may
9 * not use this file except in compliance with the License.
10 * You may obtain a copy of the License at
11 *
12 * http://www.apache.org/licenses/LICENSE-2.0
13 *
14 * Unless required by applicable law or agreed to in writing, software
15 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
16 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
17 * See the License for the specific language governing permissions and
18 * limitations under the License.
19 */
20
21 #include "fsl_lpi2c_cmsis.h"
22
23 #if ((defined(RTE_I2C0) && RTE_I2C0 && defined(LPI2C0)) || (defined(RTE_I2C1) && RTE_I2C1 && defined(LPI2C1)) || \
24 (defined(RTE_I2C2) && RTE_I2C2 && defined(LPI2C2)) || (defined(RTE_I2C3) && RTE_I2C3 && defined(LPI2C3)) || \
25 (defined(RTE_I2C4) && RTE_I2C4 && defined(LPI2C4)) || (defined(RTE_I2C5) && RTE_I2C5 && defined(LPI2C5)) || \
26 (defined(RTE_I2C6) && RTE_I2C6 && defined(LPI2C6)) || (defined(RTE_I2C7) && RTE_I2C7 && defined(LPI2C7)) || \
27 (defined(RTE_I2C8) && RTE_I2C8 && defined(LPI2C8)) || (defined(RTE_I2C9) && RTE_I2C9 && defined(LPI2C9)) || \
28 (defined(RTE_I2C10) && RTE_I2C10 && defined(LPI2C10)) || (defined(RTE_I2C11) && RTE_I2C11 && defined(LPI2C11)) || \
29 (defined(RTE_I2C12) && RTE_I2C12 && defined(LPI2C12)) || (defined(RTE_I2C13) && RTE_I2C13 && defined(LPI2C13)) || \
30 (defined(RTE_I2C14) && RTE_I2C14 && defined(LPI2C14)) || (defined(RTE_I2C15) && RTE_I2C15 && defined(LPI2C15)) || \
31 (defined(RTE_I2C16) && RTE_I2C16 && defined(LPI2C16)) || (defined(RTE_I2C17) && RTE_I2C17 && defined(LPI2C17)) || \
32 (defined(RTE_I2C18) && RTE_I2C18 && defined(LPI2C18)) || (defined(RTE_I2C19) && RTE_I2C19 && defined(LPI2C19)) || \
33 (defined(RTE_I2C20) && RTE_I2C20 && defined(LPI2C20)))
34
35 #define ARM_LPI2C_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR((2), (5))
36
37 /*
38 * ARMCC does not support split the data section automatically, so the driver
39 * needs to split the data to separate sections explicitly, to reduce codesize.
40 */
41 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
42 #define ARMCC_SECTION(section_name) __attribute__((section(section_name)))
43 #endif
44
45 /*******************************************************************************
46 * Definitions
47 ******************************************************************************/
48
49 /* Component ID definition, used by tools. */
50 #ifndef FSL_COMPONENT_ID
51 #define FSL_COMPONENT_ID "platform.drivers.lpi2c_cmsis"
52 #endif
53
54 typedef const struct _cmsis_lpi2c_resource
55 {
56 LPI2C_Type *base; /*!< LPI2C peripheral base address. */
57 uint32_t (*GetFreq)(void); /*!< Function to get the clock frequency. */
58
59 } cmsis_lpi2c_resource_t;
60
61 typedef union _cmsis_i2c_handle
62 {
63 lpi2c_master_handle_t master_handle;
64 lpi2c_slave_handle_t slave_handle;
65 } cmsis_i2c_handle_t;
66
67 typedef struct _cmsis_lpi2c_interrupt_driver_state
68 {
69 cmsis_lpi2c_resource_t *resource; /*!< Basic LPI2C resource. */
70 cmsis_i2c_handle_t *handle;
71 uint8_t *slave_data; /*!< slave Transfer buffer */
72 size_t slave_dataSize; /*!< slave Transfer size */
73 ARM_I2C_SignalEvent_t cb_event; /*!< call back function */
74 uint8_t flags; /*!< Control and state flags. */
75 } cmsis_lpi2c_interrupt_driver_state_t;
76
77 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
78 typedef const struct _cmsis_lpi2c_edma_resource
79 {
80 void *txEdmaBase; /*!< EDMA peripheral base address for Tx. */
81 uint32_t txEdmaChannel; /*!< EDMA channel for Tx */
82 uint16_t txDmaRequest; /*!< Tx EDMA request source. */
83
84 void *rxEdmaBase; /*!< EDMA peripheral base address for Rx. */
85 uint32_t rxEdmaChannel; /*!< EDMA channel for Rx */
86 uint16_t rxDmaRequest; /*!< Rx EDMA request source. */
87 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
88 DMAMUX_Type *txDmamuxBase; /*!< DMAMUX peripheral base address for Tx */
89 DMAMUX_Type *rxDmamuxBase; /*!< DMAMUX peripheral base address for Rx */
90 #endif
91 } cmsis_lpi2c_edma_resource_t;
92
93 typedef struct _cmsis_lpi2c_edma_driver_state
94 {
95 cmsis_lpi2c_resource_t *resource; /*!< lpi2c basic resource. */
96 cmsis_lpi2c_edma_resource_t *edmaResource; /*!< lpi2c EDMA resource. */
97 lpi2c_master_edma_handle_t *master_edma_handle; /*!< lpi2c EDMA transfer handle. */
98 edma_handle_t *edmaTxHandle; /*!< EDMA lpi2c Tx handle. */
99 edma_handle_t *edmaRxHandle; /*!< EDMA lpi2c Rx handle. */
100 uint8_t flags; /*!< Control and state flags. */
101 } cmsis_lpi2c_edma_driver_state_t;
102 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
103
104 /*******************************************************************************
105 * Prototypes
106 ******************************************************************************/
107
108 static const ARM_DRIVER_VERSION s_lpi2cDriverVersion = {ARM_I2C_API_VERSION, ARM_LPI2C_DRV_VERSION};
109 static const ARM_I2C_CAPABILITIES s_lpi2cDriverCapabilities = {
110 0, /* Do not support 10-bit addressing.*/
111 };
112
113 /*******************************************************************************
114 * Code
115 ******************************************************************************/
116
117 /* Returns version information */
LPI2Cx_GetVersion(void)118 static ARM_DRIVER_VERSION LPI2Cx_GetVersion(void)
119 {
120 return s_lpi2cDriverVersion;
121 }
122
123 /* Returns information about capabilities of this driver implementation */
LPI2Cx_GetCapabilities(void)124 static ARM_I2C_CAPABILITIES LPI2Cx_GetCapabilities(void)
125 {
126 return s_lpi2cDriverCapabilities;
127 }
128
129 #endif
130
131 #if ((defined(RTE_I2C0_DMA_EN) && RTE_I2C0_DMA_EN) || (defined(RTE_I2C1_DMA_EN) && RTE_I2C1_DMA_EN) || \
132 (defined(RTE_I2C2_DMA_EN) && RTE_I2C2_DMA_EN) || (defined(RTE_I2C3_DMA_EN) && RTE_I2C3_DMA_EN) || \
133 (defined(RTE_I2C4_DMA_EN) && RTE_I2C4_DMA_EN) || (defined(RTE_I2C5_DMA_EN) && RTE_I2C5_DMA_EN) || \
134 (defined(RTE_I2C6_DMA_EN) && RTE_I2C6_DMA_EN) || (defined(RTE_I2C7_DMA_EN) && RTE_I2C7_DMA_EN) || \
135 (defined(RTE_I2C8_DMA_EN) && RTE_I2C8_DMA_EN) || (defined(RTE_I2C9_DMA_EN) && RTE_I2C9_DMA_EN) || \
136 (defined(RTE_I2C10_DMA_EN) && RTE_I2C10_DMA_EN) || (defined(RTE_I2C11_DMA_EN) && RTE_I2C11_DMA_EN) || \
137 (defined(RTE_I2C12_DMA_EN) && RTE_I2C12_DMA_EN) || (defined(RTE_I2C13_DMA_EN) && RTE_I2C13_DMA_EN) || \
138 (defined(RTE_I2C14_DMA_EN) && RTE_I2C14_DMA_EN) || (defined(RTE_I2C15_DMA_EN) && RTE_I2C15_DMA_EN) || \
139 (defined(RTE_I2C16_DMA_EN) && RTE_I2C16_DMA_EN) || (defined(RTE_I2C17_DMA_EN) && RTE_I2C17_DMA_EN) || \
140 (defined(RTE_I2C18_DMA_EN) && RTE_I2C18_DMA_EN) || (defined(RTE_I2C19_DMA_EN) && RTE_I2C19_DMA_EN) || \
141 (defined(RTE_I2C20_DMA_EN) && RTE_I2C20_DMA_EN))
142
143 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
KSDK_LPI2C_MASTER_EdmaCallback(LPI2C_Type * base,lpi2c_master_edma_handle_t * handle,status_t status,void * userData)144 static void KSDK_LPI2C_MASTER_EdmaCallback(LPI2C_Type *base,
145 lpi2c_master_edma_handle_t *handle,
146 status_t status,
147 void *userData)
148 {
149 uint32_t event = 0;
150
151 /* Signal transfer success when received success status. */
152 if (status == kStatus_Success)
153 {
154 event = ARM_I2C_EVENT_TRANSFER_DONE;
155 }
156
157 if (userData != NULL)
158 {
159 ((ARM_I2C_SignalEvent_t)userData)(event);
160 }
161 }
162
LPI2C_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event,cmsis_lpi2c_edma_driver_state_t * lpi2c)163 static int32_t LPI2C_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event, cmsis_lpi2c_edma_driver_state_t *lpi2c)
164 {
165 if (0U == (lpi2c->flags & (uint8_t)I2C_FLAG_INIT))
166 {
167 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
168 /* TxDMAMUX init */
169 DMAMUX_SetSource(lpi2c->edmaResource->txDmamuxBase, lpi2c->edmaResource->txEdmaChannel,
170 (int32_t)lpi2c->edmaResource->txDmaRequest);
171 DMAMUX_EnableChannel(lpi2c->edmaResource->txDmamuxBase, lpi2c->edmaResource->txEdmaChannel);
172 /* RxDMAMUX init */
173 DMAMUX_SetSource(lpi2c->edmaResource->rxDmamuxBase, lpi2c->edmaResource->rxEdmaChannel,
174 (int32_t)lpi2c->edmaResource->rxDmaRequest);
175 DMAMUX_EnableChannel(lpi2c->edmaResource->rxDmamuxBase, lpi2c->edmaResource->rxEdmaChannel);
176 #endif
177 /* Create edmaTxHandle */
178 EDMA_CreateHandle(lpi2c->edmaTxHandle, lpi2c->edmaResource->txEdmaBase, lpi2c->edmaResource->txEdmaChannel);
179
180 /* Create edmaRxHandle */
181 EDMA_CreateHandle(lpi2c->edmaRxHandle, lpi2c->edmaResource->rxEdmaBase, lpi2c->edmaResource->rxEdmaChannel);
182
183 #if defined(FSL_FEATURE_EDMA_HAS_CHANNEL_MUX) && FSL_FEATURE_EDMA_HAS_CHANNEL_MUX
184 EDMA_SetChannelMux(lpi2c->edmaResource->txEdmaBase, lpi2c->edmaResource->txEdmaChannel,
185 (int32_t)lpi2c->edmaResource->txDmaRequest);
186 EDMA_SetChannelMux(lpi2c->edmaResource->rxEdmaBase, lpi2c->edmaResource->rxEdmaChannel,
187 (int32_t)lpi2c->edmaResource->rxDmaRequest);
188 #endif
189 /* Create master_edma_handle */
190 LPI2C_MasterCreateEDMAHandle(lpi2c->resource->base, lpi2c->master_edma_handle, lpi2c->edmaRxHandle,
191 lpi2c->edmaTxHandle, KSDK_LPI2C_MASTER_EdmaCallback, (void *)cb_event);
192
193 lpi2c->flags = (uint8_t)I2C_FLAG_INIT;
194 }
195
196 return ARM_DRIVER_OK;
197 }
198
LPI2C_Master_EdmaUninitialize(cmsis_lpi2c_edma_driver_state_t * lpi2c)199 static int32_t LPI2C_Master_EdmaUninitialize(cmsis_lpi2c_edma_driver_state_t *lpi2c)
200 {
201 lpi2c->flags = (uint8_t)I2C_FLAG_UNINIT;
202 return ARM_DRIVER_OK;
203 }
204
LPI2C_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending,cmsis_lpi2c_edma_driver_state_t * lpi2c)205 static int32_t LPI2C_Master_EdmaTransmit(
206 uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending, cmsis_lpi2c_edma_driver_state_t *lpi2c)
207 {
208 int32_t status;
209 int32_t ret;
210 lpi2c_master_transfer_t masterXfer;
211
212 /* Setup the master transfer */
213 masterXfer.slaveAddress = (uint16_t)addr;
214 masterXfer.direction = kLPI2C_Write;
215 masterXfer.subaddress = 0U;
216 masterXfer.subaddressSize = 0U;
217 masterXfer.data = (uint8_t *)data;
218 masterXfer.dataSize = num;
219 masterXfer.flags = (uint32_t)kLPI2C_TransferDefaultFlag;
220
221 if (xfer_pending)
222 {
223 /* Do not transfer stop */
224 masterXfer.flags |= (uint32_t)kLPI2C_TransferNoStopFlag;
225 }
226
227 /* Send master non-blocking data to slave */
228 status = LPI2C_MasterTransferEDMA(lpi2c->resource->base, lpi2c->master_edma_handle, &masterXfer);
229
230 switch (status)
231 {
232 case kStatus_Success:
233 ret = ARM_DRIVER_OK;
234 break;
235
236 case kStatus_LPI2C_Busy:
237 ret = ARM_DRIVER_ERROR_BUSY;
238 break;
239
240 default:
241 ret = ARM_DRIVER_ERROR;
242 break;
243 }
244
245 return ret;
246 }
247
LPI2C_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending,cmsis_lpi2c_edma_driver_state_t * lpi2c)248 static int32_t LPI2C_Master_EdmaReceive(
249 uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending, cmsis_lpi2c_edma_driver_state_t *lpi2c)
250 {
251 int32_t status;
252 int32_t ret;
253 lpi2c_master_transfer_t masterXfer;
254
255 /* Setup the master transfer */
256 masterXfer.slaveAddress = (uint16_t)addr;
257 masterXfer.direction = kLPI2C_Read;
258 masterXfer.subaddress = 0U;
259 masterXfer.subaddressSize = 0U;
260 masterXfer.data = data;
261 masterXfer.dataSize = num;
262 masterXfer.flags = (uint32_t)kLPI2C_TransferDefaultFlag;
263
264 if (xfer_pending)
265 {
266 masterXfer.flags |= (uint32_t)kLPI2C_TransferNoStopFlag;
267 }
268
269 /* Receive non-blocking data from slave */
270 status = LPI2C_MasterTransferEDMA(lpi2c->resource->base, lpi2c->master_edma_handle, &masterXfer);
271
272 switch (status)
273 {
274 case kStatus_Success:
275 ret = ARM_DRIVER_OK;
276 break;
277 case kStatus_LPI2C_Busy:
278 ret = ARM_DRIVER_ERROR_BUSY;
279 break;
280 default:
281 ret = ARM_DRIVER_ERROR;
282 break;
283 }
284
285 return ret;
286 }
287
LPI2C_Master_EdmaGetDataCount(cmsis_lpi2c_edma_driver_state_t * lpi2c)288 static int32_t LPI2C_Master_EdmaGetDataCount(cmsis_lpi2c_edma_driver_state_t *lpi2c)
289 {
290 size_t cnt;
291
292 (void)LPI2C_MasterTransferGetCountEDMA(lpi2c->resource->base, lpi2c->master_edma_handle, &cnt);
293
294 return (int32_t)cnt;
295 }
296
LPI2C_Master_EdmaControl(uint32_t control,uint32_t arg,cmsis_lpi2c_edma_driver_state_t * lpi2c)297 static int32_t LPI2C_Master_EdmaControl(uint32_t control, uint32_t arg, cmsis_lpi2c_edma_driver_state_t *lpi2c)
298 {
299 uint32_t baudRate_Bps;
300 int32_t result = ARM_DRIVER_OK;
301 switch (control)
302 {
303 /* Set Own Slave Address */
304 case ARM_I2C_OWN_ADDRESS:
305 result = ARM_DRIVER_ERROR_UNSUPPORTED;
306 break;
307
308 /* Set Bus Speed; arg = bus speed */
309 case ARM_I2C_BUS_SPEED:
310 switch (arg)
311 {
312 case ARM_I2C_BUS_SPEED_STANDARD:
313 baudRate_Bps = 100000;
314 break;
315
316 case ARM_I2C_BUS_SPEED_FAST:
317 baudRate_Bps = 400000;
318 break;
319
320 case ARM_I2C_BUS_SPEED_FAST_PLUS:
321 baudRate_Bps = 1000000;
322 break;
323
324 default:
325 result = ARM_DRIVER_ERROR_UNSUPPORTED;
326 break;
327 }
328
329 if (result != ARM_DRIVER_ERROR_UNSUPPORTED)
330 {
331 LPI2C_MasterSetBaudRate(lpi2c->resource->base, lpi2c->resource->GetFreq(), baudRate_Bps);
332 result = ARM_DRIVER_OK;
333 }
334
335 break;
336
337 /* Not supported. */
338 case ARM_I2C_BUS_CLEAR:
339 result = ARM_DRIVER_ERROR_UNSUPPORTED;
340 break;
341
342 /* Only support aborting data transfer when master transmit in master mode */
343 case ARM_I2C_ABORT_TRANSFER:
344
345 if ((lpi2c->resource->base->MDER & 0x3UL) == 0x3UL)
346 {
347 if (lpi2c->master_edma_handle->transfer.direction == kLPI2C_Write)
348 {
349 (void)LPI2C_MasterTransferAbortEDMA(lpi2c->resource->base, lpi2c->master_edma_handle);
350
351 lpi2c->master_edma_handle->transfer.data = NULL;
352 lpi2c->master_edma_handle->transfer.dataSize = 0;
353 }
354 }
355
356 result = ARM_DRIVER_OK;
357 break;
358
359 default:
360 result = ARM_DRIVER_ERROR_UNSUPPORTED;
361 break;
362 }
363 return result;
364 }
365
LPI2C_Master_EdmaPowerControl(ARM_POWER_STATE state,cmsis_lpi2c_edma_driver_state_t * lpi2c)366 static int32_t LPI2C_Master_EdmaPowerControl(ARM_POWER_STATE state, cmsis_lpi2c_edma_driver_state_t *lpi2c)
367 {
368 lpi2c_master_config_t masterConfig;
369 int32_t result = ARM_DRIVER_OK;
370
371 switch (state)
372 {
373 case ARM_POWER_OFF:
374 if ((lpi2c->flags & (uint8_t)I2C_FLAG_POWER) != 0U)
375 {
376 /* Terminates any pending data transfers */
377 (void)LPI2C_Master_EdmaControl(ARM_I2C_ABORT_TRANSFER, 0, lpi2c);
378
379 /* Disables peripheral */
380 LPI2C_MasterDeinit(lpi2c->resource->base);
381 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
382 /* Disable DMAMUX channel */
383 DMAMUX_DisableChannel(lpi2c->edmaResource->txDmamuxBase, lpi2c->edmaResource->txEdmaChannel);
384 DMAMUX_DisableChannel(lpi2c->edmaResource->rxDmamuxBase, lpi2c->edmaResource->rxEdmaChannel);
385 #endif
386 lpi2c->flags = (uint8_t)I2C_FLAG_INIT;
387 }
388 result = ARM_DRIVER_OK;
389 break;
390
391 case ARM_POWER_LOW:
392 result = ARM_DRIVER_ERROR_UNSUPPORTED;
393 break;
394
395 case ARM_POWER_FULL:
396 if (lpi2c->flags == (uint8_t)I2C_FLAG_UNINIT)
397 {
398 result = ARM_DRIVER_ERROR;
399 break;
400 }
401
402 if ((lpi2c->flags & (uint8_t)I2C_FLAG_POWER) != 0U)
403 {
404 /* Driver already powered */
405 break;
406 }
407
408 /*
409 * masterConfig.debugEnable = false;
410 * masterConfig.ignoreAck = false;
411 * masterConfig.pinConfig = kLPI2C_2PinOpenDrain;
412 * masterConfig.baudRate_Hz = 100000U;
413 * masterConfig.busIdleTimeout_ns = 0;
414 * masterConfig.pinLowTimeout_ns = 0;
415 * masterConfig.sdaGlitchFilterWidth_ns = 0;
416 * masterConfig.sclGlitchFilterWidth_ns = 0;
417 */
418 LPI2C_MasterGetDefaultConfig(&masterConfig);
419
420 /* Initialize the LPI2C master peripheral */
421 LPI2C_MasterInit(lpi2c->resource->base, &masterConfig, lpi2c->resource->GetFreq());
422
423 lpi2c->flags |= (uint8_t)I2C_FLAG_POWER;
424
425 result = ARM_DRIVER_OK;
426 break;
427
428 default:
429 result = ARM_DRIVER_ERROR_UNSUPPORTED;
430 break;
431 }
432 return result;
433 }
434
LPI2C_Master_EdmaGetStatus(cmsis_lpi2c_edma_driver_state_t * lpi2c)435 static ARM_I2C_STATUS LPI2C_Master_EdmaGetStatus(cmsis_lpi2c_edma_driver_state_t *lpi2c)
436 {
437 ARM_I2C_STATUS stat = {0};
438 uint32_t ksdk_lpi2c_master_status = LPI2C_MasterGetStatusFlags(lpi2c->resource->base);
439
440 stat.busy = (uint32_t)((ksdk_lpi2c_master_status & (uint32_t)kLPI2C_MasterBusyFlag) != 0U); /* Busy flag */
441 stat.mode = 1; /* Mode: 0=Slave, 1=Master */
442 stat.direction = (uint32_t)lpi2c->master_edma_handle->transfer.direction; /* Direction: 0=Transmitter, 1=Receiver */
443 stat.arbitration_lost = (uint32_t)((ksdk_lpi2c_master_status & (uint32_t)kLPI2C_MasterArbitrationLostFlag) !=
444 0U); /* Master lost arbitration */
445
446 return stat;
447 }
448 #endif
449
450 #endif
451
452 #if ((defined(RTE_I2C0) && RTE_I2C0 && !RTE_I2C0_DMA_EN) || (defined(RTE_I2C1) && RTE_I2C1 && !RTE_I2C1_DMA_EN) || \
453 (defined(RTE_I2C2) && RTE_I2C2 && !RTE_I2C2_DMA_EN) || (defined(RTE_I2C3) && RTE_I2C3 && !RTE_I2C3_DMA_EN) || \
454 (defined(RTE_I2C4) && RTE_I2C4 && !RTE_I2C4_DMA_EN) || (defined(RTE_I2C5) && RTE_I2C5 && !RTE_I2C5_DMA_EN) || \
455 (defined(RTE_I2C6) && RTE_I2C6 && !RTE_I2C6_DMA_EN) || (defined(RTE_I2C7) && RTE_I2C7 && !RTE_I2C7_DMA_EN) || \
456 (defined(RTE_I2C8) && RTE_I2C8 && !RTE_I2C8_DMA_EN) || (defined(RTE_I2C9) && RTE_I2C9 && !RTE_I2C9_DMA_EN) || \
457 (defined(RTE_I2C10) && RTE_I2C10 && !RTE_I2C10_DMA_EN) || \
458 (defined(RTE_I2C11) && RTE_I2C11 && !RTE_I2C11_DMA_EN) || \
459 (defined(RTE_I2C12) && RTE_I2C12 && !RTE_I2C12_DMA_EN) || \
460 (defined(RTE_I2C13) && RTE_I2C13 && !RTE_I2C13_DMA_EN) || \
461 (defined(RTE_I2C14) && RTE_I2C14 && !RTE_I2C14_DMA_EN) || \
462 (defined(RTE_I2C15) && RTE_I2C15 && !RTE_I2C15_DMA_EN) || \
463 (defined(RTE_I2C16) && RTE_I2C16 && !RTE_I2C16_DMA_EN) || \
464 (defined(RTE_I2C17) && RTE_I2C17 && !RTE_I2C17_DMA_EN) || \
465 (defined(RTE_I2C18) && RTE_I2C18 && !RTE_I2C18_DMA_EN) || \
466 (defined(RTE_I2C19) && RTE_I2C19 && !RTE_I2C19_DMA_EN) || (defined(RTE_I2C20) && RTE_I2C20 && !RTE_I2C20_DMA_EN))
467
KSDK_LPI2C_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData,cmsis_lpi2c_interrupt_driver_state_t * lpi2c)468 static void KSDK_LPI2C_SLAVE_InterruptCallback(LPI2C_Type *base,
469 lpi2c_slave_transfer_t *xfer,
470 void *userData,
471 cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
472 {
473 uint32_t event = 0;
474
475 switch (xfer->event)
476 {
477 /* Transfer done */
478 case kLPI2C_SlaveCompletionEvent:
479 event = ARM_I2C_EVENT_TRANSFER_DONE;
480 break;
481
482 /* Setup the slave receive buffer */
483 case kLPI2C_SlaveReceiveEvent:
484 xfer->data = lpi2c->slave_data;
485 xfer->dataSize = lpi2c->slave_dataSize;
486 break;
487
488 /* Setup the slave transmit buffer */
489 case kLPI2C_SlaveTransmitEvent:
490 xfer->data = lpi2c->slave_data;
491 xfer->dataSize = lpi2c->slave_dataSize;
492 break;
493
494 default:
495 event = ARM_I2C_EVENT_TRANSFER_INCOMPLETE;
496 break;
497 }
498
499 if (userData != NULL)
500 {
501 ((ARM_I2C_SignalEvent_t)userData)(event);
502 }
503 }
504
KSDK_LPI2C_MASTER_InterruptCallback(LPI2C_Type * base,lpi2c_master_handle_t * handle,status_t status,void * userData)505 static void KSDK_LPI2C_MASTER_InterruptCallback(LPI2C_Type *base,
506 lpi2c_master_handle_t *handle,
507 status_t status,
508 void *userData)
509 {
510 uint32_t event = 0;
511
512 /* Signal transfer success when received success status. */
513 switch (status)
514 {
515 /* Transfer done */
516 case kStatus_Success:
517 event = ARM_I2C_EVENT_TRANSFER_DONE;
518 break;
519
520 /* Occurs in master mode when arbitration is lost */
521 case kStatus_LPI2C_ArbitrationLost:
522 event = ARM_I2C_EVENT_ARBITRATION_LOST;
523 break;
524
525 default:
526 event = ARM_I2C_EVENT_TRANSFER_INCOMPLETE;
527 break;
528 }
529
530 if (userData != NULL)
531 {
532 ((ARM_I2C_SignalEvent_t)userData)(event);
533 }
534 }
535
LPI2C_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event,cmsis_lpi2c_interrupt_driver_state_t * lpi2c)536 static int32_t LPI2C_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
537 {
538 if (0U == (lpi2c->flags & (uint8_t)I2C_FLAG_INIT))
539 {
540 lpi2c->cb_event = cb_event; /* Call back function */
541 lpi2c->flags = (uint8_t)I2C_FLAG_INIT;
542 }
543
544 return ARM_DRIVER_OK;
545 }
546
LPI2C_InterruptUninitialize(cmsis_lpi2c_interrupt_driver_state_t * lpi2c)547 static int32_t LPI2C_InterruptUninitialize(cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
548 {
549 lpi2c->flags = (uint8_t)I2C_FLAG_UNINIT;
550 return ARM_DRIVER_OK;
551 }
552
LPI2C_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending,cmsis_lpi2c_interrupt_driver_state_t * lpi2c)553 static int32_t LPI2C_Master_InterruptTransmit(
554 uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
555 {
556 int32_t status;
557 int32_t ret;
558 lpi2c_master_transfer_t masterXfer;
559
560 if (lpi2c->handle->master_handle.state != 0U)
561 {
562 return ARM_DRIVER_ERROR_BUSY; /* Master is busy */
563 }
564
565 /* Create master_handle */
566 LPI2C_MasterTransferCreateHandle(lpi2c->resource->base, &(lpi2c->handle->master_handle),
567 KSDK_LPI2C_MASTER_InterruptCallback, (void *)lpi2c->cb_event);
568
569 /* Setup the master transfer */
570 masterXfer.slaveAddress = (uint16_t)addr;
571 masterXfer.direction = kLPI2C_Write;
572 masterXfer.subaddress = 0U;
573 masterXfer.subaddressSize = 0U;
574 masterXfer.data = (uint8_t *)data;
575 masterXfer.dataSize = num;
576 masterXfer.flags = (uint32_t)kLPI2C_TransferDefaultFlag;
577
578 if (xfer_pending)
579 {
580 /* Stop condition will not be generated */
581 masterXfer.flags |= (uint32_t)kLPI2C_TransferNoStopFlag;
582 }
583
584 /* Send master non-blocking data to slave */
585 status = LPI2C_MasterTransferNonBlocking(lpi2c->resource->base, &(lpi2c->handle->master_handle), &masterXfer);
586
587 switch (status)
588 {
589 case kStatus_Success:
590 ret = ARM_DRIVER_OK;
591 break;
592
593 case kStatus_LPI2C_Busy:
594 ret = ARM_DRIVER_ERROR_BUSY;
595 break;
596
597 default:
598 ret = ARM_DRIVER_ERROR;
599 break;
600 }
601
602 return ret;
603 }
604
LPI2C_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending,cmsis_lpi2c_interrupt_driver_state_t * lpi2c)605 static int32_t LPI2C_Master_InterruptReceive(
606 uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
607 {
608 int32_t status;
609 int32_t ret;
610 lpi2c_master_transfer_t masterXfer;
611
612 if (lpi2c->handle->master_handle.state != 0U)
613 {
614 /* Master is busy */
615 return ARM_DRIVER_ERROR_BUSY;
616 }
617
618 /* Create master_handle */
619 LPI2C_MasterTransferCreateHandle(lpi2c->resource->base, &(lpi2c->handle->master_handle),
620 KSDK_LPI2C_MASTER_InterruptCallback, (void *)lpi2c->cb_event);
621
622 /* Setup the master transfer */
623 masterXfer.slaveAddress = (uint16_t)addr;
624 masterXfer.direction = kLPI2C_Read;
625 masterXfer.subaddress = 0U;
626 masterXfer.subaddressSize = 0U;
627 masterXfer.data = data;
628 masterXfer.dataSize = num;
629 masterXfer.flags = (uint32_t)kLPI2C_TransferDefaultFlag;
630
631 if (xfer_pending)
632 {
633 /* Stop condition will not be generated */
634 masterXfer.flags |= (uint32_t)kLPI2C_TransferNoStopFlag;
635 }
636
637 /* Receive non-blocking data from slave */
638 status = LPI2C_MasterTransferNonBlocking(lpi2c->resource->base, &(lpi2c->handle->master_handle), &masterXfer);
639
640 switch (status)
641 {
642 case kStatus_Success:
643 ret = ARM_DRIVER_OK;
644 break;
645
646 case kStatus_LPI2C_Busy:
647 ret = ARM_DRIVER_ERROR_BUSY;
648 break;
649
650 default:
651 ret = ARM_DRIVER_ERROR;
652 break;
653 }
654
655 return ret;
656 }
657
LPI2C_Slave_InterruptTransmit(const uint8_t * data,uint32_t num,cmsis_lpi2c_interrupt_driver_state_t * lpi2c)658 static int32_t LPI2C_Slave_InterruptTransmit(const uint8_t *data,
659 uint32_t num,
660 cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
661 {
662 int32_t status;
663 int32_t ret;
664
665 /* Create slave_handle */
666 LPI2C_SlaveTransferCreateHandle(lpi2c->resource->base, &(lpi2c->handle->slave_handle),
667 lpi2c->handle->slave_handle.callback, (void *)lpi2c->cb_event);
668
669 /* Slave send Nonblocking data to master */
670 status = LPI2C_SlaveTransferNonBlocking(lpi2c->resource->base, &(lpi2c->handle->slave_handle),
671 (uint32_t)kLPI2C_SlaveCompletionEvent);
672
673 lpi2c->slave_data = (uint8_t *)data; /*!< slave Transfer buffer */
674 lpi2c->slave_dataSize = num; /*!< slave Transfer data size */
675 lpi2c->handle->slave_handle.transferredCount = 0U; /*!< slave Transfered data count */
676
677 switch (status)
678 {
679 case kStatus_Success:
680 ret = ARM_DRIVER_OK;
681 break;
682
683 case kStatus_LPI2C_Busy:
684 ret = ARM_DRIVER_ERROR_BUSY;
685 break;
686
687 default:
688 ret = ARM_DRIVER_ERROR;
689 break;
690 }
691
692 return ret;
693 }
694
LPI2C_Slave_InterruptReceive(uint8_t * data,uint32_t num,cmsis_lpi2c_interrupt_driver_state_t * lpi2c)695 static int32_t LPI2C_Slave_InterruptReceive(uint8_t *data, uint32_t num, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
696 {
697 int32_t status;
698 int32_t ret;
699
700 /* Create slave_handle */
701 LPI2C_SlaveTransferCreateHandle(lpi2c->resource->base, &(lpi2c->handle->slave_handle),
702 lpi2c->handle->slave_handle.callback, (void *)lpi2c->cb_event);
703
704 /* Slave receive Nonblocking data from master */
705 status = LPI2C_SlaveTransferNonBlocking(lpi2c->resource->base, &(lpi2c->handle->slave_handle),
706 (uint32_t)kLPI2C_SlaveCompletionEvent);
707
708 lpi2c->slave_data = data; /*!< slave Transfer buffer */
709 lpi2c->slave_dataSize = num; /*!< slave Transfer data size */
710 lpi2c->handle->slave_handle.transferredCount = 0U; /*!< slave Transfered data count */
711
712 switch (status)
713 {
714 case kStatus_Success:
715 ret = ARM_DRIVER_OK;
716 break;
717
718 case kStatus_LPI2C_Busy:
719 ret = ARM_DRIVER_ERROR_BUSY;
720 break;
721
722 default:
723 ret = ARM_DRIVER_ERROR;
724 break;
725 }
726
727 return ret;
728 }
729
LPI2C_InterruptGetDataCount(cmsis_lpi2c_interrupt_driver_state_t * lpi2c)730 static int32_t LPI2C_InterruptGetDataCount(cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
731 {
732 size_t cnt;
733
734 if ((lpi2c->resource->base->SIER & (uint32_t)kLPI2C_SlaveIrqFlags) == (uint32_t)kLPI2C_SlaveIrqFlags)
735 {
736 /* In slave mode */
737 (void)LPI2C_SlaveTransferGetCount(lpi2c->resource->base, &lpi2c->handle->slave_handle, &cnt);
738 }
739 else
740 {
741 /* In master mode */
742 (void)LPI2C_MasterTransferGetCount(lpi2c->resource->base, &lpi2c->handle->master_handle, &cnt);
743 }
744 return (int32_t)cnt;
745 }
746
LPI2C_InterruptControl(uint32_t control,uint32_t arg,cmsis_lpi2c_interrupt_driver_state_t * lpi2c)747 static int32_t LPI2C_InterruptControl(uint32_t control, uint32_t arg, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
748 {
749 uint32_t baudRate_Bps;
750 int32_t result = ARM_DRIVER_OK;
751
752 switch (control)
753 {
754 case ARM_I2C_OWN_ADDRESS:
755 /* Set Own Slave Address */
756 lpi2c->resource->base->SAMR = (arg << 1U);
757 break;
758
759 case ARM_I2C_BUS_SPEED:
760 /* Set Bus Speed */
761 switch (arg)
762 {
763 case ARM_I2C_BUS_SPEED_STANDARD:
764 baudRate_Bps = 100000;
765 break;
766
767 case ARM_I2C_BUS_SPEED_FAST:
768 baudRate_Bps = 400000;
769 break;
770
771 case ARM_I2C_BUS_SPEED_FAST_PLUS:
772 baudRate_Bps = 1000000;
773 break;
774
775 default:
776 result = ARM_DRIVER_ERROR_UNSUPPORTED;
777 break;
778 }
779
780 if (result == ARM_DRIVER_OK)
781 {
782 LPI2C_MasterSetBaudRate(lpi2c->resource->base, lpi2c->resource->GetFreq(), baudRate_Bps);
783 }
784
785 break;
786
787 /* Not supported. */
788 case ARM_I2C_BUS_CLEAR:
789 result = ARM_DRIVER_ERROR_UNSUPPORTED;
790 break;
791
792 /* Only support aborting data transfer when master transmit(in master mode) or slave receive(in slave mode) */
793 case ARM_I2C_ABORT_TRANSFER:
794 /* Abort data transfer when slave receive(in slave mode) */
795 if ((lpi2c->resource->base->SIER & (uint32_t)kLPI2C_SlaveIrqFlags) == (uint32_t)kLPI2C_SlaveIrqFlags)
796 {
797 /* Disable slave mode */
798 lpi2c->resource->base->SCR = 0U;
799
800 /* Diable slave interrupt */
801 LPI2C_SlaveTransferAbort(lpi2c->resource->base, &(lpi2c->handle->slave_handle));
802
803 /* Enable slave mode */
804 lpi2c->resource->base->SCR = 0x31U;
805 }
806
807 /* Bort data transfer when master transmit abort(in master mode) */
808 if ((lpi2c->resource->base->MIER & (uint32_t)kLPI2C_MasterIrqFlags) == (uint32_t)kLPI2C_MasterIrqFlags)
809 {
810 /* Disable master interrupt and send stop */
811 LPI2C_MasterTransferAbort(lpi2c->resource->base, &(lpi2c->handle->master_handle));
812
813 lpi2c->handle->master_handle.remainingBytes = 0;
814 lpi2c->handle->master_handle.transfer.data = NULL;
815 lpi2c->handle->master_handle.transfer.dataSize = 0;
816 }
817
818 result = ARM_DRIVER_OK;
819 break;
820
821 default:
822 result = ARM_DRIVER_ERROR_UNSUPPORTED;
823 break;
824 }
825 return result;
826 }
827
LPI2C_InterruptPowerControl(ARM_POWER_STATE state,cmsis_lpi2c_interrupt_driver_state_t * lpi2c)828 static int32_t LPI2C_InterruptPowerControl(ARM_POWER_STATE state, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
829 {
830 int32_t result = ARM_DRIVER_OK;
831 lpi2c_slave_config_t slaveConfig;
832 lpi2c_master_config_t masterConfig;
833 switch (state)
834 {
835 case ARM_POWER_OFF:
836 if ((lpi2c->flags & (uint8_t)I2C_FLAG_POWER) != 0U)
837 {
838 /* Terminates any pending data transfers */
839 (void)LPI2C_InterruptControl(ARM_I2C_ABORT_TRANSFER, 0, lpi2c);
840
841 /* Disables peripheral */
842 LPI2C_MasterDeinit(lpi2c->resource->base);
843 lpi2c->flags = (uint8_t)I2C_FLAG_INIT;
844 }
845 break;
846
847 case ARM_POWER_LOW:
848 result = ARM_DRIVER_ERROR_UNSUPPORTED;
849 break;
850
851 case ARM_POWER_FULL:
852
853 if (lpi2c->flags == (uint8_t)I2C_FLAG_UNINIT)
854 {
855 result = ARM_DRIVER_ERROR;
856 break;
857 }
858
859 if ((lpi2c->flags & (uint8_t)I2C_FLAG_POWER) != 0U)
860 {
861 /* Driver already powered */
862 break;
863 }
864
865 /*
866 * slaveConfig.address0 = 0U;
867 * slaveConfig.address1 = 0U;
868 * slaveConfig.addressMatchMode = kLPI2C_MatchAddress0;
869 * slaveConfig.filterDozeEnable = true;
870 * slaveConfig.filterEnable = true;
871 * slaveConfig.enableGeneralCall = false;
872 * slaveConfig.ignoreAck = false;
873 * slaveConfig.enableReceivedAddressRead = false;
874 * slaveConfig.sdaGlitchFilterWidth_ns = 0;
875 * slaveConfig.sclGlitchFilterWidth_ns = 0;
876 * slaveConfig.dataValidDelay_ns = 0;
877 * slaveConfig.clockHoldTime_ns = 0;
878 */
879 LPI2C_SlaveGetDefaultConfig(&slaveConfig);
880
881 /* Initialize the LPI2C slave peripheral */
882 LPI2C_SlaveInit(lpi2c->resource->base, &slaveConfig, lpi2c->resource->GetFreq());
883
884 /*
885 * masterConfig.debugEnable = false;
886 * masterConfig.ignoreAck = false;
887 * masterConfig.pinConfig = kLPI2C_2PinOpenDrain;
888 * masterConfig.baudRate_Hz = 100000U;
889 * masterConfig.busIdleTimeout_ns = 0;
890 * masterConfig.pinLowTimeout_ns = 0;
891 * masterConfig.sdaGlitchFilterWidth_ns = 0;
892 * masterConfig.sclGlitchFilterWidth_ns = 0;
893 */
894 LPI2C_MasterGetDefaultConfig(&masterConfig);
895
896 /* Initialize the LPI2C master peripheral */
897 LPI2C_MasterInit(lpi2c->resource->base, &masterConfig, lpi2c->resource->GetFreq());
898
899 lpi2c->flags |= (uint8_t)I2C_FLAG_POWER;
900
901 break;
902
903 default:
904 result = ARM_DRIVER_ERROR_UNSUPPORTED;
905 break;
906 }
907
908 return result;
909 }
910
LPI2C_InterruptGetStatus(cmsis_lpi2c_interrupt_driver_state_t * lpi2c)911 static ARM_I2C_STATUS LPI2C_InterruptGetStatus(cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
912 {
913 ARM_I2C_STATUS stat = {0};
914 uint32_t ksdk_lpi2c_master_status = LPI2C_MasterGetStatusFlags(lpi2c->resource->base);
915 uint32_t ksdk_lpi2c_slave_status = LPI2C_SlaveGetStatusFlags(lpi2c->resource->base);
916
917 /* Busy flag */
918 stat.busy = (uint32_t)(((ksdk_lpi2c_master_status & (uint32_t)kLPI2C_MasterBusyFlag) != 0U) ||
919 ((ksdk_lpi2c_slave_status & (uint32_t)kLPI2C_SlaveBusyFlag) != 0U));
920
921 /* Mode: 0=Slave, 1=Master */
922 if ((lpi2c->resource->base->SIER & (uint32_t)kLPI2C_SlaveIrqFlags) == (uint32_t)kLPI2C_SlaveIrqFlags)
923 {
924 stat.mode = 0UL;
925 }
926 else
927 {
928 stat.mode = 1UL;
929 }
930
931 /* Direction: 0=Transmitter, 1=Receiver */
932 stat.direction = (uint32_t)lpi2c->handle->master_handle.transfer.direction;
933
934 /* Master lost arbitration */
935 stat.arbitration_lost = (uint32_t)((ksdk_lpi2c_master_status & (uint32_t)kLPI2C_MasterArbitrationLostFlag) != 0U);
936
937 return stat;
938 }
939
940 #endif
941
942 #if defined(LPI2C0) && defined(RTE_I2C0) && RTE_I2C0
943 /* User needs to provide the implementation for LPI2C0_GetFreq/InitPins/DeinitPins
944 in the application for enabling according instance. */
945 extern uint32_t LPI2C0_GetFreq(void);
946
947 static cmsis_lpi2c_resource_t LPI2C0_Resource = {LPI2C0, LPI2C0_GetFreq};
948
949 #if defined(RTE_I2C0_DMA_EN) && RTE_I2C0_DMA_EN
950
951 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
952 static cmsis_lpi2c_edma_resource_t LPI2C0_EdmaResource = {
953 RTE_I2C0_DMA_TX_DMA_BASE, RTE_I2C0_DMA_TX_CH, (uint16_t)RTE_I2C0_DMA_TX_PERI_SEL,
954 RTE_I2C0_DMA_RX_DMA_BASE, RTE_I2C0_DMA_RX_CH, (uint16_t)RTE_I2C0_DMA_RX_PERI_SEL,
955 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
956 RTE_I2C0_DMA_TX_DMAMUX_BASE, RTE_I2C0_DMA_RX_DMAMUX_BASE,
957 #endif
958 };
959
960 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C0_EdmaHandle);
961 static edma_handle_t LPI2C0_EdmaTxHandle;
962 static edma_handle_t LPI2C0_EdmaRxHandle;
963
964 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
965 ARMCC_SECTION("lpi2c0_edma_driver_state")
966 static cmsis_lpi2c_edma_driver_state_t LPI2C0_EdmaDriverState = {
967 #else
968 static cmsis_lpi2c_edma_driver_state_t LPI2C0_EdmaDriverState = {
969 #endif
970 &LPI2C0_Resource, &LPI2C0_EdmaResource, &LPI2C0_EdmaHandle, &LPI2C0_EdmaTxHandle, &LPI2C0_EdmaRxHandle,
971 };
972
LPI2C0_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)973 static int32_t LPI2C0_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
974 {
975 #ifdef RTE_I2C0_PIN_INIT
976 RTE_I2C0_PIN_INIT();
977 #endif
978 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C0_EdmaDriverState);
979 }
980
LPI2C0_Master_EdmaUninitialize(void)981 static int32_t LPI2C0_Master_EdmaUninitialize(void)
982 {
983 #ifdef RTE_I2C0_PIN_DEINIT
984 RTE_I2C0_PIN_DEINIT();
985 #endif
986 return LPI2C_Master_EdmaUninitialize(&LPI2C0_EdmaDriverState);
987 }
988
LPI2C0_Master_EdmaPowerControl(ARM_POWER_STATE state)989 static int32_t LPI2C0_Master_EdmaPowerControl(ARM_POWER_STATE state)
990 {
991 return LPI2C_Master_EdmaPowerControl(state, &LPI2C0_EdmaDriverState);
992 }
993
LPI2C0_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)994 static int32_t LPI2C0_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
995 {
996 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C0_EdmaDriverState);
997 }
998
LPI2C0_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)999 static int32_t LPI2C0_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
1000 {
1001 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C0_EdmaDriverState);
1002 }
1003
LPI2C0_Master_EdmaGetDataCount(void)1004 static int32_t LPI2C0_Master_EdmaGetDataCount(void)
1005 {
1006 return LPI2C_Master_EdmaGetDataCount(&LPI2C0_EdmaDriverState);
1007 }
1008
LPI2C0_Master_EdmaControl(uint32_t control,uint32_t arg)1009 static int32_t LPI2C0_Master_EdmaControl(uint32_t control, uint32_t arg)
1010 {
1011 return LPI2C_Master_EdmaControl(control, arg, &LPI2C0_EdmaDriverState);
1012 }
1013
LPI2C0_Master_EdmaGetStatus(void)1014 static ARM_I2C_STATUS LPI2C0_Master_EdmaGetStatus(void)
1015 {
1016 return LPI2C_Master_EdmaGetStatus(&LPI2C0_EdmaDriverState);
1017 }
1018
1019 #endif
1020
1021 #else
1022
1023 static cmsis_i2c_handle_t LPI2C0_Handle;
1024
1025 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1026 ARMCC_SECTION("lpi2c0_interrupt_driver_state")
1027 static cmsis_lpi2c_interrupt_driver_state_t LPI2C0_InterruptDriverState = {
1028 #else
1029 static cmsis_lpi2c_interrupt_driver_state_t LPI2C0_InterruptDriverState = {
1030 #endif
1031 &LPI2C0_Resource,
1032 &LPI2C0_Handle,
1033 };
1034
KSDK_LPI2C0_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)1035 static void KSDK_LPI2C0_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
1036 {
1037 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C0_InterruptDriverState);
1038 }
1039
LPI2C0_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)1040 static int32_t LPI2C0_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
1041 {
1042 #ifdef RTE_I2C0_PIN_INIT
1043 RTE_I2C0_PIN_INIT();
1044 #endif
1045 return LPI2C_InterruptInitialize(cb_event, &LPI2C0_InterruptDriverState);
1046 }
1047
LPI2C0_InterruptUninitialize(void)1048 static int32_t LPI2C0_InterruptUninitialize(void)
1049 {
1050 #ifdef RTE_I2C0_PIN_DEINIT
1051 RTE_I2C0_PIN_DEINIT();
1052 #endif
1053 return LPI2C_InterruptUninitialize(&LPI2C0_InterruptDriverState);
1054 }
1055
LPI2C0_InterruptPowerControl(ARM_POWER_STATE state)1056 static int32_t LPI2C0_InterruptPowerControl(ARM_POWER_STATE state)
1057 {
1058 return LPI2C_InterruptPowerControl(state, &LPI2C0_InterruptDriverState);
1059 }
1060
LPI2C0_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)1061 static int32_t LPI2C0_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
1062 {
1063 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C0_InterruptDriverState);
1064 }
1065
LPI2C0_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)1066 static int32_t LPI2C0_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
1067 {
1068 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C0_InterruptDriverState);
1069 }
1070
LPI2C0_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)1071 static int32_t LPI2C0_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
1072 {
1073 LPI2C0_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C0_SLAVE_InterruptCallback;
1074 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C0_InterruptDriverState);
1075 }
1076
LPI2C0_Slave_InterruptReceive(uint8_t * data,uint32_t num)1077 static int32_t LPI2C0_Slave_InterruptReceive(uint8_t *data, uint32_t num)
1078 {
1079 LPI2C0_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C0_SLAVE_InterruptCallback;
1080 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C0_InterruptDriverState);
1081 }
1082
LPI2C0_InterruptGetDataCount(void)1083 static int32_t LPI2C0_InterruptGetDataCount(void)
1084 {
1085 return LPI2C_InterruptGetDataCount(&LPI2C0_InterruptDriverState);
1086 }
1087
LPI2C0_InterruptControl(uint32_t control,uint32_t arg)1088 static int32_t LPI2C0_InterruptControl(uint32_t control, uint32_t arg)
1089 {
1090 return LPI2C_InterruptControl(control, arg, &LPI2C0_InterruptDriverState);
1091 }
1092
LPI2C0_InterruptGetStatus(void)1093 static ARM_I2C_STATUS LPI2C0_InterruptGetStatus(void)
1094 {
1095 return LPI2C_InterruptGetStatus(&LPI2C0_InterruptDriverState);
1096 }
1097
1098 #endif /* RTE_I2C0_DMA_EN */
1099
1100 ARM_DRIVER_I2C Driver_I2C0 = {LPI2Cx_GetVersion,
1101 LPI2Cx_GetCapabilities,
1102 #if defined(RTE_I2C0_DMA_EN) && RTE_I2C0_DMA_EN
1103 LPI2C0_Master_EdmaInitialize,
1104 LPI2C0_Master_EdmaUninitialize,
1105 LPI2C0_Master_EdmaPowerControl,
1106 LPI2C0_Master_EdmaTransmit,
1107 LPI2C0_Master_EdmaReceive,
1108 NULL,
1109 NULL,
1110 LPI2C0_Master_EdmaGetDataCount,
1111 LPI2C0_Master_EdmaControl,
1112 LPI2C0_Master_EdmaGetStatus
1113 #else
1114 LPI2C0_InterruptInitialize,
1115 LPI2C0_InterruptUninitialize,
1116 LPI2C0_InterruptPowerControl,
1117 LPI2C0_Master_InterruptTransmit,
1118 LPI2C0_Master_InterruptReceive,
1119 LPI2C0_Slave_InterruptTransmit,
1120 LPI2C0_Slave_InterruptReceive,
1121 LPI2C0_InterruptGetDataCount,
1122 LPI2C0_InterruptControl,
1123 LPI2C0_InterruptGetStatus
1124 #endif /* RTE_I2C0_DMA_EN */
1125 };
1126
1127 #endif /* LPI2C0 */
1128
1129 #if defined(LPI2C1) && defined(RTE_I2C1) && RTE_I2C1
1130 /* User needs to provide the implementation for LPI2C1_GetFreq/InitPins/DeinitPins
1131 in the application for enabling according instance. */
1132 extern uint32_t LPI2C1_GetFreq(void);
1133
1134 static cmsis_lpi2c_resource_t LPI2C1_Resource = {LPI2C1, LPI2C1_GetFreq};
1135
1136 #if defined(RTE_I2C1_DMA_EN) && RTE_I2C1_DMA_EN
1137
1138 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
1139 static cmsis_lpi2c_edma_resource_t LPI2C1_EdmaResource = {
1140 RTE_I2C1_DMA_TX_DMA_BASE, RTE_I2C1_DMA_TX_CH, (uint16_t)RTE_I2C1_DMA_TX_PERI_SEL,
1141 RTE_I2C1_DMA_RX_DMA_BASE, RTE_I2C1_DMA_RX_CH, (uint16_t)RTE_I2C1_DMA_RX_PERI_SEL,
1142 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
1143 RTE_I2C1_DMA_TX_DMAMUX_BASE, RTE_I2C1_DMA_RX_DMAMUX_BASE,
1144 #endif
1145 };
1146
1147 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C1_EdmaHandle);
1148 static edma_handle_t LPI2C1_EdmaTxHandle;
1149 static edma_handle_t LPI2C1_EdmaRxHandle;
1150
1151 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1152 ARMCC_SECTION("lpi2c1_edma_driver_state")
1153 static cmsis_lpi2c_edma_driver_state_t LPI2C1_EdmaDriverState = {
1154 #else
1155 static cmsis_lpi2c_edma_driver_state_t LPI2C1_EdmaDriverState = {
1156 #endif
1157 &LPI2C1_Resource, &LPI2C1_EdmaResource, &LPI2C1_EdmaHandle, &LPI2C1_EdmaTxHandle, &LPI2C1_EdmaRxHandle,
1158 };
1159
LPI2C1_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)1160 static int32_t LPI2C1_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
1161 {
1162 #ifdef RTE_I2C1_PIN_INIT
1163 RTE_I2C1_PIN_INIT();
1164 #endif
1165 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C1_EdmaDriverState);
1166 }
1167
LPI2C1_Master_EdmaUninitialize(void)1168 static int32_t LPI2C1_Master_EdmaUninitialize(void)
1169 {
1170 #ifdef RTE_I2C1_PIN_DEINIT
1171 RTE_I2C1_PIN_DEINIT();
1172 #endif
1173 return LPI2C_Master_EdmaUninitialize(&LPI2C1_EdmaDriverState);
1174 }
1175
LPI2C1_Master_EdmaPowerControl(ARM_POWER_STATE state)1176 static int32_t LPI2C1_Master_EdmaPowerControl(ARM_POWER_STATE state)
1177 {
1178 return LPI2C_Master_EdmaPowerControl(state, &LPI2C1_EdmaDriverState);
1179 }
1180
LPI2C1_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)1181 static int32_t LPI2C1_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
1182 {
1183 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C1_EdmaDriverState);
1184 }
1185
LPI2C1_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)1186 static int32_t LPI2C1_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
1187 {
1188 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C1_EdmaDriverState);
1189 }
1190
LPI2C1_Master_EdmaGetDataCount(void)1191 static int32_t LPI2C1_Master_EdmaGetDataCount(void)
1192 {
1193 return LPI2C_Master_EdmaGetDataCount(&LPI2C1_EdmaDriverState);
1194 }
1195
LPI2C1_Master_EdmaControl(uint32_t control,uint32_t arg)1196 static int32_t LPI2C1_Master_EdmaControl(uint32_t control, uint32_t arg)
1197 {
1198 return LPI2C_Master_EdmaControl(control, arg, &LPI2C1_EdmaDriverState);
1199 }
1200
LPI2C1_Master_EdmaGetStatus(void)1201 static ARM_I2C_STATUS LPI2C1_Master_EdmaGetStatus(void)
1202 {
1203 return LPI2C_Master_EdmaGetStatus(&LPI2C1_EdmaDriverState);
1204 }
1205
1206 #endif
1207
1208 #else
1209
1210 static cmsis_i2c_handle_t LPI2C1_Handle;
1211
1212 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1213 ARMCC_SECTION("lpi2c1_interrupt_driver_state")
1214 static cmsis_lpi2c_interrupt_driver_state_t LPI2C1_InterruptDriverState = {
1215 #else
1216 static cmsis_lpi2c_interrupt_driver_state_t LPI2C1_InterruptDriverState = {
1217 #endif
1218 &LPI2C1_Resource,
1219 &LPI2C1_Handle,
1220 };
1221
KSDK_LPI2C1_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)1222 static void KSDK_LPI2C1_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
1223 {
1224 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C1_InterruptDriverState);
1225 }
1226
LPI2C1_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)1227 static int32_t LPI2C1_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
1228 {
1229 #ifdef RTE_I2C1_PIN_INIT
1230 RTE_I2C1_PIN_INIT();
1231 #endif
1232 return LPI2C_InterruptInitialize(cb_event, &LPI2C1_InterruptDriverState);
1233 }
1234
LPI2C1_InterruptUninitialize(void)1235 static int32_t LPI2C1_InterruptUninitialize(void)
1236 {
1237 #ifdef RTE_I2C1_PIN_DEINIT
1238 RTE_I2C1_PIN_DEINIT();
1239 #endif
1240 return LPI2C_InterruptUninitialize(&LPI2C1_InterruptDriverState);
1241 }
1242
LPI2C1_InterruptPowerControl(ARM_POWER_STATE state)1243 static int32_t LPI2C1_InterruptPowerControl(ARM_POWER_STATE state)
1244 {
1245 return LPI2C_InterruptPowerControl(state, &LPI2C1_InterruptDriverState);
1246 }
1247
LPI2C1_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)1248 static int32_t LPI2C1_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
1249 {
1250 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C1_InterruptDriverState);
1251 }
1252
LPI2C1_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)1253 static int32_t LPI2C1_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
1254 {
1255 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C1_InterruptDriverState);
1256 }
1257
LPI2C1_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)1258 static int32_t LPI2C1_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
1259 {
1260 LPI2C1_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C1_SLAVE_InterruptCallback;
1261 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C1_InterruptDriverState);
1262 }
1263
LPI2C1_Slave_InterruptReceive(uint8_t * data,uint32_t num)1264 static int32_t LPI2C1_Slave_InterruptReceive(uint8_t *data, uint32_t num)
1265 {
1266 LPI2C1_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C1_SLAVE_InterruptCallback;
1267 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C1_InterruptDriverState);
1268 }
1269
LPI2C1_InterruptGetDataCount(void)1270 static int32_t LPI2C1_InterruptGetDataCount(void)
1271 {
1272 return LPI2C_InterruptGetDataCount(&LPI2C1_InterruptDriverState);
1273 }
1274
LPI2C1_InterruptControl(uint32_t control,uint32_t arg)1275 static int32_t LPI2C1_InterruptControl(uint32_t control, uint32_t arg)
1276 {
1277 return LPI2C_InterruptControl(control, arg, &LPI2C1_InterruptDriverState);
1278 }
1279
LPI2C1_InterruptGetStatus(void)1280 static ARM_I2C_STATUS LPI2C1_InterruptGetStatus(void)
1281 {
1282 return LPI2C_InterruptGetStatus(&LPI2C1_InterruptDriverState);
1283 }
1284
1285 #endif /* RTE_I2C1_DMA_EN */
1286
1287 ARM_DRIVER_I2C Driver_I2C1 = {LPI2Cx_GetVersion,
1288 LPI2Cx_GetCapabilities,
1289 #if defined(RTE_I2C1_DMA_EN) && RTE_I2C1_DMA_EN
1290 LPI2C1_Master_EdmaInitialize,
1291 LPI2C1_Master_EdmaUninitialize,
1292 LPI2C1_Master_EdmaPowerControl,
1293 LPI2C1_Master_EdmaTransmit,
1294 LPI2C1_Master_EdmaReceive,
1295 NULL,
1296 NULL,
1297 LPI2C1_Master_EdmaGetDataCount,
1298 LPI2C1_Master_EdmaControl,
1299 LPI2C1_Master_EdmaGetStatus
1300 #else
1301 LPI2C1_InterruptInitialize,
1302 LPI2C1_InterruptUninitialize,
1303 LPI2C1_InterruptPowerControl,
1304 LPI2C1_Master_InterruptTransmit,
1305 LPI2C1_Master_InterruptReceive,
1306 LPI2C1_Slave_InterruptTransmit,
1307 LPI2C1_Slave_InterruptReceive,
1308 LPI2C1_InterruptGetDataCount,
1309 LPI2C1_InterruptControl,
1310 LPI2C1_InterruptGetStatus
1311 #endif /* RTE_I2C1_DMA_EN */
1312 };
1313
1314 #endif /* LPI2C1 */
1315
1316 #if defined(LPI2C2) && defined(RTE_I2C2) && RTE_I2C2
1317 /* User needs to provide the implementation for LPI2C2_GetFreq/InitPins/DeinitPins
1318 in the application for enabling according instance. */
1319 extern uint32_t LPI2C2_GetFreq(void);
1320
1321 static cmsis_lpi2c_resource_t LPI2C2_Resource = {LPI2C2, LPI2C2_GetFreq};
1322
1323 #if defined(RTE_I2C2_DMA_EN) && RTE_I2C2_DMA_EN
1324
1325 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
1326 static cmsis_lpi2c_edma_resource_t LPI2C2_EdmaResource = {
1327 RTE_I2C2_DMA_TX_DMA_BASE, RTE_I2C2_DMA_TX_CH, (uint16_t)RTE_I2C2_DMA_TX_PERI_SEL,
1328 RTE_I2C2_DMA_RX_DMA_BASE, RTE_I2C2_DMA_RX_CH, (uint16_t)RTE_I2C2_DMA_RX_PERI_SEL,
1329 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
1330 RTE_I2C2_DMA_TX_DMAMUX_BASE, RTE_I2C2_DMA_RX_DMAMUX_BASE,
1331 #endif
1332 };
1333
1334 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C2_EdmaHandle);
1335 static edma_handle_t LPI2C2_EdmaTxHandle;
1336 static edma_handle_t LPI2C2_EdmaRxHandle;
1337
1338 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1339 ARMCC_SECTION("lpi2c2_edma_driver_state")
1340 static cmsis_lpi2c_edma_driver_state_t LPI2C2_EdmaDriverState = {
1341 #else
1342 static cmsis_lpi2c_edma_driver_state_t LPI2C2_EdmaDriverState = {
1343 #endif
1344 &LPI2C2_Resource, &LPI2C2_EdmaResource, &LPI2C2_EdmaHandle, &LPI2C2_EdmaTxHandle, &LPI2C2_EdmaRxHandle,
1345 };
1346
LPI2C2_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)1347 static int32_t LPI2C2_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
1348 {
1349 #ifdef RTE_I2C2_PIN_INIT
1350 RTE_I2C2_PIN_INIT();
1351 #endif
1352 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C2_EdmaDriverState);
1353 }
1354
LPI2C2_Master_EdmaUninitialize(void)1355 static int32_t LPI2C2_Master_EdmaUninitialize(void)
1356 {
1357 #ifdef RTE_I2C2_PIN_DEINIT
1358 RTE_I2C2_PIN_DEINIT();
1359 #endif
1360 return LPI2C_Master_EdmaUninitialize(&LPI2C2_EdmaDriverState);
1361 }
1362
LPI2C2_Master_EdmaPowerControl(ARM_POWER_STATE state)1363 static int32_t LPI2C2_Master_EdmaPowerControl(ARM_POWER_STATE state)
1364 {
1365 return LPI2C_Master_EdmaPowerControl(state, &LPI2C2_EdmaDriverState);
1366 }
1367
LPI2C2_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)1368 static int32_t LPI2C2_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
1369 {
1370 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C2_EdmaDriverState);
1371 }
1372
LPI2C2_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)1373 static int32_t LPI2C2_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
1374 {
1375 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C2_EdmaDriverState);
1376 }
1377
LPI2C2_Master_EdmaGetDataCount(void)1378 static int32_t LPI2C2_Master_EdmaGetDataCount(void)
1379 {
1380 return LPI2C_Master_EdmaGetDataCount(&LPI2C2_EdmaDriverState);
1381 }
1382
LPI2C2_Master_EdmaControl(uint32_t control,uint32_t arg)1383 static int32_t LPI2C2_Master_EdmaControl(uint32_t control, uint32_t arg)
1384 {
1385 return LPI2C_Master_EdmaControl(control, arg, &LPI2C2_EdmaDriverState);
1386 }
1387
LPI2C2_Master_EdmaGetStatus(void)1388 static ARM_I2C_STATUS LPI2C2_Master_EdmaGetStatus(void)
1389 {
1390 return LPI2C_Master_EdmaGetStatus(&LPI2C2_EdmaDriverState);
1391 }
1392
1393 #endif
1394
1395 #else
1396
1397 static cmsis_i2c_handle_t LPI2C2_Handle;
1398
1399 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1400 ARMCC_SECTION("lpi2c2_interrupt_driver_state")
1401 static cmsis_lpi2c_interrupt_driver_state_t LPI2C2_InterruptDriverState = {
1402 #else
1403 static cmsis_lpi2c_interrupt_driver_state_t LPI2C2_InterruptDriverState = {
1404 #endif
1405 &LPI2C2_Resource,
1406 &LPI2C2_Handle,
1407 };
1408
KSDK_LPI2C2_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)1409 static void KSDK_LPI2C2_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
1410 {
1411 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C2_InterruptDriverState);
1412 }
1413
LPI2C2_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)1414 static int32_t LPI2C2_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
1415 {
1416 #ifdef RTE_I2C2_PIN_INIT
1417 RTE_I2C2_PIN_INIT();
1418 #endif
1419 return LPI2C_InterruptInitialize(cb_event, &LPI2C2_InterruptDriverState);
1420 }
1421
LPI2C2_InterruptUninitialize(void)1422 static int32_t LPI2C2_InterruptUninitialize(void)
1423 {
1424 #ifdef RTE_I2C2_PIN_DEINIT
1425 RTE_I2C2_PIN_DEINIT();
1426 #endif
1427 return LPI2C_InterruptUninitialize(&LPI2C2_InterruptDriverState);
1428 }
1429
LPI2C2_InterruptPowerControl(ARM_POWER_STATE state)1430 static int32_t LPI2C2_InterruptPowerControl(ARM_POWER_STATE state)
1431 {
1432 return LPI2C_InterruptPowerControl(state, &LPI2C2_InterruptDriverState);
1433 }
1434
LPI2C2_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)1435 static int32_t LPI2C2_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
1436 {
1437 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C2_InterruptDriverState);
1438 }
1439
LPI2C2_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)1440 static int32_t LPI2C2_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
1441 {
1442 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C2_InterruptDriverState);
1443 }
1444
LPI2C2_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)1445 static int32_t LPI2C2_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
1446 {
1447 LPI2C2_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C2_SLAVE_InterruptCallback;
1448 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C2_InterruptDriverState);
1449 }
1450
LPI2C2_Slave_InterruptReceive(uint8_t * data,uint32_t num)1451 static int32_t LPI2C2_Slave_InterruptReceive(uint8_t *data, uint32_t num)
1452 {
1453 LPI2C2_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C2_SLAVE_InterruptCallback;
1454 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C2_InterruptDriverState);
1455 }
1456
LPI2C2_InterruptGetDataCount(void)1457 static int32_t LPI2C2_InterruptGetDataCount(void)
1458 {
1459 return LPI2C_InterruptGetDataCount(&LPI2C2_InterruptDriverState);
1460 }
1461
LPI2C2_InterruptControl(uint32_t control,uint32_t arg)1462 static int32_t LPI2C2_InterruptControl(uint32_t control, uint32_t arg)
1463 {
1464 return LPI2C_InterruptControl(control, arg, &LPI2C2_InterruptDriverState);
1465 }
1466
LPI2C2_InterruptGetStatus(void)1467 static ARM_I2C_STATUS LPI2C2_InterruptGetStatus(void)
1468 {
1469 return LPI2C_InterruptGetStatus(&LPI2C2_InterruptDriverState);
1470 }
1471
1472 #endif /* RTE_I2C2_DMA_EN */
1473
1474 ARM_DRIVER_I2C Driver_I2C2 = {LPI2Cx_GetVersion,
1475 LPI2Cx_GetCapabilities,
1476 #if defined(RTE_I2C2_DMA_EN) && RTE_I2C2_DMA_EN
1477 LPI2C2_Master_EdmaInitialize,
1478 LPI2C2_Master_EdmaUninitialize,
1479 LPI2C2_Master_EdmaPowerControl,
1480 LPI2C2_Master_EdmaTransmit,
1481 LPI2C2_Master_EdmaReceive,
1482 NULL,
1483 NULL,
1484 LPI2C2_Master_EdmaGetDataCount,
1485 LPI2C2_Master_EdmaControl,
1486 LPI2C2_Master_EdmaGetStatus
1487 #else
1488 LPI2C2_InterruptInitialize,
1489 LPI2C2_InterruptUninitialize,
1490 LPI2C2_InterruptPowerControl,
1491 LPI2C2_Master_InterruptTransmit,
1492 LPI2C2_Master_InterruptReceive,
1493 LPI2C2_Slave_InterruptTransmit,
1494 LPI2C2_Slave_InterruptReceive,
1495 LPI2C2_InterruptGetDataCount,
1496 LPI2C2_InterruptControl,
1497 LPI2C2_InterruptGetStatus
1498 #endif /* RTE_I2C2_DMA_EN */
1499 };
1500
1501 #endif /* LPI2C2 */
1502
1503 #if defined(LPI2C3) && defined(RTE_I2C3) && RTE_I2C3
1504 /* User needs to provide the implementation for LPI2C3_GetFreq/InitPins/DeinitPins
1505 in the application for enabling according instance. */
1506 extern uint32_t LPI2C3_GetFreq(void);
1507
1508 static cmsis_lpi2c_resource_t LPI2C3_Resource = {LPI2C3, LPI2C3_GetFreq};
1509
1510 #if defined(RTE_I2C3_DMA_EN) && RTE_I2C3_DMA_EN
1511
1512 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
1513 static cmsis_lpi2c_edma_resource_t LPI2C3_EdmaResource = {
1514 RTE_I2C3_DMA_TX_DMA_BASE, RTE_I2C3_DMA_TX_CH, (uint16_t)RTE_I2C3_DMA_TX_PERI_SEL,
1515 RTE_I2C3_DMA_RX_DMA_BASE, RTE_I2C3_DMA_RX_CH, (uint16_t)RTE_I2C3_DMA_RX_PERI_SEL,
1516 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
1517 RTE_I2C3_DMA_TX_DMAMUX_BASE, RTE_I2C3_DMA_RX_DMAMUX_BASE,
1518 #endif
1519 };
1520
1521 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C3_EdmaHandle);
1522 static edma_handle_t LPI2C3_EdmaTxHandle;
1523 static edma_handle_t LPI2C3_EdmaRxHandle;
1524
1525 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1526 ARMCC_SECTION("lpi2c3_edma_driver_state")
1527 static cmsis_lpi2c_edma_driver_state_t LPI2C3_EdmaDriverState = {
1528 #else
1529 static cmsis_lpi2c_edma_driver_state_t LPI2C3_EdmaDriverState = {
1530 #endif
1531 &LPI2C3_Resource, &LPI2C3_EdmaResource, &LPI2C3_EdmaHandle, &LPI2C3_EdmaTxHandle, &LPI2C3_EdmaRxHandle,
1532 };
1533
LPI2C3_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)1534 static int32_t LPI2C3_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
1535 {
1536 #ifdef RTE_I2C3_PIN_INIT
1537 RTE_I2C3_PIN_INIT();
1538 #endif
1539 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C3_EdmaDriverState);
1540 }
1541
LPI2C3_Master_EdmaUninitialize(void)1542 static int32_t LPI2C3_Master_EdmaUninitialize(void)
1543 {
1544 #ifdef RTE_I2C3_PIN_DEINIT
1545 RTE_I2C3_PIN_DEINIT();
1546 #endif
1547 return LPI2C_Master_EdmaUninitialize(&LPI2C3_EdmaDriverState);
1548 }
1549
LPI2C3_Master_EdmaPowerControl(ARM_POWER_STATE state)1550 static int32_t LPI2C3_Master_EdmaPowerControl(ARM_POWER_STATE state)
1551 {
1552 return LPI2C_Master_EdmaPowerControl(state, &LPI2C3_EdmaDriverState);
1553 }
1554
LPI2C3_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)1555 static int32_t LPI2C3_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
1556 {
1557 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C3_EdmaDriverState);
1558 }
1559
LPI2C3_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)1560 static int32_t LPI2C3_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
1561 {
1562 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C3_EdmaDriverState);
1563 }
1564
LPI2C3_Master_EdmaGetDataCount(void)1565 static int32_t LPI2C3_Master_EdmaGetDataCount(void)
1566 {
1567 return LPI2C_Master_EdmaGetDataCount(&LPI2C3_EdmaDriverState);
1568 }
1569
LPI2C3_Master_EdmaControl(uint32_t control,uint32_t arg)1570 static int32_t LPI2C3_Master_EdmaControl(uint32_t control, uint32_t arg)
1571 {
1572 return LPI2C_Master_EdmaControl(control, arg, &LPI2C3_EdmaDriverState);
1573 }
1574
LPI2C3_Master_EdmaGetStatus(void)1575 static ARM_I2C_STATUS LPI2C3_Master_EdmaGetStatus(void)
1576 {
1577 return LPI2C_Master_EdmaGetStatus(&LPI2C3_EdmaDriverState);
1578 }
1579
1580 #endif
1581
1582 #else
1583
1584 static cmsis_i2c_handle_t LPI2C3_Handle;
1585
1586 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1587 ARMCC_SECTION("lpi2c3_interrupt_driver_state")
1588 static cmsis_lpi2c_interrupt_driver_state_t LPI2C3_InterruptDriverState = {
1589 #else
1590 static cmsis_lpi2c_interrupt_driver_state_t LPI2C3_InterruptDriverState = {
1591 #endif
1592 &LPI2C3_Resource,
1593 &LPI2C3_Handle,
1594 };
1595
KSDK_LPI2C3_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)1596 static void KSDK_LPI2C3_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
1597 {
1598 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C3_InterruptDriverState);
1599 }
1600
LPI2C3_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)1601 static int32_t LPI2C3_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
1602 {
1603 #ifdef RTE_I2C3_PIN_INIT
1604 RTE_I2C3_PIN_INIT();
1605 #endif
1606 return LPI2C_InterruptInitialize(cb_event, &LPI2C3_InterruptDriverState);
1607 }
1608
LPI2C3_InterruptUninitialize(void)1609 static int32_t LPI2C3_InterruptUninitialize(void)
1610 {
1611 #ifdef RTE_I2C3_PIN_DEINIT
1612 RTE_I2C3_PIN_DEINIT();
1613 #endif
1614 return LPI2C_InterruptUninitialize(&LPI2C3_InterruptDriverState);
1615 }
1616
LPI2C3_InterruptPowerControl(ARM_POWER_STATE state)1617 static int32_t LPI2C3_InterruptPowerControl(ARM_POWER_STATE state)
1618 {
1619 return LPI2C_InterruptPowerControl(state, &LPI2C3_InterruptDriverState);
1620 }
1621
LPI2C3_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)1622 static int32_t LPI2C3_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
1623 {
1624 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C3_InterruptDriverState);
1625 }
1626
LPI2C3_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)1627 static int32_t LPI2C3_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
1628 {
1629 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C3_InterruptDriverState);
1630 }
1631
LPI2C3_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)1632 static int32_t LPI2C3_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
1633 {
1634 LPI2C3_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C3_SLAVE_InterruptCallback;
1635 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C3_InterruptDriverState);
1636 }
1637
LPI2C3_Slave_InterruptReceive(uint8_t * data,uint32_t num)1638 static int32_t LPI2C3_Slave_InterruptReceive(uint8_t *data, uint32_t num)
1639 {
1640 LPI2C3_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C3_SLAVE_InterruptCallback;
1641 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C3_InterruptDriverState);
1642 }
1643
LPI2C3_InterruptGetDataCount(void)1644 static int32_t LPI2C3_InterruptGetDataCount(void)
1645 {
1646 return LPI2C_InterruptGetDataCount(&LPI2C3_InterruptDriverState);
1647 }
1648
LPI2C3_InterruptControl(uint32_t control,uint32_t arg)1649 static int32_t LPI2C3_InterruptControl(uint32_t control, uint32_t arg)
1650 {
1651 return LPI2C_InterruptControl(control, arg, &LPI2C3_InterruptDriverState);
1652 }
1653
LPI2C3_InterruptGetStatus(void)1654 static ARM_I2C_STATUS LPI2C3_InterruptGetStatus(void)
1655 {
1656 return LPI2C_InterruptGetStatus(&LPI2C3_InterruptDriverState);
1657 }
1658
1659 #endif /* RTE_I2C3_DMA_EN */
1660
1661 ARM_DRIVER_I2C Driver_I2C3 = {LPI2Cx_GetVersion,
1662 LPI2Cx_GetCapabilities,
1663 #if defined(RTE_I2C3_DMA_EN) && RTE_I2C3_DMA_EN
1664 LPI2C3_Master_EdmaInitialize,
1665 LPI2C3_Master_EdmaUninitialize,
1666 LPI2C3_Master_EdmaPowerControl,
1667 LPI2C3_Master_EdmaTransmit,
1668 LPI2C3_Master_EdmaReceive,
1669 NULL,
1670 NULL,
1671 LPI2C3_Master_EdmaGetDataCount,
1672 LPI2C3_Master_EdmaControl,
1673 LPI2C3_Master_EdmaGetStatus
1674 #else
1675 LPI2C3_InterruptInitialize,
1676 LPI2C3_InterruptUninitialize,
1677 LPI2C3_InterruptPowerControl,
1678 LPI2C3_Master_InterruptTransmit,
1679 LPI2C3_Master_InterruptReceive,
1680 LPI2C3_Slave_InterruptTransmit,
1681 LPI2C3_Slave_InterruptReceive,
1682 LPI2C3_InterruptGetDataCount,
1683 LPI2C3_InterruptControl,
1684 LPI2C3_InterruptGetStatus
1685 #endif /* RTE_I2C3_DMA_EN */
1686 };
1687
1688 #endif /* LPI2C3 */
1689
1690 #if defined(LPI2C4) && defined(RTE_I2C4) && RTE_I2C4
1691 /* User needs to provide the implementation for LPI2C4_GetFreq/InitPins/DeinitPins
1692 in the application for enabling according instance. */
1693 extern uint32_t LPI2C4_GetFreq(void);
1694
1695 static cmsis_lpi2c_resource_t LPI2C4_Resource = {LPI2C4, LPI2C4_GetFreq};
1696
1697 #if defined(RTE_I2C4_DMA_EN) && RTE_I2C4_DMA_EN
1698
1699 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
1700 static cmsis_lpi2c_edma_resource_t LPI2C4_EdmaResource = {
1701 RTE_I2C4_DMA_TX_DMA_BASE, RTE_I2C4_DMA_TX_CH, (uint16_t)RTE_I2C4_DMA_TX_PERI_SEL,
1702 RTE_I2C4_DMA_RX_DMA_BASE, RTE_I2C4_DMA_RX_CH, (uint16_t)RTE_I2C4_DMA_RX_PERI_SEL,
1703 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
1704 RTE_I2C4_DMA_TX_DMAMUX_BASE, RTE_I2C4_DMA_RX_DMAMUX_BASE,
1705 #endif
1706 };
1707
1708 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C4_EdmaHandle);
1709 static edma_handle_t LPI2C4_EdmaTxHandle;
1710 static edma_handle_t LPI2C4_EdmaRxHandle;
1711
1712 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1713 ARMCC_SECTION("lpi2c4_edma_driver_state")
1714 static cmsis_lpi2c_edma_driver_state_t LPI2C4_EdmaDriverState = {
1715 #else
1716 static cmsis_lpi2c_edma_driver_state_t LPI2C4_EdmaDriverState = {
1717 #endif
1718 &LPI2C4_Resource, &LPI2C4_EdmaResource, &LPI2C4_EdmaHandle, &LPI2C4_EdmaTxHandle, &LPI2C4_EdmaRxHandle,
1719 };
1720
LPI2C4_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)1721 static int32_t LPI2C4_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
1722 {
1723 #ifdef RTE_I2C4_PIN_INIT
1724 RTE_I2C4_PIN_INIT();
1725 #endif
1726 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C4_EdmaDriverState);
1727 }
1728
LPI2C4_Master_EdmaUninitialize(void)1729 static int32_t LPI2C4_Master_EdmaUninitialize(void)
1730 {
1731 #ifdef RTE_I2C4_PIN_DEINIT
1732 RTE_I2C4_PIN_DEINIT();
1733 #endif
1734 return LPI2C_Master_EdmaUninitialize(&LPI2C4_EdmaDriverState);
1735 }
1736
LPI2C4_Master_EdmaPowerControl(ARM_POWER_STATE state)1737 static int32_t LPI2C4_Master_EdmaPowerControl(ARM_POWER_STATE state)
1738 {
1739 return LPI2C_Master_EdmaPowerControl(state, &LPI2C4_EdmaDriverState);
1740 }
1741
LPI2C4_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)1742 static int32_t LPI2C4_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
1743 {
1744 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C4_EdmaDriverState);
1745 }
1746
LPI2C4_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)1747 static int32_t LPI2C4_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
1748 {
1749 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C4_EdmaDriverState);
1750 }
1751
LPI2C4_Master_EdmaGetDataCount(void)1752 static int32_t LPI2C4_Master_EdmaGetDataCount(void)
1753 {
1754 return LPI2C_Master_EdmaGetDataCount(&LPI2C4_EdmaDriverState);
1755 }
1756
LPI2C4_Master_EdmaControl(uint32_t control,uint32_t arg)1757 static int32_t LPI2C4_Master_EdmaControl(uint32_t control, uint32_t arg)
1758 {
1759 return LPI2C_Master_EdmaControl(control, arg, &LPI2C4_EdmaDriverState);
1760 }
1761
LPI2C4_Master_EdmaGetStatus(void)1762 static ARM_I2C_STATUS LPI2C4_Master_EdmaGetStatus(void)
1763 {
1764 return LPI2C_Master_EdmaGetStatus(&LPI2C4_EdmaDriverState);
1765 }
1766
1767 #endif
1768
1769 #else
1770
1771 static cmsis_i2c_handle_t LPI2C4_Handle;
1772
1773 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1774 ARMCC_SECTION("lpi2c4_interrupt_driver_state")
1775 static cmsis_lpi2c_interrupt_driver_state_t LPI2C4_InterruptDriverState = {
1776 #else
1777 static cmsis_lpi2c_interrupt_driver_state_t LPI2C4_InterruptDriverState = {
1778 #endif
1779 &LPI2C4_Resource,
1780 &LPI2C4_Handle,
1781 };
1782
KSDK_LPI2C4_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)1783 static void KSDK_LPI2C4_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
1784 {
1785 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C4_InterruptDriverState);
1786 }
1787
LPI2C4_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)1788 static int32_t LPI2C4_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
1789 {
1790 #ifdef RTE_I2C4_PIN_INIT
1791 RTE_I2C4_PIN_INIT();
1792 #endif
1793 return LPI2C_InterruptInitialize(cb_event, &LPI2C4_InterruptDriverState);
1794 }
1795
LPI2C4_InterruptUninitialize(void)1796 static int32_t LPI2C4_InterruptUninitialize(void)
1797 {
1798 #ifdef RTE_I2C4_PIN_DEINIT
1799 RTE_I2C4_PIN_DEINIT();
1800 #endif
1801 return LPI2C_InterruptUninitialize(&LPI2C4_InterruptDriverState);
1802 }
1803
LPI2C4_InterruptPowerControl(ARM_POWER_STATE state)1804 static int32_t LPI2C4_InterruptPowerControl(ARM_POWER_STATE state)
1805 {
1806 return LPI2C_InterruptPowerControl(state, &LPI2C4_InterruptDriverState);
1807 }
1808
LPI2C4_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)1809 static int32_t LPI2C4_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
1810 {
1811 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C4_InterruptDriverState);
1812 }
1813
LPI2C4_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)1814 static int32_t LPI2C4_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
1815 {
1816 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C4_InterruptDriverState);
1817 }
1818
LPI2C4_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)1819 static int32_t LPI2C4_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
1820 {
1821 LPI2C4_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C4_SLAVE_InterruptCallback;
1822 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C4_InterruptDriverState);
1823 }
1824
LPI2C4_Slave_InterruptReceive(uint8_t * data,uint32_t num)1825 static int32_t LPI2C4_Slave_InterruptReceive(uint8_t *data, uint32_t num)
1826 {
1827 LPI2C4_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C4_SLAVE_InterruptCallback;
1828 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C4_InterruptDriverState);
1829 }
1830
LPI2C4_InterruptGetDataCount(void)1831 static int32_t LPI2C4_InterruptGetDataCount(void)
1832 {
1833 return LPI2C_InterruptGetDataCount(&LPI2C4_InterruptDriverState);
1834 }
1835
LPI2C4_InterruptControl(uint32_t control,uint32_t arg)1836 static int32_t LPI2C4_InterruptControl(uint32_t control, uint32_t arg)
1837 {
1838 return LPI2C_InterruptControl(control, arg, &LPI2C4_InterruptDriverState);
1839 }
1840
LPI2C4_InterruptGetStatus(void)1841 static ARM_I2C_STATUS LPI2C4_InterruptGetStatus(void)
1842 {
1843 return LPI2C_InterruptGetStatus(&LPI2C4_InterruptDriverState);
1844 }
1845
1846 #endif /* RTE_I2C4_DMA_EN */
1847
1848 ARM_DRIVER_I2C Driver_I2C4 = {LPI2Cx_GetVersion,
1849 LPI2Cx_GetCapabilities,
1850 #if defined(RTE_I2C4_DMA_EN) && RTE_I2C4_DMA_EN
1851 LPI2C4_Master_EdmaInitialize,
1852 LPI2C4_Master_EdmaUninitialize,
1853 LPI2C4_Master_EdmaPowerControl,
1854 LPI2C4_Master_EdmaTransmit,
1855 LPI2C4_Master_EdmaReceive,
1856 NULL,
1857 NULL,
1858 LPI2C4_Master_EdmaGetDataCount,
1859 LPI2C4_Master_EdmaControl,
1860 LPI2C4_Master_EdmaGetStatus
1861 #else
1862 LPI2C4_InterruptInitialize,
1863 LPI2C4_InterruptUninitialize,
1864 LPI2C4_InterruptPowerControl,
1865 LPI2C4_Master_InterruptTransmit,
1866 LPI2C4_Master_InterruptReceive,
1867 LPI2C4_Slave_InterruptTransmit,
1868 LPI2C4_Slave_InterruptReceive,
1869 LPI2C4_InterruptGetDataCount,
1870 LPI2C4_InterruptControl,
1871 LPI2C4_InterruptGetStatus
1872 #endif /* RTE_I2C4_DMA_EN */
1873 };
1874
1875 #endif /* LPI2C4 */
1876
1877 #if defined(LPI2C5) && defined(RTE_I2C5) && RTE_I2C5
1878 /* User needs to provide the implementation for LPI2C5_GetFreq/InitPins/DeinitPins
1879 in the application for enabling according instance. */
1880 extern uint32_t LPI2C5_GetFreq(void);
1881
1882 static cmsis_lpi2c_resource_t LPI2C5_Resource = {LPI2C5, LPI2C5_GetFreq};
1883
1884 #if defined(RTE_I2C5_DMA_EN) && RTE_I2C5_DMA_EN
1885
1886 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
1887 static cmsis_lpi2c_edma_resource_t LPI2C5_EdmaResource = {
1888 RTE_I2C5_DMA_TX_DMA_BASE, RTE_I2C5_DMA_TX_CH, (uint16_t)RTE_I2C5_DMA_TX_PERI_SEL,
1889 RTE_I2C5_DMA_RX_DMA_BASE, RTE_I2C5_DMA_RX_CH, (uint16_t)RTE_I2C5_DMA_RX_PERI_SEL,
1890 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
1891 RTE_I2C5_DMA_TX_DMAMUX_BASE, RTE_I2C5_DMA_RX_DMAMUX_BASE,
1892 #endif
1893 };
1894
1895 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C5_EdmaHandle);
1896 static edma_handle_t LPI2C5_EdmaTxHandle;
1897 static edma_handle_t LPI2C5_EdmaRxHandle;
1898
1899 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1900 ARMCC_SECTION("lpi2c5_edma_driver_state")
1901 static cmsis_lpi2c_edma_driver_state_t LPI2C5_EdmaDriverState = {
1902 #else
1903 static cmsis_lpi2c_edma_driver_state_t LPI2C5_EdmaDriverState = {
1904 #endif
1905 &LPI2C5_Resource, &LPI2C5_EdmaResource, &LPI2C5_EdmaHandle, &LPI2C5_EdmaTxHandle, &LPI2C5_EdmaRxHandle,
1906 };
1907
LPI2C5_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)1908 static int32_t LPI2C5_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
1909 {
1910 #ifdef RTE_I2C5_PIN_INIT
1911 RTE_I2C5_PIN_INIT();
1912 #endif
1913 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C5_EdmaDriverState);
1914 }
1915
LPI2C5_Master_EdmaUninitialize(void)1916 static int32_t LPI2C5_Master_EdmaUninitialize(void)
1917 {
1918 #ifdef RTE_I2C5_PIN_DEINIT
1919 RTE_I2C5_PIN_DEINIT();
1920 #endif
1921 return LPI2C_Master_EdmaUninitialize(&LPI2C5_EdmaDriverState);
1922 }
1923
LPI2C5_Master_EdmaPowerControl(ARM_POWER_STATE state)1924 static int32_t LPI2C5_Master_EdmaPowerControl(ARM_POWER_STATE state)
1925 {
1926 return LPI2C_Master_EdmaPowerControl(state, &LPI2C5_EdmaDriverState);
1927 }
1928
LPI2C5_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)1929 static int32_t LPI2C5_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
1930 {
1931 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C5_EdmaDriverState);
1932 }
1933
LPI2C5_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)1934 static int32_t LPI2C5_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
1935 {
1936 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C5_EdmaDriverState);
1937 }
1938
LPI2C5_Master_EdmaGetDataCount(void)1939 static int32_t LPI2C5_Master_EdmaGetDataCount(void)
1940 {
1941 return LPI2C_Master_EdmaGetDataCount(&LPI2C5_EdmaDriverState);
1942 }
1943
LPI2C5_Master_EdmaControl(uint32_t control,uint32_t arg)1944 static int32_t LPI2C5_Master_EdmaControl(uint32_t control, uint32_t arg)
1945 {
1946 return LPI2C_Master_EdmaControl(control, arg, &LPI2C5_EdmaDriverState);
1947 }
1948
LPI2C5_Master_EdmaGetStatus(void)1949 static ARM_I2C_STATUS LPI2C5_Master_EdmaGetStatus(void)
1950 {
1951 return LPI2C_Master_EdmaGetStatus(&LPI2C5_EdmaDriverState);
1952 }
1953
1954 #endif
1955
1956 #else
1957
1958 static cmsis_i2c_handle_t LPI2C5_Handle;
1959
1960 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
1961 ARMCC_SECTION("lpi2c5_interrupt_driver_state")
1962 static cmsis_lpi2c_interrupt_driver_state_t LPI2C5_InterruptDriverState = {
1963 #else
1964 static cmsis_lpi2c_interrupt_driver_state_t LPI2C5_InterruptDriverState = {
1965 #endif
1966 &LPI2C5_Resource,
1967 &LPI2C5_Handle,
1968 };
1969
KSDK_LPI2C5_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)1970 static void KSDK_LPI2C5_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
1971 {
1972 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C5_InterruptDriverState);
1973 }
1974
LPI2C5_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)1975 static int32_t LPI2C5_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
1976 {
1977 #ifdef RTE_I2C5_PIN_INIT
1978 RTE_I2C5_PIN_INIT();
1979 #endif
1980 return LPI2C_InterruptInitialize(cb_event, &LPI2C5_InterruptDriverState);
1981 }
1982
LPI2C5_InterruptUninitialize(void)1983 static int32_t LPI2C5_InterruptUninitialize(void)
1984 {
1985 #ifdef RTE_I2C5_PIN_DEINIT
1986 RTE_I2C5_PIN_DEINIT();
1987 #endif
1988 return LPI2C_InterruptUninitialize(&LPI2C5_InterruptDriverState);
1989 }
1990
LPI2C5_InterruptPowerControl(ARM_POWER_STATE state)1991 static int32_t LPI2C5_InterruptPowerControl(ARM_POWER_STATE state)
1992 {
1993 return LPI2C_InterruptPowerControl(state, &LPI2C5_InterruptDriverState);
1994 }
1995
LPI2C5_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)1996 static int32_t LPI2C5_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
1997 {
1998 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C5_InterruptDriverState);
1999 }
2000
LPI2C5_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)2001 static int32_t LPI2C5_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
2002 {
2003 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C5_InterruptDriverState);
2004 }
2005
LPI2C5_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)2006 static int32_t LPI2C5_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
2007 {
2008 LPI2C5_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C5_SLAVE_InterruptCallback;
2009 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C5_InterruptDriverState);
2010 }
2011
LPI2C5_Slave_InterruptReceive(uint8_t * data,uint32_t num)2012 static int32_t LPI2C5_Slave_InterruptReceive(uint8_t *data, uint32_t num)
2013 {
2014 LPI2C5_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C5_SLAVE_InterruptCallback;
2015 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C5_InterruptDriverState);
2016 }
2017
LPI2C5_InterruptGetDataCount(void)2018 static int32_t LPI2C5_InterruptGetDataCount(void)
2019 {
2020 return LPI2C_InterruptGetDataCount(&LPI2C5_InterruptDriverState);
2021 }
2022
LPI2C5_InterruptControl(uint32_t control,uint32_t arg)2023 static int32_t LPI2C5_InterruptControl(uint32_t control, uint32_t arg)
2024 {
2025 return LPI2C_InterruptControl(control, arg, &LPI2C5_InterruptDriverState);
2026 }
2027
LPI2C5_InterruptGetStatus(void)2028 static ARM_I2C_STATUS LPI2C5_InterruptGetStatus(void)
2029 {
2030 return LPI2C_InterruptGetStatus(&LPI2C5_InterruptDriverState);
2031 }
2032
2033 #endif /* RTE_I2C5_DMA_EN */
2034
2035 ARM_DRIVER_I2C Driver_I2C5 = {LPI2Cx_GetVersion,
2036 LPI2Cx_GetCapabilities,
2037 #if defined(RTE_I2C5_DMA_EN) && RTE_I2C5_DMA_EN
2038 LPI2C5_Master_EdmaInitialize,
2039 LPI2C5_Master_EdmaUninitialize,
2040 LPI2C5_Master_EdmaPowerControl,
2041 LPI2C5_Master_EdmaTransmit,
2042 LPI2C5_Master_EdmaReceive,
2043 NULL,
2044 NULL,
2045 LPI2C5_Master_EdmaGetDataCount,
2046 LPI2C5_Master_EdmaControl,
2047 LPI2C5_Master_EdmaGetStatus
2048 #else
2049 LPI2C5_InterruptInitialize,
2050 LPI2C5_InterruptUninitialize,
2051 LPI2C5_InterruptPowerControl,
2052 LPI2C5_Master_InterruptTransmit,
2053 LPI2C5_Master_InterruptReceive,
2054 LPI2C5_Slave_InterruptTransmit,
2055 LPI2C5_Slave_InterruptReceive,
2056 LPI2C5_InterruptGetDataCount,
2057 LPI2C5_InterruptControl,
2058 LPI2C5_InterruptGetStatus
2059 #endif /* RTE_I2C5_DMA_EN */
2060 };
2061
2062 #endif /* LPI2C5 */
2063
2064 #if defined(LPI2C6) && defined(RTE_I2C6) && RTE_I2C6
2065 /* User needs to provide the implementation for LPI2C6_GetFreq/InitPins/DeinitPins
2066 in the application for enabling according instance. */
2067 extern uint32_t LPI2C6_GetFreq(void);
2068
2069 static cmsis_lpi2c_resource_t LPI2C6_Resource = {LPI2C6, LPI2C6_GetFreq};
2070
2071 #if defined(RTE_I2C6_DMA_EN) && RTE_I2C6_DMA_EN
2072
2073 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
2074 static cmsis_lpi2c_edma_resource_t LPI2C6_EdmaResource = {
2075 RTE_I2C6_DMA_TX_DMA_BASE, RTE_I2C6_DMA_TX_CH, (uint16_t)RTE_I2C6_DMA_TX_PERI_SEL,
2076 RTE_I2C6_DMA_RX_DMA_BASE, RTE_I2C6_DMA_RX_CH, (uint16_t)RTE_I2C6_DMA_RX_PERI_SEL,
2077 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
2078 RTE_I2C6_DMA_TX_DMAMUX_BASE, RTE_I2C6_DMA_RX_DMAMUX_BASE,
2079 #endif
2080 };
2081
2082 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C6_EdmaHandle);
2083 static edma_handle_t LPI2C6_EdmaTxHandle;
2084 static edma_handle_t LPI2C6_EdmaRxHandle;
2085
2086 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2087 ARMCC_SECTION("lpi2c6_edma_driver_state")
2088 static cmsis_lpi2c_edma_driver_state_t LPI2C6_EdmaDriverState = {
2089 #else
2090 static cmsis_lpi2c_edma_driver_state_t LPI2C6_EdmaDriverState = {
2091 #endif
2092 &LPI2C6_Resource, &LPI2C6_EdmaResource, &LPI2C6_EdmaHandle, &LPI2C6_EdmaTxHandle, &LPI2C6_EdmaRxHandle,
2093 };
2094
LPI2C6_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)2095 static int32_t LPI2C6_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
2096 {
2097 #ifdef RTE_I2C6_PIN_INIT
2098 RTE_I2C6_PIN_INIT();
2099 #endif
2100 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C6_EdmaDriverState);
2101 }
2102
LPI2C6_Master_EdmaUninitialize(void)2103 static int32_t LPI2C6_Master_EdmaUninitialize(void)
2104 {
2105 #ifdef RTE_I2C6_PIN_DEINIT
2106 RTE_I2C6_PIN_DEINIT();
2107 #endif
2108 return LPI2C_Master_EdmaUninitialize(&LPI2C6_EdmaDriverState);
2109 }
2110
LPI2C6_Master_EdmaPowerControl(ARM_POWER_STATE state)2111 static int32_t LPI2C6_Master_EdmaPowerControl(ARM_POWER_STATE state)
2112 {
2113 return LPI2C_Master_EdmaPowerControl(state, &LPI2C6_EdmaDriverState);
2114 }
2115
LPI2C6_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)2116 static int32_t LPI2C6_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
2117 {
2118 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C6_EdmaDriverState);
2119 }
2120
LPI2C6_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)2121 static int32_t LPI2C6_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
2122 {
2123 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C6_EdmaDriverState);
2124 }
2125
LPI2C6_Master_EdmaGetDataCount(void)2126 static int32_t LPI2C6_Master_EdmaGetDataCount(void)
2127 {
2128 return LPI2C_Master_EdmaGetDataCount(&LPI2C6_EdmaDriverState);
2129 }
2130
LPI2C6_Master_EdmaControl(uint32_t control,uint32_t arg)2131 static int32_t LPI2C6_Master_EdmaControl(uint32_t control, uint32_t arg)
2132 {
2133 return LPI2C_Master_EdmaControl(control, arg, &LPI2C6_EdmaDriverState);
2134 }
2135
LPI2C6_Master_EdmaGetStatus(void)2136 static ARM_I2C_STATUS LPI2C6_Master_EdmaGetStatus(void)
2137 {
2138 return LPI2C_Master_EdmaGetStatus(&LPI2C6_EdmaDriverState);
2139 }
2140
2141 #endif
2142
2143 #else
2144
2145 static cmsis_i2c_handle_t LPI2C6_Handle;
2146
2147 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2148 ARMCC_SECTION("lpi2c6_interrupt_driver_state")
2149 static cmsis_lpi2c_interrupt_driver_state_t LPI2C6_InterruptDriverState = {
2150 #else
2151 static cmsis_lpi2c_interrupt_driver_state_t LPI2C6_InterruptDriverState = {
2152 #endif
2153 &LPI2C6_Resource,
2154 &LPI2C6_Handle,
2155 };
2156
KSDK_LPI2C6_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)2157 static void KSDK_LPI2C6_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
2158 {
2159 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C6_InterruptDriverState);
2160 }
2161
LPI2C6_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)2162 static int32_t LPI2C6_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
2163 {
2164 #ifdef RTE_I2C6_PIN_INIT
2165 RTE_I2C6_PIN_INIT();
2166 #endif
2167 return LPI2C_InterruptInitialize(cb_event, &LPI2C6_InterruptDriverState);
2168 }
2169
LPI2C6_InterruptUninitialize(void)2170 static int32_t LPI2C6_InterruptUninitialize(void)
2171 {
2172 #ifdef RTE_I2C6_PIN_DEINIT
2173 RTE_I2C6_PIN_DEINIT();
2174 #endif
2175 return LPI2C_InterruptUninitialize(&LPI2C6_InterruptDriverState);
2176 }
2177
LPI2C6_InterruptPowerControl(ARM_POWER_STATE state)2178 static int32_t LPI2C6_InterruptPowerControl(ARM_POWER_STATE state)
2179 {
2180 return LPI2C_InterruptPowerControl(state, &LPI2C6_InterruptDriverState);
2181 }
2182
LPI2C6_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)2183 static int32_t LPI2C6_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
2184 {
2185 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C6_InterruptDriverState);
2186 }
2187
LPI2C6_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)2188 static int32_t LPI2C6_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
2189 {
2190 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C6_InterruptDriverState);
2191 }
2192
LPI2C6_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)2193 static int32_t LPI2C6_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
2194 {
2195 LPI2C6_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C6_SLAVE_InterruptCallback;
2196 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C6_InterruptDriverState);
2197 }
2198
LPI2C6_Slave_InterruptReceive(uint8_t * data,uint32_t num)2199 static int32_t LPI2C6_Slave_InterruptReceive(uint8_t *data, uint32_t num)
2200 {
2201 LPI2C6_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C6_SLAVE_InterruptCallback;
2202 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C6_InterruptDriverState);
2203 }
2204
LPI2C6_InterruptGetDataCount(void)2205 static int32_t LPI2C6_InterruptGetDataCount(void)
2206 {
2207 return LPI2C_InterruptGetDataCount(&LPI2C6_InterruptDriverState);
2208 }
2209
LPI2C6_InterruptControl(uint32_t control,uint32_t arg)2210 static int32_t LPI2C6_InterruptControl(uint32_t control, uint32_t arg)
2211 {
2212 return LPI2C_InterruptControl(control, arg, &LPI2C6_InterruptDriverState);
2213 }
2214
LPI2C6_InterruptGetStatus(void)2215 static ARM_I2C_STATUS LPI2C6_InterruptGetStatus(void)
2216 {
2217 return LPI2C_InterruptGetStatus(&LPI2C6_InterruptDriverState);
2218 }
2219
2220 #endif /* RTE_I2C6_DMA_EN */
2221
2222 ARM_DRIVER_I2C Driver_I2C6 = {LPI2Cx_GetVersion,
2223 LPI2Cx_GetCapabilities,
2224 #if defined(RTE_I2C6_DMA_EN) && RTE_I2C6_DMA_EN
2225 LPI2C6_Master_EdmaInitialize,
2226 LPI2C6_Master_EdmaUninitialize,
2227 LPI2C6_Master_EdmaPowerControl,
2228 LPI2C6_Master_EdmaTransmit,
2229 LPI2C6_Master_EdmaReceive,
2230 NULL,
2231 NULL,
2232 LPI2C6_Master_EdmaGetDataCount,
2233 LPI2C6_Master_EdmaControl,
2234 LPI2C6_Master_EdmaGetStatus
2235 #else
2236 LPI2C6_InterruptInitialize,
2237 LPI2C6_InterruptUninitialize,
2238 LPI2C6_InterruptPowerControl,
2239 LPI2C6_Master_InterruptTransmit,
2240 LPI2C6_Master_InterruptReceive,
2241 LPI2C6_Slave_InterruptTransmit,
2242 LPI2C6_Slave_InterruptReceive,
2243 LPI2C6_InterruptGetDataCount,
2244 LPI2C6_InterruptControl,
2245 LPI2C6_InterruptGetStatus
2246 #endif /* RTE_I2C6_DMA_EN */
2247 };
2248
2249 #endif /* LPI2C6 */
2250
2251 #if defined(LPI2C7) && defined(RTE_I2C7) && RTE_I2C7
2252 /* User needs to provide the implementation for LPI2C7_GetFreq/InitPins/DeinitPins
2253 in the application for enabling according instance. */
2254 extern uint32_t LPI2C7_GetFreq(void);
2255
2256 static cmsis_lpi2c_resource_t LPI2C7_Resource = {LPI2C7, LPI2C7_GetFreq};
2257
2258 #if defined(RTE_I2C7_DMA_EN) && RTE_I2C7_DMA_EN
2259
2260 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
2261 static cmsis_lpi2c_edma_resource_t LPI2C7_EdmaResource = {
2262 RTE_I2C7_DMA_TX_DMA_BASE, RTE_I2C7_DMA_TX_CH, (uint16_t)RTE_I2C7_DMA_TX_PERI_SEL,
2263 RTE_I2C7_DMA_RX_DMA_BASE, RTE_I2C7_DMA_RX_CH, (uint16_t)RTE_I2C7_DMA_RX_PERI_SEL,
2264 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
2265 RTE_I2C7_DMA_TX_DMAMUX_BASE, RTE_I2C7_DMA_RX_DMAMUX_BASE,
2266 #endif
2267 };
2268
2269 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C7_EdmaHandle);
2270 static edma_handle_t LPI2C7_EdmaTxHandle;
2271 static edma_handle_t LPI2C7_EdmaRxHandle;
2272
2273 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2274 ARMCC_SECTION("lpi2c7_edma_driver_state")
2275 static cmsis_lpi2c_edma_driver_state_t LPI2C7_EdmaDriverState = {
2276 #else
2277 static cmsis_lpi2c_edma_driver_state_t LPI2C7_EdmaDriverState = {
2278 #endif
2279 &LPI2C7_Resource, &LPI2C7_EdmaResource, &LPI2C7_EdmaHandle, &LPI2C7_EdmaTxHandle, &LPI2C7_EdmaRxHandle,
2280 };
2281
LPI2C7_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)2282 static int32_t LPI2C7_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
2283 {
2284 #ifdef RTE_I2C7_PIN_INIT
2285 RTE_I2C7_PIN_INIT();
2286 #endif
2287 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C7_EdmaDriverState);
2288 }
2289
LPI2C7_Master_EdmaUninitialize(void)2290 static int32_t LPI2C7_Master_EdmaUninitialize(void)
2291 {
2292 #ifdef RTE_I2C7_PIN_DEINIT
2293 RTE_I2C7_PIN_DEINIT();
2294 #endif
2295 return LPI2C_Master_EdmaUninitialize(&LPI2C7_EdmaDriverState);
2296 }
2297
LPI2C7_Master_EdmaPowerControl(ARM_POWER_STATE state)2298 static int32_t LPI2C7_Master_EdmaPowerControl(ARM_POWER_STATE state)
2299 {
2300 return LPI2C_Master_EdmaPowerControl(state, &LPI2C7_EdmaDriverState);
2301 }
2302
LPI2C7_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)2303 static int32_t LPI2C7_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
2304 {
2305 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C7_EdmaDriverState);
2306 }
2307
LPI2C7_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)2308 static int32_t LPI2C7_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
2309 {
2310 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C7_EdmaDriverState);
2311 }
2312
LPI2C7_Master_EdmaGetDataCount(void)2313 static int32_t LPI2C7_Master_EdmaGetDataCount(void)
2314 {
2315 return LPI2C_Master_EdmaGetDataCount(&LPI2C7_EdmaDriverState);
2316 }
2317
LPI2C7_Master_EdmaControl(uint32_t control,uint32_t arg)2318 static int32_t LPI2C7_Master_EdmaControl(uint32_t control, uint32_t arg)
2319 {
2320 return LPI2C_Master_EdmaControl(control, arg, &LPI2C7_EdmaDriverState);
2321 }
2322
LPI2C7_Master_EdmaGetStatus(void)2323 static ARM_I2C_STATUS LPI2C7_Master_EdmaGetStatus(void)
2324 {
2325 return LPI2C_Master_EdmaGetStatus(&LPI2C7_EdmaDriverState);
2326 }
2327
2328 #endif
2329
2330 #else
2331
2332 static cmsis_i2c_handle_t LPI2C7_Handle;
2333
2334 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2335 ARMCC_SECTION("lpi2c7_interrupt_driver_state")
2336 static cmsis_lpi2c_interrupt_driver_state_t LPI2C7_InterruptDriverState = {
2337 #else
2338 static cmsis_lpi2c_interrupt_driver_state_t LPI2C7_InterruptDriverState = {
2339 #endif
2340 &LPI2C7_Resource,
2341 &LPI2C7_Handle,
2342 };
2343
KSDK_LPI2C7_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)2344 static void KSDK_LPI2C7_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
2345 {
2346 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C7_InterruptDriverState);
2347 }
2348
LPI2C7_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)2349 static int32_t LPI2C7_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
2350 {
2351 #ifdef RTE_I2C7_PIN_INIT
2352 RTE_I2C7_PIN_INIT();
2353 #endif
2354 return LPI2C_InterruptInitialize(cb_event, &LPI2C7_InterruptDriverState);
2355 }
2356
LPI2C7_InterruptUninitialize(void)2357 static int32_t LPI2C7_InterruptUninitialize(void)
2358 {
2359 #ifdef RTE_I2C7_PIN_DEINIT
2360 RTE_I2C7_PIN_DEINIT();
2361 #endif
2362 return LPI2C_InterruptUninitialize(&LPI2C7_InterruptDriverState);
2363 }
2364
LPI2C7_InterruptPowerControl(ARM_POWER_STATE state)2365 static int32_t LPI2C7_InterruptPowerControl(ARM_POWER_STATE state)
2366 {
2367 return LPI2C_InterruptPowerControl(state, &LPI2C7_InterruptDriverState);
2368 }
2369
LPI2C7_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)2370 static int32_t LPI2C7_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
2371 {
2372 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C7_InterruptDriverState);
2373 }
2374
LPI2C7_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)2375 static int32_t LPI2C7_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
2376 {
2377 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C7_InterruptDriverState);
2378 }
2379
LPI2C7_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)2380 static int32_t LPI2C7_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
2381 {
2382 LPI2C7_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C7_SLAVE_InterruptCallback;
2383 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C7_InterruptDriverState);
2384 }
2385
LPI2C7_Slave_InterruptReceive(uint8_t * data,uint32_t num)2386 static int32_t LPI2C7_Slave_InterruptReceive(uint8_t *data, uint32_t num)
2387 {
2388 LPI2C7_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C7_SLAVE_InterruptCallback;
2389 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C7_InterruptDriverState);
2390 }
2391
LPI2C7_InterruptGetDataCount(void)2392 static int32_t LPI2C7_InterruptGetDataCount(void)
2393 {
2394 return LPI2C_InterruptGetDataCount(&LPI2C7_InterruptDriverState);
2395 }
2396
LPI2C7_InterruptControl(uint32_t control,uint32_t arg)2397 static int32_t LPI2C7_InterruptControl(uint32_t control, uint32_t arg)
2398 {
2399 return LPI2C_InterruptControl(control, arg, &LPI2C7_InterruptDriverState);
2400 }
2401
LPI2C7_InterruptGetStatus(void)2402 static ARM_I2C_STATUS LPI2C7_InterruptGetStatus(void)
2403 {
2404 return LPI2C_InterruptGetStatus(&LPI2C7_InterruptDriverState);
2405 }
2406
2407 #endif /* RTE_I2C7_DMA_EN */
2408
2409 ARM_DRIVER_I2C Driver_I2C7 = {LPI2Cx_GetVersion,
2410 LPI2Cx_GetCapabilities,
2411 #if defined(RTE_I2C7_DMA_EN) && RTE_I2C7_DMA_EN
2412 LPI2C7_Master_EdmaInitialize,
2413 LPI2C7_Master_EdmaUninitialize,
2414 LPI2C7_Master_EdmaPowerControl,
2415 LPI2C7_Master_EdmaTransmit,
2416 LPI2C7_Master_EdmaReceive,
2417 NULL,
2418 NULL,
2419 LPI2C7_Master_EdmaGetDataCount,
2420 LPI2C7_Master_EdmaControl,
2421 LPI2C7_Master_EdmaGetStatus
2422 #else
2423 LPI2C7_InterruptInitialize,
2424 LPI2C7_InterruptUninitialize,
2425 LPI2C7_InterruptPowerControl,
2426 LPI2C7_Master_InterruptTransmit,
2427 LPI2C7_Master_InterruptReceive,
2428 LPI2C7_Slave_InterruptTransmit,
2429 LPI2C7_Slave_InterruptReceive,
2430 LPI2C7_InterruptGetDataCount,
2431 LPI2C7_InterruptControl,
2432 LPI2C7_InterruptGetStatus
2433 #endif /* RTE_I2C7_DMA_EN */
2434 };
2435
2436 #endif /* LPI2C7 */
2437
2438 #if defined(LPI2C8) && defined(RTE_I2C8) && RTE_I2C8
2439 /* User needs to provide the implementation for LPI2C8_GetFreq/InitPins/DeinitPins
2440 in the application for enabling according instance. */
2441 extern uint32_t LPI2C8_GetFreq(void);
2442
2443 static cmsis_lpi2c_resource_t LPI2C8_Resource = {LPI2C8, LPI2C8_GetFreq};
2444
2445 #if defined(RTE_I2C8_DMA_EN) && RTE_I2C8_DMA_EN
2446
2447 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
2448 static cmsis_lpi2c_edma_resource_t LPI2C8_EdmaResource = {
2449 RTE_I2C8_DMA_TX_DMA_BASE, RTE_I2C8_DMA_TX_CH, (uint16_t)RTE_I2C8_DMA_TX_PERI_SEL,
2450 RTE_I2C8_DMA_RX_DMA_BASE, RTE_I2C8_DMA_RX_CH, (uint16_t)RTE_I2C8_DMA_RX_PERI_SEL,
2451 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
2452 RTE_I2C8_DMA_TX_DMAMUX_BASE, RTE_I2C8_DMA_RX_DMAMUX_BASE,
2453 #endif
2454 };
2455
2456 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C8_EdmaHandle);
2457 static edma_handle_t LPI2C8_EdmaTxHandle;
2458 static edma_handle_t LPI2C8_EdmaRxHandle;
2459
2460 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2461 ARMCC_SECTION("lpi2c8_edma_driver_state")
2462 static cmsis_lpi2c_edma_driver_state_t LPI2C8_EdmaDriverState = {
2463 #else
2464 static cmsis_lpi2c_edma_driver_state_t LPI2C8_EdmaDriverState = {
2465 #endif
2466 &LPI2C8_Resource, &LPI2C8_EdmaResource, &LPI2C8_EdmaHandle, &LPI2C8_EdmaTxHandle, &LPI2C8_EdmaRxHandle,
2467 };
2468
LPI2C8_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)2469 static int32_t LPI2C8_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
2470 {
2471 #ifdef RTE_I2C8_PIN_INIT
2472 RTE_I2C8_PIN_INIT();
2473 #endif
2474 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C8_EdmaDriverState);
2475 }
2476
LPI2C8_Master_EdmaUninitialize(void)2477 static int32_t LPI2C8_Master_EdmaUninitialize(void)
2478 {
2479 #ifdef RTE_I2C8_PIN_DEINIT
2480 RTE_I2C8_PIN_DEINIT();
2481 #endif
2482 return LPI2C_Master_EdmaUninitialize(&LPI2C8_EdmaDriverState);
2483 }
2484
LPI2C8_Master_EdmaPowerControl(ARM_POWER_STATE state)2485 static int32_t LPI2C8_Master_EdmaPowerControl(ARM_POWER_STATE state)
2486 {
2487 return LPI2C_Master_EdmaPowerControl(state, &LPI2C8_EdmaDriverState);
2488 }
2489
LPI2C8_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)2490 static int32_t LPI2C8_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
2491 {
2492 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C8_EdmaDriverState);
2493 }
2494
LPI2C8_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)2495 static int32_t LPI2C8_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
2496 {
2497 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C8_EdmaDriverState);
2498 }
2499
LPI2C8_Master_EdmaGetDataCount(void)2500 static int32_t LPI2C8_Master_EdmaGetDataCount(void)
2501 {
2502 return LPI2C_Master_EdmaGetDataCount(&LPI2C8_EdmaDriverState);
2503 }
2504
LPI2C8_Master_EdmaControl(uint32_t control,uint32_t arg)2505 static int32_t LPI2C8_Master_EdmaControl(uint32_t control, uint32_t arg)
2506 {
2507 return LPI2C_Master_EdmaControl(control, arg, &LPI2C8_EdmaDriverState);
2508 }
2509
LPI2C8_Master_EdmaGetStatus(void)2510 static ARM_I2C_STATUS LPI2C8_Master_EdmaGetStatus(void)
2511 {
2512 return LPI2C_Master_EdmaGetStatus(&LPI2C8_EdmaDriverState);
2513 }
2514
2515 #endif
2516
2517 #else
2518
2519 static cmsis_i2c_handle_t LPI2C8_Handle;
2520
2521 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2522 ARMCC_SECTION("lpi2c8_interrupt_driver_state")
2523 static cmsis_lpi2c_interrupt_driver_state_t LPI2C8_InterruptDriverState = {
2524 #else
2525 static cmsis_lpi2c_interrupt_driver_state_t LPI2C8_InterruptDriverState = {
2526 #endif
2527 &LPI2C8_Resource,
2528 &LPI2C8_Handle,
2529 };
2530
KSDK_LPI2C8_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)2531 static void KSDK_LPI2C8_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
2532 {
2533 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C8_InterruptDriverState);
2534 }
2535
LPI2C8_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)2536 static int32_t LPI2C8_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
2537 {
2538 #ifdef RTE_I2C8_PIN_INIT
2539 RTE_I2C8_PIN_INIT();
2540 #endif
2541 return LPI2C_InterruptInitialize(cb_event, &LPI2C8_InterruptDriverState);
2542 }
2543
LPI2C8_InterruptUninitialize(void)2544 static int32_t LPI2C8_InterruptUninitialize(void)
2545 {
2546 #ifdef RTE_I2C8_PIN_DEINIT
2547 RTE_I2C8_PIN_DEINIT();
2548 #endif
2549 return LPI2C_InterruptUninitialize(&LPI2C8_InterruptDriverState);
2550 }
2551
LPI2C8_InterruptPowerControl(ARM_POWER_STATE state)2552 static int32_t LPI2C8_InterruptPowerControl(ARM_POWER_STATE state)
2553 {
2554 return LPI2C_InterruptPowerControl(state, &LPI2C8_InterruptDriverState);
2555 }
2556
LPI2C8_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)2557 static int32_t LPI2C8_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
2558 {
2559 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C8_InterruptDriverState);
2560 }
2561
LPI2C8_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)2562 static int32_t LPI2C8_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
2563 {
2564 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C8_InterruptDriverState);
2565 }
2566
LPI2C8_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)2567 static int32_t LPI2C8_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
2568 {
2569 LPI2C8_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C8_SLAVE_InterruptCallback;
2570 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C8_InterruptDriverState);
2571 }
2572
LPI2C8_Slave_InterruptReceive(uint8_t * data,uint32_t num)2573 static int32_t LPI2C8_Slave_InterruptReceive(uint8_t *data, uint32_t num)
2574 {
2575 LPI2C8_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C8_SLAVE_InterruptCallback;
2576 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C8_InterruptDriverState);
2577 }
2578
LPI2C8_InterruptGetDataCount(void)2579 static int32_t LPI2C8_InterruptGetDataCount(void)
2580 {
2581 return LPI2C_InterruptGetDataCount(&LPI2C8_InterruptDriverState);
2582 }
2583
LPI2C8_InterruptControl(uint32_t control,uint32_t arg)2584 static int32_t LPI2C8_InterruptControl(uint32_t control, uint32_t arg)
2585 {
2586 return LPI2C_InterruptControl(control, arg, &LPI2C8_InterruptDriverState);
2587 }
2588
LPI2C8_InterruptGetStatus(void)2589 static ARM_I2C_STATUS LPI2C8_InterruptGetStatus(void)
2590 {
2591 return LPI2C_InterruptGetStatus(&LPI2C8_InterruptDriverState);
2592 }
2593
2594 #endif /* RTE_I2C8_DMA_EN */
2595
2596 ARM_DRIVER_I2C Driver_I2C8 = {LPI2Cx_GetVersion,
2597 LPI2Cx_GetCapabilities,
2598 #if defined(RTE_I2C8_DMA_EN) && RTE_I2C8_DMA_EN
2599 LPI2C8_Master_EdmaInitialize,
2600 LPI2C8_Master_EdmaUninitialize,
2601 LPI2C8_Master_EdmaPowerControl,
2602 LPI2C8_Master_EdmaTransmit,
2603 LPI2C8_Master_EdmaReceive,
2604 NULL,
2605 NULL,
2606 LPI2C8_Master_EdmaGetDataCount,
2607 LPI2C8_Master_EdmaControl,
2608 LPI2C8_Master_EdmaGetStatus
2609 #else
2610 LPI2C8_InterruptInitialize,
2611 LPI2C8_InterruptUninitialize,
2612 LPI2C8_InterruptPowerControl,
2613 LPI2C8_Master_InterruptTransmit,
2614 LPI2C8_Master_InterruptReceive,
2615 LPI2C8_Slave_InterruptTransmit,
2616 LPI2C8_Slave_InterruptReceive,
2617 LPI2C8_InterruptGetDataCount,
2618 LPI2C8_InterruptControl,
2619 LPI2C8_InterruptGetStatus
2620 #endif /* RTE_I2C8_DMA_EN */
2621 };
2622
2623 #endif /* LPI2C8 */
2624
2625 #if defined(LPI2C9) && defined(RTE_I2C9) && RTE_I2C9
2626 /* User needs to provide the implementation for LPI2C9_GetFreq/InitPins/DeinitPins
2627 in the application for enabling according instance. */
2628 extern uint32_t LPI2C9_GetFreq(void);
2629
2630 static cmsis_lpi2c_resource_t LPI2C9_Resource = {LPI2C9, LPI2C9_GetFreq};
2631
2632 #if defined(RTE_I2C9_DMA_EN) && RTE_I2C9_DMA_EN
2633
2634 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
2635 static cmsis_lpi2c_edma_resource_t LPI2C9_EdmaResource = {
2636 RTE_I2C9_DMA_TX_DMA_BASE, RTE_I2C9_DMA_TX_CH, (uint16_t)RTE_I2C9_DMA_TX_PERI_SEL,
2637 RTE_I2C9_DMA_RX_DMA_BASE, RTE_I2C9_DMA_RX_CH, (uint16_t)RTE_I2C9_DMA_RX_PERI_SEL,
2638 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
2639 RTE_I2C9_DMA_TX_DMAMUX_BASE, RTE_I2C9_DMA_RX_DMAMUX_BASE,
2640 #endif
2641 };
2642
2643 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C9_EdmaHandle);
2644 static edma_handle_t LPI2C9_EdmaTxHandle;
2645 static edma_handle_t LPI2C9_EdmaRxHandle;
2646
2647 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2648 ARMCC_SECTION("lpi2c9_edma_driver_state")
2649 static cmsis_lpi2c_edma_driver_state_t LPI2C9_EdmaDriverState = {
2650 #else
2651 static cmsis_lpi2c_edma_driver_state_t LPI2C9_EdmaDriverState = {
2652 #endif
2653 &LPI2C9_Resource, &LPI2C9_EdmaResource, &LPI2C9_EdmaHandle, &LPI2C9_EdmaTxHandle, &LPI2C9_EdmaRxHandle,
2654 };
2655
LPI2C9_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)2656 static int32_t LPI2C9_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
2657 {
2658 #ifdef RTE_I2C9_PIN_INIT
2659 RTE_I2C9_PIN_INIT();
2660 #endif
2661 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C9_EdmaDriverState);
2662 }
2663
LPI2C9_Master_EdmaUninitialize(void)2664 static int32_t LPI2C9_Master_EdmaUninitialize(void)
2665 {
2666 #ifdef RTE_I2C9_PIN_DEINIT
2667 RTE_I2C9_PIN_DEINIT();
2668 #endif
2669 return LPI2C_Master_EdmaUninitialize(&LPI2C9_EdmaDriverState);
2670 }
2671
LPI2C9_Master_EdmaPowerControl(ARM_POWER_STATE state)2672 static int32_t LPI2C9_Master_EdmaPowerControl(ARM_POWER_STATE state)
2673 {
2674 return LPI2C_Master_EdmaPowerControl(state, &LPI2C9_EdmaDriverState);
2675 }
2676
LPI2C9_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)2677 static int32_t LPI2C9_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
2678 {
2679 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C9_EdmaDriverState);
2680 }
2681
LPI2C9_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)2682 static int32_t LPI2C9_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
2683 {
2684 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C9_EdmaDriverState);
2685 }
2686
LPI2C9_Master_EdmaGetDataCount(void)2687 static int32_t LPI2C9_Master_EdmaGetDataCount(void)
2688 {
2689 return LPI2C_Master_EdmaGetDataCount(&LPI2C9_EdmaDriverState);
2690 }
2691
LPI2C9_Master_EdmaControl(uint32_t control,uint32_t arg)2692 static int32_t LPI2C9_Master_EdmaControl(uint32_t control, uint32_t arg)
2693 {
2694 return LPI2C_Master_EdmaControl(control, arg, &LPI2C9_EdmaDriverState);
2695 }
2696
LPI2C9_Master_EdmaGetStatus(void)2697 static ARM_I2C_STATUS LPI2C9_Master_EdmaGetStatus(void)
2698 {
2699 return LPI2C_Master_EdmaGetStatus(&LPI2C9_EdmaDriverState);
2700 }
2701
2702 #endif
2703
2704 #else
2705
2706 static cmsis_i2c_handle_t LPI2C9_Handle;
2707
2708 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2709 ARMCC_SECTION("lpi2c9_interrupt_driver_state")
2710 static cmsis_lpi2c_interrupt_driver_state_t LPI2C9_InterruptDriverState = {
2711 #else
2712 static cmsis_lpi2c_interrupt_driver_state_t LPI2C9_InterruptDriverState = {
2713 #endif
2714 &LPI2C9_Resource,
2715 &LPI2C9_Handle,
2716 };
2717
KSDK_LPI2C9_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)2718 static void KSDK_LPI2C9_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
2719 {
2720 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C9_InterruptDriverState);
2721 }
2722
LPI2C9_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)2723 static int32_t LPI2C9_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
2724 {
2725 #ifdef RTE_I2C9_PIN_INIT
2726 RTE_I2C9_PIN_INIT();
2727 #endif
2728 return LPI2C_InterruptInitialize(cb_event, &LPI2C9_InterruptDriverState);
2729 }
2730
LPI2C9_InterruptUninitialize(void)2731 static int32_t LPI2C9_InterruptUninitialize(void)
2732 {
2733 #ifdef RTE_I2C9_PIN_DEINIT
2734 RTE_I2C9_PIN_DEINIT();
2735 #endif
2736 return LPI2C_InterruptUninitialize(&LPI2C9_InterruptDriverState);
2737 }
2738
LPI2C9_InterruptPowerControl(ARM_POWER_STATE state)2739 static int32_t LPI2C9_InterruptPowerControl(ARM_POWER_STATE state)
2740 {
2741 return LPI2C_InterruptPowerControl(state, &LPI2C9_InterruptDriverState);
2742 }
2743
LPI2C9_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)2744 static int32_t LPI2C9_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
2745 {
2746 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C9_InterruptDriverState);
2747 }
2748
LPI2C9_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)2749 static int32_t LPI2C9_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
2750 {
2751 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C9_InterruptDriverState);
2752 }
2753
LPI2C9_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)2754 static int32_t LPI2C9_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
2755 {
2756 LPI2C9_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C9_SLAVE_InterruptCallback;
2757 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C9_InterruptDriverState);
2758 }
2759
LPI2C9_Slave_InterruptReceive(uint8_t * data,uint32_t num)2760 static int32_t LPI2C9_Slave_InterruptReceive(uint8_t *data, uint32_t num)
2761 {
2762 LPI2C9_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C9_SLAVE_InterruptCallback;
2763 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C9_InterruptDriverState);
2764 }
2765
LPI2C9_InterruptGetDataCount(void)2766 static int32_t LPI2C9_InterruptGetDataCount(void)
2767 {
2768 return LPI2C_InterruptGetDataCount(&LPI2C9_InterruptDriverState);
2769 }
2770
LPI2C9_InterruptControl(uint32_t control,uint32_t arg)2771 static int32_t LPI2C9_InterruptControl(uint32_t control, uint32_t arg)
2772 {
2773 return LPI2C_InterruptControl(control, arg, &LPI2C9_InterruptDriverState);
2774 }
2775
LPI2C9_InterruptGetStatus(void)2776 static ARM_I2C_STATUS LPI2C9_InterruptGetStatus(void)
2777 {
2778 return LPI2C_InterruptGetStatus(&LPI2C9_InterruptDriverState);
2779 }
2780
2781 #endif /* RTE_I2C9_DMA_EN */
2782
2783 ARM_DRIVER_I2C Driver_I2C9 = {LPI2Cx_GetVersion,
2784 LPI2Cx_GetCapabilities,
2785 #if defined(RTE_I2C9_DMA_EN) && RTE_I2C9_DMA_EN
2786 LPI2C9_Master_EdmaInitialize,
2787 LPI2C9_Master_EdmaUninitialize,
2788 LPI2C9_Master_EdmaPowerControl,
2789 LPI2C9_Master_EdmaTransmit,
2790 LPI2C9_Master_EdmaReceive,
2791 NULL,
2792 NULL,
2793 LPI2C9_Master_EdmaGetDataCount,
2794 LPI2C9_Master_EdmaControl,
2795 LPI2C9_Master_EdmaGetStatus
2796 #else
2797 LPI2C9_InterruptInitialize,
2798 LPI2C9_InterruptUninitialize,
2799 LPI2C9_InterruptPowerControl,
2800 LPI2C9_Master_InterruptTransmit,
2801 LPI2C9_Master_InterruptReceive,
2802 LPI2C9_Slave_InterruptTransmit,
2803 LPI2C9_Slave_InterruptReceive,
2804 LPI2C9_InterruptGetDataCount,
2805 LPI2C9_InterruptControl,
2806 LPI2C9_InterruptGetStatus
2807 #endif /* RTE_I2C9_DMA_EN */
2808 };
2809
2810 #endif /* LPI2C9 */
2811
2812 #if defined(LPI2C10) && defined(RTE_I2C10) && RTE_I2C10
2813 /* User needs to provide the implementation for LPI2C10_GetFreq/InitPins/DeinitPins
2814 in the application for enabling according instance. */
2815 extern uint32_t LPI2C10_GetFreq(void);
2816
2817 static cmsis_lpi2c_resource_t LPI2C10_Resource = {LPI2C10, LPI2C10_GetFreq};
2818
2819 #if defined(RTE_I2C10_DMA_EN) && RTE_I2C10_DMA_EN
2820
2821 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
2822 static cmsis_lpi2c_edma_resource_t LPI2C10_EdmaResource = {
2823 RTE_I2C10_DMA_TX_DMA_BASE, RTE_I2C10_DMA_TX_CH, (uint16_t)RTE_I2C10_DMA_TX_PERI_SEL,
2824 RTE_I2C10_DMA_RX_DMA_BASE, RTE_I2C10_DMA_RX_CH, (uint16_t)RTE_I2C10_DMA_RX_PERI_SEL,
2825 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
2826 RTE_I2C10_DMA_TX_DMAMUX_BASE, RTE_I2C10_DMA_RX_DMAMUX_BASE,
2827 #endif
2828 };
2829
2830 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C10_EdmaHandle);
2831 static edma_handle_t LPI2C10_EdmaTxHandle;
2832 static edma_handle_t LPI2C10_EdmaRxHandle;
2833
2834 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2835 ARMCC_SECTION("lpi2c10_edma_driver_state")
2836 static cmsis_lpi2c_edma_driver_state_t LPI2C10_EdmaDriverState = {
2837 #else
2838 static cmsis_lpi2c_edma_driver_state_t LPI2C10_EdmaDriverState = {
2839 #endif
2840 &LPI2C10_Resource, &LPI2C10_EdmaResource, &LPI2C10_EdmaHandle, &LPI2C10_EdmaTxHandle, &LPI2C10_EdmaRxHandle,
2841 };
2842
LPI2C10_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)2843 static int32_t LPI2C10_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
2844 {
2845 #ifdef RTE_I2C10_PIN_INIT
2846 RTE_I2C10_PIN_INIT();
2847 #endif
2848 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C10_EdmaDriverState);
2849 }
2850
LPI2C10_Master_EdmaUninitialize(void)2851 static int32_t LPI2C10_Master_EdmaUninitialize(void)
2852 {
2853 #ifdef RTE_I2C10_PIN_DEINIT
2854 RTE_I2C10_PIN_DEINIT();
2855 #endif
2856 return LPI2C_Master_EdmaUninitialize(&LPI2C10_EdmaDriverState);
2857 }
2858
LPI2C10_Master_EdmaPowerControl(ARM_POWER_STATE state)2859 static int32_t LPI2C10_Master_EdmaPowerControl(ARM_POWER_STATE state)
2860 {
2861 return LPI2C_Master_EdmaPowerControl(state, &LPI2C10_EdmaDriverState);
2862 }
2863
LPI2C10_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)2864 static int32_t LPI2C10_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
2865 {
2866 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C10_EdmaDriverState);
2867 }
2868
LPI2C10_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)2869 static int32_t LPI2C10_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
2870 {
2871 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C10_EdmaDriverState);
2872 }
2873
LPI2C10_Master_EdmaGetDataCount(void)2874 static int32_t LPI2C10_Master_EdmaGetDataCount(void)
2875 {
2876 return LPI2C_Master_EdmaGetDataCount(&LPI2C10_EdmaDriverState);
2877 }
2878
LPI2C10_Master_EdmaControl(uint32_t control,uint32_t arg)2879 static int32_t LPI2C10_Master_EdmaControl(uint32_t control, uint32_t arg)
2880 {
2881 return LPI2C_Master_EdmaControl(control, arg, &LPI2C10_EdmaDriverState);
2882 }
2883
LPI2C10_Master_EdmaGetStatus(void)2884 static ARM_I2C_STATUS LPI2C10_Master_EdmaGetStatus(void)
2885 {
2886 return LPI2C_Master_EdmaGetStatus(&LPI2C10_EdmaDriverState);
2887 }
2888
2889 #endif
2890
2891 #else
2892
2893 static cmsis_i2c_handle_t LPI2C10_Handle;
2894
2895 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
2896 ARMCC_SECTION("lpi2c10_interrupt_driver_state")
2897 static cmsis_lpi2c_interrupt_driver_state_t LPI2C10_InterruptDriverState = {
2898 #else
2899 static cmsis_lpi2c_interrupt_driver_state_t LPI2C10_InterruptDriverState = {
2900 #endif
2901 &LPI2C10_Resource,
2902 &LPI2C10_Handle,
2903 };
2904
KSDK_LPI2C10_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)2905 static void KSDK_LPI2C10_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
2906 {
2907 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C10_InterruptDriverState);
2908 }
2909
LPI2C10_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)2910 static int32_t LPI2C10_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
2911 {
2912 #ifdef RTE_I2C10_PIN_INIT
2913 RTE_I2C10_PIN_INIT();
2914 #endif
2915 return LPI2C_InterruptInitialize(cb_event, &LPI2C10_InterruptDriverState);
2916 }
2917
LPI2C10_InterruptUninitialize(void)2918 static int32_t LPI2C10_InterruptUninitialize(void)
2919 {
2920 #ifdef RTE_I2C10_PIN_DEINIT
2921 RTE_I2C10_PIN_DEINIT();
2922 #endif
2923 return LPI2C_InterruptUninitialize(&LPI2C10_InterruptDriverState);
2924 }
2925
LPI2C10_InterruptPowerControl(ARM_POWER_STATE state)2926 static int32_t LPI2C10_InterruptPowerControl(ARM_POWER_STATE state)
2927 {
2928 return LPI2C_InterruptPowerControl(state, &LPI2C10_InterruptDriverState);
2929 }
2930
LPI2C10_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)2931 static int32_t LPI2C10_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
2932 {
2933 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C10_InterruptDriverState);
2934 }
2935
LPI2C10_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)2936 static int32_t LPI2C10_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
2937 {
2938 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C10_InterruptDriverState);
2939 }
2940
LPI2C10_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)2941 static int32_t LPI2C10_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
2942 {
2943 LPI2C10_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C10_SLAVE_InterruptCallback;
2944 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C10_InterruptDriverState);
2945 }
2946
LPI2C10_Slave_InterruptReceive(uint8_t * data,uint32_t num)2947 static int32_t LPI2C10_Slave_InterruptReceive(uint8_t *data, uint32_t num)
2948 {
2949 LPI2C10_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C10_SLAVE_InterruptCallback;
2950 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C10_InterruptDriverState);
2951 }
2952
LPI2C10_InterruptGetDataCount(void)2953 static int32_t LPI2C10_InterruptGetDataCount(void)
2954 {
2955 return LPI2C_InterruptGetDataCount(&LPI2C10_InterruptDriverState);
2956 }
2957
LPI2C10_InterruptControl(uint32_t control,uint32_t arg)2958 static int32_t LPI2C10_InterruptControl(uint32_t control, uint32_t arg)
2959 {
2960 return LPI2C_InterruptControl(control, arg, &LPI2C10_InterruptDriverState);
2961 }
2962
LPI2C10_InterruptGetStatus(void)2963 static ARM_I2C_STATUS LPI2C10_InterruptGetStatus(void)
2964 {
2965 return LPI2C_InterruptGetStatus(&LPI2C10_InterruptDriverState);
2966 }
2967
2968 #endif /* RTE_I2C10_DMA_EN */
2969
2970 ARM_DRIVER_I2C Driver_I2C10 = {LPI2Cx_GetVersion,
2971 LPI2Cx_GetCapabilities,
2972 #if defined(RTE_I2C10_DMA_EN) && RTE_I2C10_DMA_EN
2973 LPI2C10_Master_EdmaInitialize,
2974 LPI2C10_Master_EdmaUninitialize,
2975 LPI2C10_Master_EdmaPowerControl,
2976 LPI2C10_Master_EdmaTransmit,
2977 LPI2C10_Master_EdmaReceive,
2978 NULL,
2979 NULL,
2980 LPI2C10_Master_EdmaGetDataCount,
2981 LPI2C10_Master_EdmaControl,
2982 LPI2C10_Master_EdmaGetStatus
2983 #else
2984 LPI2C10_InterruptInitialize,
2985 LPI2C10_InterruptUninitialize,
2986 LPI2C10_InterruptPowerControl,
2987 LPI2C10_Master_InterruptTransmit,
2988 LPI2C10_Master_InterruptReceive,
2989 LPI2C10_Slave_InterruptTransmit,
2990 LPI2C10_Slave_InterruptReceive,
2991 LPI2C10_InterruptGetDataCount,
2992 LPI2C10_InterruptControl,
2993 LPI2C10_InterruptGetStatus
2994 #endif /* RTE_I2C10_DMA_EN */
2995 };
2996
2997 #endif /* LPI2C10 */
2998
2999 #if defined(LPI2C11) && defined(RTE_I2C11) && RTE_I2C11
3000 /* User needs to provide the implementation for LPI2C11_GetFreq/InitPins/DeinitPins
3001 in the application for enabling according instance. */
3002 extern uint32_t LPI2C11_GetFreq(void);
3003
3004 static cmsis_lpi2c_resource_t LPI2C11_Resource = {LPI2C11, LPI2C11_GetFreq};
3005
3006 #if defined(RTE_I2C11_DMA_EN) && RTE_I2C11_DMA_EN
3007
3008 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
3009 static cmsis_lpi2c_edma_resource_t LPI2C11_EdmaResource = {
3010 RTE_I2C11_DMA_TX_DMA_BASE, RTE_I2C11_DMA_TX_CH, (uint16_t)RTE_I2C11_DMA_TX_PERI_SEL,
3011 RTE_I2C11_DMA_RX_DMA_BASE, RTE_I2C11_DMA_RX_CH, (uint16_t)RTE_I2C11_DMA_RX_PERI_SEL,
3012 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
3013 RTE_I2C11_DMA_TX_DMAMUX_BASE, RTE_I2C11_DMA_RX_DMAMUX_BASE,
3014 #endif
3015 };
3016
3017 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C11_EdmaHandle);
3018 static edma_handle_t LPI2C11_EdmaTxHandle;
3019 static edma_handle_t LPI2C11_EdmaRxHandle;
3020
3021 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3022 ARMCC_SECTION("lpi2c11_edma_driver_state")
3023 static cmsis_lpi2c_edma_driver_state_t LPI2C11_EdmaDriverState = {
3024 #else
3025 static cmsis_lpi2c_edma_driver_state_t LPI2C11_EdmaDriverState = {
3026 #endif
3027 &LPI2C11_Resource, &LPI2C11_EdmaResource, &LPI2C11_EdmaHandle, &LPI2C11_EdmaTxHandle, &LPI2C11_EdmaRxHandle,
3028 };
3029
LPI2C11_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)3030 static int32_t LPI2C11_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
3031 {
3032 #ifdef RTE_I2C11_PIN_INIT
3033 RTE_I2C11_PIN_INIT();
3034 #endif
3035 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C11_EdmaDriverState);
3036 }
3037
LPI2C11_Master_EdmaUninitialize(void)3038 static int32_t LPI2C11_Master_EdmaUninitialize(void)
3039 {
3040 #ifdef RTE_I2C11_PIN_DEINIT
3041 RTE_I2C11_PIN_DEINIT();
3042 #endif
3043 return LPI2C_Master_EdmaUninitialize(&LPI2C11_EdmaDriverState);
3044 }
3045
LPI2C11_Master_EdmaPowerControl(ARM_POWER_STATE state)3046 static int32_t LPI2C11_Master_EdmaPowerControl(ARM_POWER_STATE state)
3047 {
3048 return LPI2C_Master_EdmaPowerControl(state, &LPI2C11_EdmaDriverState);
3049 }
3050
LPI2C11_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)3051 static int32_t LPI2C11_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
3052 {
3053 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C11_EdmaDriverState);
3054 }
3055
LPI2C11_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)3056 static int32_t LPI2C11_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
3057 {
3058 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C11_EdmaDriverState);
3059 }
3060
LPI2C11_Master_EdmaGetDataCount(void)3061 static int32_t LPI2C11_Master_EdmaGetDataCount(void)
3062 {
3063 return LPI2C_Master_EdmaGetDataCount(&LPI2C11_EdmaDriverState);
3064 }
3065
LPI2C11_Master_EdmaControl(uint32_t control,uint32_t arg)3066 static int32_t LPI2C11_Master_EdmaControl(uint32_t control, uint32_t arg)
3067 {
3068 return LPI2C_Master_EdmaControl(control, arg, &LPI2C11_EdmaDriverState);
3069 }
3070
LPI2C11_Master_EdmaGetStatus(void)3071 static ARM_I2C_STATUS LPI2C11_Master_EdmaGetStatus(void)
3072 {
3073 return LPI2C_Master_EdmaGetStatus(&LPI2C11_EdmaDriverState);
3074 }
3075
3076 #endif
3077
3078 #else
3079
3080 static cmsis_i2c_handle_t LPI2C11_Handle;
3081
3082 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3083 ARMCC_SECTION("lpi2c11_interrupt_driver_state")
3084 static cmsis_lpi2c_interrupt_driver_state_t LPI2C11_InterruptDriverState = {
3085 #else
3086 static cmsis_lpi2c_interrupt_driver_state_t LPI2C11_InterruptDriverState = {
3087 #endif
3088 &LPI2C11_Resource,
3089 &LPI2C11_Handle,
3090 };
3091
KSDK_LPI2C11_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)3092 static void KSDK_LPI2C11_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
3093 {
3094 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C11_InterruptDriverState);
3095 }
3096
LPI2C11_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)3097 static int32_t LPI2C11_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
3098 {
3099 #ifdef RTE_I2C11_PIN_INIT
3100 RTE_I2C11_PIN_INIT();
3101 #endif
3102 return LPI2C_InterruptInitialize(cb_event, &LPI2C11_InterruptDriverState);
3103 }
3104
LPI2C11_InterruptUninitialize(void)3105 static int32_t LPI2C11_InterruptUninitialize(void)
3106 {
3107 #ifdef RTE_I2C11_PIN_DEINIT
3108 RTE_I2C11_PIN_DEINIT();
3109 #endif
3110 return LPI2C_InterruptUninitialize(&LPI2C11_InterruptDriverState);
3111 }
3112
LPI2C11_InterruptPowerControl(ARM_POWER_STATE state)3113 static int32_t LPI2C11_InterruptPowerControl(ARM_POWER_STATE state)
3114 {
3115 return LPI2C_InterruptPowerControl(state, &LPI2C11_InterruptDriverState);
3116 }
3117
LPI2C11_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)3118 static int32_t LPI2C11_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
3119 {
3120 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C11_InterruptDriverState);
3121 }
3122
LPI2C11_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)3123 static int32_t LPI2C11_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
3124 {
3125 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C11_InterruptDriverState);
3126 }
3127
LPI2C11_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)3128 static int32_t LPI2C11_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
3129 {
3130 LPI2C11_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C11_SLAVE_InterruptCallback;
3131 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C11_InterruptDriverState);
3132 }
3133
LPI2C11_Slave_InterruptReceive(uint8_t * data,uint32_t num)3134 static int32_t LPI2C11_Slave_InterruptReceive(uint8_t *data, uint32_t num)
3135 {
3136 LPI2C11_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C11_SLAVE_InterruptCallback;
3137 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C11_InterruptDriverState);
3138 }
3139
LPI2C11_InterruptGetDataCount(void)3140 static int32_t LPI2C11_InterruptGetDataCount(void)
3141 {
3142 return LPI2C_InterruptGetDataCount(&LPI2C11_InterruptDriverState);
3143 }
3144
LPI2C11_InterruptControl(uint32_t control,uint32_t arg)3145 static int32_t LPI2C11_InterruptControl(uint32_t control, uint32_t arg)
3146 {
3147 return LPI2C_InterruptControl(control, arg, &LPI2C11_InterruptDriverState);
3148 }
3149
LPI2C11_InterruptGetStatus(void)3150 static ARM_I2C_STATUS LPI2C11_InterruptGetStatus(void)
3151 {
3152 return LPI2C_InterruptGetStatus(&LPI2C11_InterruptDriverState);
3153 }
3154
3155 #endif /* RTE_I2C11_DMA_EN */
3156
3157 ARM_DRIVER_I2C Driver_I2C11 = {LPI2Cx_GetVersion,
3158 LPI2Cx_GetCapabilities,
3159 #if defined(RTE_I2C11_DMA_EN) && RTE_I2C11_DMA_EN
3160 LPI2C11_Master_EdmaInitialize,
3161 LPI2C11_Master_EdmaUninitialize,
3162 LPI2C11_Master_EdmaPowerControl,
3163 LPI2C11_Master_EdmaTransmit,
3164 LPI2C11_Master_EdmaReceive,
3165 NULL,
3166 NULL,
3167 LPI2C11_Master_EdmaGetDataCount,
3168 LPI2C11_Master_EdmaControl,
3169 LPI2C11_Master_EdmaGetStatus
3170 #else
3171 LPI2C11_InterruptInitialize,
3172 LPI2C11_InterruptUninitialize,
3173 LPI2C11_InterruptPowerControl,
3174 LPI2C11_Master_InterruptTransmit,
3175 LPI2C11_Master_InterruptReceive,
3176 LPI2C11_Slave_InterruptTransmit,
3177 LPI2C11_Slave_InterruptReceive,
3178 LPI2C11_InterruptGetDataCount,
3179 LPI2C11_InterruptControl,
3180 LPI2C11_InterruptGetStatus
3181 #endif /* RTE_I2C11_DMA_EN */
3182 };
3183
3184 #endif /* LPI2C11 */
3185
3186 #if defined(LPI2C12) && defined(RTE_I2C12) && RTE_I2C12
3187 /* User needs to provide the implementation for LPI2C12_GetFreq/InitPins/DeinitPins
3188 in the application for enabling according instance. */
3189 extern uint32_t LPI2C12_GetFreq(void);
3190
3191 static cmsis_lpi2c_resource_t LPI2C12_Resource = {LPI2C12, LPI2C12_GetFreq};
3192
3193 #if defined(RTE_I2C12_DMA_EN) && RTE_I2C12_DMA_EN
3194
3195 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
3196 static cmsis_lpi2c_edma_resource_t LPI2C12_EdmaResource = {
3197 RTE_I2C12_DMA_TX_DMA_BASE, RTE_I2C12_DMA_TX_CH, (uint16_t)RTE_I2C12_DMA_TX_PERI_SEL,
3198 RTE_I2C12_DMA_RX_DMA_BASE, RTE_I2C12_DMA_RX_CH, (uint16_t)RTE_I2C12_DMA_RX_PERI_SEL,
3199 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
3200 RTE_I2C12_DMA_TX_DMAMUX_BASE, RTE_I2C12_DMA_RX_DMAMUX_BASE,
3201 #endif
3202 };
3203
3204 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C12_EdmaHandle);
3205 static edma_handle_t LPI2C12_EdmaTxHandle;
3206 static edma_handle_t LPI2C12_EdmaRxHandle;
3207
3208 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3209 ARMCC_SECTION("lpi2c12_edma_driver_state")
3210 static cmsis_lpi2c_edma_driver_state_t LPI2C12_EdmaDriverState = {
3211 #else
3212 static cmsis_lpi2c_edma_driver_state_t LPI2C12_EdmaDriverState = {
3213 #endif
3214 &LPI2C12_Resource, &LPI2C12_EdmaResource, &LPI2C12_EdmaHandle, &LPI2C12_EdmaTxHandle, &LPI2C12_EdmaRxHandle,
3215 };
3216
LPI2C12_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)3217 static int32_t LPI2C12_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
3218 {
3219 #ifdef RTE_I2C12_PIN_INIT
3220 RTE_I2C12_PIN_INIT();
3221 #endif
3222 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C12_EdmaDriverState);
3223 }
3224
LPI2C12_Master_EdmaUninitialize(void)3225 static int32_t LPI2C12_Master_EdmaUninitialize(void)
3226 {
3227 #ifdef RTE_I2C12_PIN_DEINIT
3228 RTE_I2C12_PIN_DEINIT();
3229 #endif
3230 return LPI2C_Master_EdmaUninitialize(&LPI2C12_EdmaDriverState);
3231 }
3232
LPI2C12_Master_EdmaPowerControl(ARM_POWER_STATE state)3233 static int32_t LPI2C12_Master_EdmaPowerControl(ARM_POWER_STATE state)
3234 {
3235 return LPI2C_Master_EdmaPowerControl(state, &LPI2C12_EdmaDriverState);
3236 }
3237
LPI2C12_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)3238 static int32_t LPI2C12_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
3239 {
3240 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C12_EdmaDriverState);
3241 }
3242
LPI2C12_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)3243 static int32_t LPI2C12_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
3244 {
3245 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C12_EdmaDriverState);
3246 }
3247
LPI2C12_Master_EdmaGetDataCount(void)3248 static int32_t LPI2C12_Master_EdmaGetDataCount(void)
3249 {
3250 return LPI2C_Master_EdmaGetDataCount(&LPI2C12_EdmaDriverState);
3251 }
3252
LPI2C12_Master_EdmaControl(uint32_t control,uint32_t arg)3253 static int32_t LPI2C12_Master_EdmaControl(uint32_t control, uint32_t arg)
3254 {
3255 return LPI2C_Master_EdmaControl(control, arg, &LPI2C12_EdmaDriverState);
3256 }
3257
LPI2C12_Master_EdmaGetStatus(void)3258 static ARM_I2C_STATUS LPI2C12_Master_EdmaGetStatus(void)
3259 {
3260 return LPI2C_Master_EdmaGetStatus(&LPI2C12_EdmaDriverState);
3261 }
3262
3263 #endif
3264
3265 #else
3266
3267 static cmsis_i2c_handle_t LPI2C12_Handle;
3268
3269 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3270 ARMCC_SECTION("lpi2c12_interrupt_driver_state")
3271 static cmsis_lpi2c_interrupt_driver_state_t LPI2C12_InterruptDriverState = {
3272 #else
3273 static cmsis_lpi2c_interrupt_driver_state_t LPI2C12_InterruptDriverState = {
3274 #endif
3275 &LPI2C12_Resource,
3276 &LPI2C12_Handle,
3277 };
3278
KSDK_LPI2C12_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)3279 static void KSDK_LPI2C12_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
3280 {
3281 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C12_InterruptDriverState);
3282 }
3283
LPI2C12_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)3284 static int32_t LPI2C12_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
3285 {
3286 #ifdef RTE_I2C12_PIN_INIT
3287 RTE_I2C12_PIN_INIT();
3288 #endif
3289 return LPI2C_InterruptInitialize(cb_event, &LPI2C12_InterruptDriverState);
3290 }
3291
LPI2C12_InterruptUninitialize(void)3292 static int32_t LPI2C12_InterruptUninitialize(void)
3293 {
3294 #ifdef RTE_I2C12_PIN_DEINIT
3295 RTE_I2C12_PIN_DEINIT();
3296 #endif
3297 return LPI2C_InterruptUninitialize(&LPI2C12_InterruptDriverState);
3298 }
3299
LPI2C12_InterruptPowerControl(ARM_POWER_STATE state)3300 static int32_t LPI2C12_InterruptPowerControl(ARM_POWER_STATE state)
3301 {
3302 return LPI2C_InterruptPowerControl(state, &LPI2C12_InterruptDriverState);
3303 }
3304
LPI2C12_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)3305 static int32_t LPI2C12_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
3306 {
3307 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C12_InterruptDriverState);
3308 }
3309
LPI2C12_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)3310 static int32_t LPI2C12_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
3311 {
3312 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C12_InterruptDriverState);
3313 }
3314
LPI2C12_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)3315 static int32_t LPI2C12_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
3316 {
3317 LPI2C12_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C12_SLAVE_InterruptCallback;
3318 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C12_InterruptDriverState);
3319 }
3320
LPI2C12_Slave_InterruptReceive(uint8_t * data,uint32_t num)3321 static int32_t LPI2C12_Slave_InterruptReceive(uint8_t *data, uint32_t num)
3322 {
3323 LPI2C12_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C12_SLAVE_InterruptCallback;
3324 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C12_InterruptDriverState);
3325 }
3326
LPI2C12_InterruptGetDataCount(void)3327 static int32_t LPI2C12_InterruptGetDataCount(void)
3328 {
3329 return LPI2C_InterruptGetDataCount(&LPI2C12_InterruptDriverState);
3330 }
3331
LPI2C12_InterruptControl(uint32_t control,uint32_t arg)3332 static int32_t LPI2C12_InterruptControl(uint32_t control, uint32_t arg)
3333 {
3334 return LPI2C_InterruptControl(control, arg, &LPI2C12_InterruptDriverState);
3335 }
3336
LPI2C12_InterruptGetStatus(void)3337 static ARM_I2C_STATUS LPI2C12_InterruptGetStatus(void)
3338 {
3339 return LPI2C_InterruptGetStatus(&LPI2C12_InterruptDriverState);
3340 }
3341
3342 #endif /* RTE_I2C12_DMA_EN */
3343
3344 ARM_DRIVER_I2C Driver_I2C12 = {LPI2Cx_GetVersion,
3345 LPI2Cx_GetCapabilities,
3346 #if defined(RTE_I2C12_DMA_EN) && RTE_I2C12_DMA_EN
3347 LPI2C12_Master_EdmaInitialize,
3348 LPI2C12_Master_EdmaUninitialize,
3349 LPI2C12_Master_EdmaPowerControl,
3350 LPI2C12_Master_EdmaTransmit,
3351 LPI2C12_Master_EdmaReceive,
3352 NULL,
3353 NULL,
3354 LPI2C12_Master_EdmaGetDataCount,
3355 LPI2C12_Master_EdmaControl,
3356 LPI2C12_Master_EdmaGetStatus
3357 #else
3358 LPI2C12_InterruptInitialize,
3359 LPI2C12_InterruptUninitialize,
3360 LPI2C12_InterruptPowerControl,
3361 LPI2C12_Master_InterruptTransmit,
3362 LPI2C12_Master_InterruptReceive,
3363 LPI2C12_Slave_InterruptTransmit,
3364 LPI2C12_Slave_InterruptReceive,
3365 LPI2C12_InterruptGetDataCount,
3366 LPI2C12_InterruptControl,
3367 LPI2C12_InterruptGetStatus
3368 #endif /* RTE_I2C12_DMA_EN */
3369 };
3370
3371 #endif /* LPI2C12 */
3372
3373 #if defined(LPI2C13) && defined(RTE_I2C13) && RTE_I2C13
3374 /* User needs to provide the implementation for LPI2C13_GetFreq/InitPins/DeinitPins
3375 in the application for enabling according instance. */
3376 extern uint32_t LPI2C13_GetFreq(void);
3377
3378 static cmsis_lpi2c_resource_t LPI2C13_Resource = {LPI2C13, LPI2C13_GetFreq};
3379
3380 #if defined(RTE_I2C13_DMA_EN) && RTE_I2C13_DMA_EN
3381
3382 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
3383 static cmsis_lpi2c_edma_resource_t LPI2C13_EdmaResource = {
3384 RTE_I2C13_DMA_TX_DMA_BASE, RTE_I2C13_DMA_TX_CH, (uint16_t)RTE_I2C13_DMA_TX_PERI_SEL,
3385 RTE_I2C13_DMA_RX_DMA_BASE, RTE_I2C13_DMA_RX_CH, (uint16_t)RTE_I2C13_DMA_RX_PERI_SEL,
3386 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
3387 RTE_I2C13_DMA_TX_DMAMUX_BASE, RTE_I2C13_DMA_RX_DMAMUX_BASE,
3388 #endif
3389 };
3390
3391 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C13_EdmaHandle);
3392 static edma_handle_t LPI2C13_EdmaTxHandle;
3393 static edma_handle_t LPI2C13_EdmaRxHandle;
3394
3395 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3396 ARMCC_SECTION("lpi2c13_edma_driver_state")
3397 static cmsis_lpi2c_edma_driver_state_t LPI2C13_EdmaDriverState = {
3398 #else
3399 static cmsis_lpi2c_edma_driver_state_t LPI2C13_EdmaDriverState = {
3400 #endif
3401 &LPI2C13_Resource, &LPI2C13_EdmaResource, &LPI2C13_EdmaHandle, &LPI2C13_EdmaTxHandle, &LPI2C13_EdmaRxHandle,
3402 };
3403
LPI2C13_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)3404 static int32_t LPI2C13_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
3405 {
3406 #ifdef RTE_I2C13_PIN_INIT
3407 RTE_I2C13_PIN_INIT();
3408 #endif
3409 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C13_EdmaDriverState);
3410 }
3411
LPI2C13_Master_EdmaUninitialize(void)3412 static int32_t LPI2C13_Master_EdmaUninitialize(void)
3413 {
3414 #ifdef RTE_I2C13_PIN_DEINIT
3415 RTE_I2C13_PIN_DEINIT();
3416 #endif
3417 return LPI2C_Master_EdmaUninitialize(&LPI2C13_EdmaDriverState);
3418 }
3419
LPI2C13_Master_EdmaPowerControl(ARM_POWER_STATE state)3420 static int32_t LPI2C13_Master_EdmaPowerControl(ARM_POWER_STATE state)
3421 {
3422 return LPI2C_Master_EdmaPowerControl(state, &LPI2C13_EdmaDriverState);
3423 }
3424
LPI2C13_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)3425 static int32_t LPI2C13_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
3426 {
3427 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C13_EdmaDriverState);
3428 }
3429
LPI2C13_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)3430 static int32_t LPI2C13_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
3431 {
3432 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C13_EdmaDriverState);
3433 }
3434
LPI2C13_Master_EdmaGetDataCount(void)3435 static int32_t LPI2C13_Master_EdmaGetDataCount(void)
3436 {
3437 return LPI2C_Master_EdmaGetDataCount(&LPI2C13_EdmaDriverState);
3438 }
3439
LPI2C13_Master_EdmaControl(uint32_t control,uint32_t arg)3440 static int32_t LPI2C13_Master_EdmaControl(uint32_t control, uint32_t arg)
3441 {
3442 return LPI2C_Master_EdmaControl(control, arg, &LPI2C13_EdmaDriverState);
3443 }
3444
LPI2C13_Master_EdmaGetStatus(void)3445 static ARM_I2C_STATUS LPI2C13_Master_EdmaGetStatus(void)
3446 {
3447 return LPI2C_Master_EdmaGetStatus(&LPI2C13_EdmaDriverState);
3448 }
3449
3450 #endif
3451
3452 #else
3453
3454 static cmsis_i2c_handle_t LPI2C13_Handle;
3455
3456 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3457 ARMCC_SECTION("lpi2c13_interrupt_driver_state")
3458 static cmsis_lpi2c_interrupt_driver_state_t LPI2C13_InterruptDriverState = {
3459 #else
3460 static cmsis_lpi2c_interrupt_driver_state_t LPI2C13_InterruptDriverState = {
3461 #endif
3462 &LPI2C13_Resource,
3463 &LPI2C13_Handle,
3464 };
3465
KSDK_LPI2C13_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)3466 static void KSDK_LPI2C13_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
3467 {
3468 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C13_InterruptDriverState);
3469 }
3470
LPI2C13_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)3471 static int32_t LPI2C13_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
3472 {
3473 #ifdef RTE_I2C13_PIN_INIT
3474 RTE_I2C13_PIN_INIT();
3475 #endif
3476 return LPI2C_InterruptInitialize(cb_event, &LPI2C13_InterruptDriverState);
3477 }
3478
LPI2C13_InterruptUninitialize(void)3479 static int32_t LPI2C13_InterruptUninitialize(void)
3480 {
3481 #ifdef RTE_I2C13_PIN_DEINIT
3482 RTE_I2C13_PIN_DEINIT();
3483 #endif
3484 return LPI2C_InterruptUninitialize(&LPI2C13_InterruptDriverState);
3485 }
3486
LPI2C13_InterruptPowerControl(ARM_POWER_STATE state)3487 static int32_t LPI2C13_InterruptPowerControl(ARM_POWER_STATE state)
3488 {
3489 return LPI2C_InterruptPowerControl(state, &LPI2C13_InterruptDriverState);
3490 }
3491
LPI2C13_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)3492 static int32_t LPI2C13_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
3493 {
3494 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C13_InterruptDriverState);
3495 }
3496
LPI2C13_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)3497 static int32_t LPI2C13_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
3498 {
3499 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C13_InterruptDriverState);
3500 }
3501
LPI2C13_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)3502 static int32_t LPI2C13_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
3503 {
3504 LPI2C13_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C13_SLAVE_InterruptCallback;
3505 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C13_InterruptDriverState);
3506 }
3507
LPI2C13_Slave_InterruptReceive(uint8_t * data,uint32_t num)3508 static int32_t LPI2C13_Slave_InterruptReceive(uint8_t *data, uint32_t num)
3509 {
3510 LPI2C13_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C13_SLAVE_InterruptCallback;
3511 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C13_InterruptDriverState);
3512 }
3513
LPI2C13_InterruptGetDataCount(void)3514 static int32_t LPI2C13_InterruptGetDataCount(void)
3515 {
3516 return LPI2C_InterruptGetDataCount(&LPI2C13_InterruptDriverState);
3517 }
3518
LPI2C13_InterruptControl(uint32_t control,uint32_t arg)3519 static int32_t LPI2C13_InterruptControl(uint32_t control, uint32_t arg)
3520 {
3521 return LPI2C_InterruptControl(control, arg, &LPI2C13_InterruptDriverState);
3522 }
3523
LPI2C13_InterruptGetStatus(void)3524 static ARM_I2C_STATUS LPI2C13_InterruptGetStatus(void)
3525 {
3526 return LPI2C_InterruptGetStatus(&LPI2C13_InterruptDriverState);
3527 }
3528
3529 #endif /* RTE_I2C13_DMA_EN */
3530
3531 ARM_DRIVER_I2C Driver_I2C13 = {LPI2Cx_GetVersion,
3532 LPI2Cx_GetCapabilities,
3533 #if defined(RTE_I2C13_DMA_EN) && RTE_I2C13_DMA_EN
3534 LPI2C13_Master_EdmaInitialize,
3535 LPI2C13_Master_EdmaUninitialize,
3536 LPI2C13_Master_EdmaPowerControl,
3537 LPI2C13_Master_EdmaTransmit,
3538 LPI2C13_Master_EdmaReceive,
3539 NULL,
3540 NULL,
3541 LPI2C13_Master_EdmaGetDataCount,
3542 LPI2C13_Master_EdmaControl,
3543 LPI2C13_Master_EdmaGetStatus
3544 #else
3545 LPI2C13_InterruptInitialize,
3546 LPI2C13_InterruptUninitialize,
3547 LPI2C13_InterruptPowerControl,
3548 LPI2C13_Master_InterruptTransmit,
3549 LPI2C13_Master_InterruptReceive,
3550 LPI2C13_Slave_InterruptTransmit,
3551 LPI2C13_Slave_InterruptReceive,
3552 LPI2C13_InterruptGetDataCount,
3553 LPI2C13_InterruptControl,
3554 LPI2C13_InterruptGetStatus
3555 #endif /* RTE_I2C13_DMA_EN */
3556 };
3557
3558 #endif /* LPI2C13 */
3559
3560 #if defined(LPI2C14) && defined(RTE_I2C14) && RTE_I2C14
3561 /* User needs to provide the implementation for LPI2C14_GetFreq/InitPins/DeinitPins
3562 in the application for enabling according instance. */
3563 extern uint32_t LPI2C14_GetFreq(void);
3564
3565 static cmsis_lpi2c_resource_t LPI2C14_Resource = {LPI2C14, LPI2C14_GetFreq};
3566
3567 #if defined(RTE_I2C14_DMA_EN) && RTE_I2C14_DMA_EN
3568
3569 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
3570 static cmsis_lpi2c_edma_resource_t LPI2C14_EdmaResource = {
3571 RTE_I2C14_DMA_TX_DMA_BASE, RTE_I2C14_DMA_TX_CH, (uint16_t)RTE_I2C14_DMA_TX_PERI_SEL,
3572 RTE_I2C14_DMA_RX_DMA_BASE, RTE_I2C14_DMA_RX_CH, (uint16_t)RTE_I2C14_DMA_RX_PERI_SEL,
3573 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
3574 RTE_I2C14_DMA_TX_DMAMUX_BASE, RTE_I2C14_DMA_RX_DMAMUX_BASE,
3575 #endif
3576 };
3577
3578 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C14_EdmaHandle);
3579 static edma_handle_t LPI2C14_EdmaTxHandle;
3580 static edma_handle_t LPI2C14_EdmaRxHandle;
3581
3582 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3583 ARMCC_SECTION("lpi2c14_edma_driver_state")
3584 static cmsis_lpi2c_edma_driver_state_t LPI2C14_EdmaDriverState = {
3585 #else
3586 static cmsis_lpi2c_edma_driver_state_t LPI2C14_EdmaDriverState = {
3587 #endif
3588 &LPI2C14_Resource, &LPI2C14_EdmaResource, &LPI2C14_EdmaHandle, &LPI2C14_EdmaTxHandle, &LPI2C14_EdmaRxHandle,
3589 };
3590
LPI2C14_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)3591 static int32_t LPI2C14_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
3592 {
3593 #ifdef RTE_I2C14_PIN_INIT
3594 RTE_I2C14_PIN_INIT();
3595 #endif
3596 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C14_EdmaDriverState);
3597 }
3598
LPI2C14_Master_EdmaUninitialize(void)3599 static int32_t LPI2C14_Master_EdmaUninitialize(void)
3600 {
3601 #ifdef RTE_I2C14_PIN_DEINIT
3602 RTE_I2C14_PIN_DEINIT();
3603 #endif
3604 return LPI2C_Master_EdmaUninitialize(&LPI2C14_EdmaDriverState);
3605 }
3606
LPI2C14_Master_EdmaPowerControl(ARM_POWER_STATE state)3607 static int32_t LPI2C14_Master_EdmaPowerControl(ARM_POWER_STATE state)
3608 {
3609 return LPI2C_Master_EdmaPowerControl(state, &LPI2C14_EdmaDriverState);
3610 }
3611
LPI2C14_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)3612 static int32_t LPI2C14_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
3613 {
3614 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C14_EdmaDriverState);
3615 }
3616
LPI2C14_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)3617 static int32_t LPI2C14_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
3618 {
3619 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C14_EdmaDriverState);
3620 }
3621
LPI2C14_Master_EdmaGetDataCount(void)3622 static int32_t LPI2C14_Master_EdmaGetDataCount(void)
3623 {
3624 return LPI2C_Master_EdmaGetDataCount(&LPI2C14_EdmaDriverState);
3625 }
3626
LPI2C14_Master_EdmaControl(uint32_t control,uint32_t arg)3627 static int32_t LPI2C14_Master_EdmaControl(uint32_t control, uint32_t arg)
3628 {
3629 return LPI2C_Master_EdmaControl(control, arg, &LPI2C14_EdmaDriverState);
3630 }
3631
LPI2C14_Master_EdmaGetStatus(void)3632 static ARM_I2C_STATUS LPI2C14_Master_EdmaGetStatus(void)
3633 {
3634 return LPI2C_Master_EdmaGetStatus(&LPI2C14_EdmaDriverState);
3635 }
3636
3637 #endif
3638
3639 #else
3640
3641 static cmsis_i2c_handle_t LPI2C14_Handle;
3642
3643 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3644 ARMCC_SECTION("lpi2c14_interrupt_driver_state")
3645 static cmsis_lpi2c_interrupt_driver_state_t LPI2C14_InterruptDriverState = {
3646 #else
3647 static cmsis_lpi2c_interrupt_driver_state_t LPI2C14_InterruptDriverState = {
3648 #endif
3649 &LPI2C14_Resource,
3650 &LPI2C14_Handle,
3651 };
3652
KSDK_LPI2C14_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)3653 static void KSDK_LPI2C14_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
3654 {
3655 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C14_InterruptDriverState);
3656 }
3657
LPI2C14_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)3658 static int32_t LPI2C14_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
3659 {
3660 #ifdef RTE_I2C14_PIN_INIT
3661 RTE_I2C14_PIN_INIT();
3662 #endif
3663 return LPI2C_InterruptInitialize(cb_event, &LPI2C14_InterruptDriverState);
3664 }
3665
LPI2C14_InterruptUninitialize(void)3666 static int32_t LPI2C14_InterruptUninitialize(void)
3667 {
3668 #ifdef RTE_I2C14_PIN_DEINIT
3669 RTE_I2C14_PIN_DEINIT();
3670 #endif
3671 return LPI2C_InterruptUninitialize(&LPI2C14_InterruptDriverState);
3672 }
3673
LPI2C14_InterruptPowerControl(ARM_POWER_STATE state)3674 static int32_t LPI2C14_InterruptPowerControl(ARM_POWER_STATE state)
3675 {
3676 return LPI2C_InterruptPowerControl(state, &LPI2C14_InterruptDriverState);
3677 }
3678
LPI2C14_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)3679 static int32_t LPI2C14_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
3680 {
3681 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C14_InterruptDriverState);
3682 }
3683
LPI2C14_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)3684 static int32_t LPI2C14_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
3685 {
3686 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C14_InterruptDriverState);
3687 }
3688
LPI2C14_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)3689 static int32_t LPI2C14_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
3690 {
3691 LPI2C14_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C14_SLAVE_InterruptCallback;
3692 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C14_InterruptDriverState);
3693 }
3694
LPI2C14_Slave_InterruptReceive(uint8_t * data,uint32_t num)3695 static int32_t LPI2C14_Slave_InterruptReceive(uint8_t *data, uint32_t num)
3696 {
3697 LPI2C14_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C14_SLAVE_InterruptCallback;
3698 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C14_InterruptDriverState);
3699 }
3700
LPI2C14_InterruptGetDataCount(void)3701 static int32_t LPI2C14_InterruptGetDataCount(void)
3702 {
3703 return LPI2C_InterruptGetDataCount(&LPI2C14_InterruptDriverState);
3704 }
3705
LPI2C14_InterruptControl(uint32_t control,uint32_t arg)3706 static int32_t LPI2C14_InterruptControl(uint32_t control, uint32_t arg)
3707 {
3708 return LPI2C_InterruptControl(control, arg, &LPI2C14_InterruptDriverState);
3709 }
3710
LPI2C14_InterruptGetStatus(void)3711 static ARM_I2C_STATUS LPI2C14_InterruptGetStatus(void)
3712 {
3713 return LPI2C_InterruptGetStatus(&LPI2C14_InterruptDriverState);
3714 }
3715
3716 #endif /* RTE_I2C14_DMA_EN */
3717
3718 ARM_DRIVER_I2C Driver_I2C14 = {LPI2Cx_GetVersion,
3719 LPI2Cx_GetCapabilities,
3720 #if defined(RTE_I2C14_DMA_EN) && RTE_I2C14_DMA_EN
3721 LPI2C14_Master_EdmaInitialize,
3722 LPI2C14_Master_EdmaUninitialize,
3723 LPI2C14_Master_EdmaPowerControl,
3724 LPI2C14_Master_EdmaTransmit,
3725 LPI2C14_Master_EdmaReceive,
3726 NULL,
3727 NULL,
3728 LPI2C14_Master_EdmaGetDataCount,
3729 LPI2C14_Master_EdmaControl,
3730 LPI2C14_Master_EdmaGetStatus
3731 #else
3732 LPI2C14_InterruptInitialize,
3733 LPI2C14_InterruptUninitialize,
3734 LPI2C14_InterruptPowerControl,
3735 LPI2C14_Master_InterruptTransmit,
3736 LPI2C14_Master_InterruptReceive,
3737 LPI2C14_Slave_InterruptTransmit,
3738 LPI2C14_Slave_InterruptReceive,
3739 LPI2C14_InterruptGetDataCount,
3740 LPI2C14_InterruptControl,
3741 LPI2C14_InterruptGetStatus
3742 #endif /* RTE_I2C14_DMA_EN */
3743 };
3744
3745 #endif /* LPI2C14 */
3746
3747 #if defined(LPI2C15) && defined(RTE_I2C15) && RTE_I2C15
3748 /* User needs to provide the implementation for LPI2C15_GetFreq/InitPins/DeinitPins
3749 in the application for enabling according instance. */
3750 extern uint32_t LPI2C15_GetFreq(void);
3751
3752 static cmsis_lpi2c_resource_t LPI2C15_Resource = {LPI2C15, LPI2C15_GetFreq};
3753
3754 #if defined(RTE_I2C15_DMA_EN) && RTE_I2C15_DMA_EN
3755
3756 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
3757 static cmsis_lpi2c_edma_resource_t LPI2C15_EdmaResource = {
3758 RTE_I2C15_DMA_TX_DMA_BASE, RTE_I2C15_DMA_TX_CH, (uint16_t)RTE_I2C15_DMA_TX_PERI_SEL,
3759 RTE_I2C15_DMA_RX_DMA_BASE, RTE_I2C15_DMA_RX_CH, (uint16_t)RTE_I2C15_DMA_RX_PERI_SEL,
3760 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
3761 RTE_I2C15_DMA_TX_DMAMUX_BASE, RTE_I2C15_DMA_RX_DMAMUX_BASE,
3762 #endif
3763 };
3764
3765 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C15_EdmaHandle);
3766 static edma_handle_t LPI2C15_EdmaTxHandle;
3767 static edma_handle_t LPI2C15_EdmaRxHandle;
3768
3769 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3770 ARMCC_SECTION("lpi2c15_edma_driver_state")
3771 static cmsis_lpi2c_edma_driver_state_t LPI2C15_EdmaDriverState = {
3772 #else
3773 static cmsis_lpi2c_edma_driver_state_t LPI2C15_EdmaDriverState = {
3774 #endif
3775 &LPI2C15_Resource, &LPI2C15_EdmaResource, &LPI2C15_EdmaHandle, &LPI2C15_EdmaTxHandle, &LPI2C15_EdmaRxHandle,
3776 };
3777
LPI2C15_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)3778 static int32_t LPI2C15_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
3779 {
3780 #ifdef RTE_I2C15_PIN_INIT
3781 RTE_I2C15_PIN_INIT();
3782 #endif
3783 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C15_EdmaDriverState);
3784 }
3785
LPI2C15_Master_EdmaUninitialize(void)3786 static int32_t LPI2C15_Master_EdmaUninitialize(void)
3787 {
3788 #ifdef RTE_I2C15_PIN_DEINIT
3789 RTE_I2C15_PIN_DEINIT();
3790 #endif
3791 return LPI2C_Master_EdmaUninitialize(&LPI2C15_EdmaDriverState);
3792 }
3793
LPI2C15_Master_EdmaPowerControl(ARM_POWER_STATE state)3794 static int32_t LPI2C15_Master_EdmaPowerControl(ARM_POWER_STATE state)
3795 {
3796 return LPI2C_Master_EdmaPowerControl(state, &LPI2C15_EdmaDriverState);
3797 }
3798
LPI2C15_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)3799 static int32_t LPI2C15_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
3800 {
3801 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C15_EdmaDriverState);
3802 }
3803
LPI2C15_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)3804 static int32_t LPI2C15_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
3805 {
3806 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C15_EdmaDriverState);
3807 }
3808
LPI2C15_Master_EdmaGetDataCount(void)3809 static int32_t LPI2C15_Master_EdmaGetDataCount(void)
3810 {
3811 return LPI2C_Master_EdmaGetDataCount(&LPI2C15_EdmaDriverState);
3812 }
3813
LPI2C15_Master_EdmaControl(uint32_t control,uint32_t arg)3814 static int32_t LPI2C15_Master_EdmaControl(uint32_t control, uint32_t arg)
3815 {
3816 return LPI2C_Master_EdmaControl(control, arg, &LPI2C15_EdmaDriverState);
3817 }
3818
LPI2C15_Master_EdmaGetStatus(void)3819 static ARM_I2C_STATUS LPI2C15_Master_EdmaGetStatus(void)
3820 {
3821 return LPI2C_Master_EdmaGetStatus(&LPI2C15_EdmaDriverState);
3822 }
3823
3824 #endif
3825
3826 #else
3827
3828 static cmsis_i2c_handle_t LPI2C15_Handle;
3829
3830 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3831 ARMCC_SECTION("lpi2c15_interrupt_driver_state")
3832 static cmsis_lpi2c_interrupt_driver_state_t LPI2C15_InterruptDriverState = {
3833 #else
3834 static cmsis_lpi2c_interrupt_driver_state_t LPI2C15_InterruptDriverState = {
3835 #endif
3836 &LPI2C15_Resource,
3837 &LPI2C15_Handle,
3838 };
3839
KSDK_LPI2C15_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)3840 static void KSDK_LPI2C15_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
3841 {
3842 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C15_InterruptDriverState);
3843 }
3844
LPI2C15_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)3845 static int32_t LPI2C15_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
3846 {
3847 #ifdef RTE_I2C15_PIN_INIT
3848 RTE_I2C15_PIN_INIT();
3849 #endif
3850 return LPI2C_InterruptInitialize(cb_event, &LPI2C15_InterruptDriverState);
3851 }
3852
LPI2C15_InterruptUninitialize(void)3853 static int32_t LPI2C15_InterruptUninitialize(void)
3854 {
3855 #ifdef RTE_I2C15_PIN_DEINIT
3856 RTE_I2C15_PIN_DEINIT();
3857 #endif
3858 return LPI2C_InterruptUninitialize(&LPI2C15_InterruptDriverState);
3859 }
3860
LPI2C15_InterruptPowerControl(ARM_POWER_STATE state)3861 static int32_t LPI2C15_InterruptPowerControl(ARM_POWER_STATE state)
3862 {
3863 return LPI2C_InterruptPowerControl(state, &LPI2C15_InterruptDriverState);
3864 }
3865
LPI2C15_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)3866 static int32_t LPI2C15_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
3867 {
3868 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C15_InterruptDriverState);
3869 }
3870
LPI2C15_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)3871 static int32_t LPI2C15_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
3872 {
3873 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C15_InterruptDriverState);
3874 }
3875
LPI2C15_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)3876 static int32_t LPI2C15_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
3877 {
3878 LPI2C15_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C15_SLAVE_InterruptCallback;
3879 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C15_InterruptDriverState);
3880 }
3881
LPI2C15_Slave_InterruptReceive(uint8_t * data,uint32_t num)3882 static int32_t LPI2C15_Slave_InterruptReceive(uint8_t *data, uint32_t num)
3883 {
3884 LPI2C15_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C15_SLAVE_InterruptCallback;
3885 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C15_InterruptDriverState);
3886 }
3887
LPI2C15_InterruptGetDataCount(void)3888 static int32_t LPI2C15_InterruptGetDataCount(void)
3889 {
3890 return LPI2C_InterruptGetDataCount(&LPI2C15_InterruptDriverState);
3891 }
3892
LPI2C15_InterruptControl(uint32_t control,uint32_t arg)3893 static int32_t LPI2C15_InterruptControl(uint32_t control, uint32_t arg)
3894 {
3895 return LPI2C_InterruptControl(control, arg, &LPI2C15_InterruptDriverState);
3896 }
3897
LPI2C15_InterruptGetStatus(void)3898 static ARM_I2C_STATUS LPI2C15_InterruptGetStatus(void)
3899 {
3900 return LPI2C_InterruptGetStatus(&LPI2C15_InterruptDriverState);
3901 }
3902
3903 #endif /* RTE_I2C15_DMA_EN */
3904
3905 ARM_DRIVER_I2C Driver_I2C15 = {LPI2Cx_GetVersion,
3906 LPI2Cx_GetCapabilities,
3907 #if defined(RTE_I2C15_DMA_EN) && RTE_I2C15_DMA_EN
3908 LPI2C15_Master_EdmaInitialize,
3909 LPI2C15_Master_EdmaUninitialize,
3910 LPI2C15_Master_EdmaPowerControl,
3911 LPI2C15_Master_EdmaTransmit,
3912 LPI2C15_Master_EdmaReceive,
3913 NULL,
3914 NULL,
3915 LPI2C15_Master_EdmaGetDataCount,
3916 LPI2C15_Master_EdmaControl,
3917 LPI2C15_Master_EdmaGetStatus
3918 #else
3919 LPI2C15_InterruptInitialize,
3920 LPI2C15_InterruptUninitialize,
3921 LPI2C15_InterruptPowerControl,
3922 LPI2C15_Master_InterruptTransmit,
3923 LPI2C15_Master_InterruptReceive,
3924 LPI2C15_Slave_InterruptTransmit,
3925 LPI2C15_Slave_InterruptReceive,
3926 LPI2C15_InterruptGetDataCount,
3927 LPI2C15_InterruptControl,
3928 LPI2C15_InterruptGetStatus
3929 #endif /* RTE_I2C15_DMA_EN */
3930 };
3931
3932 #endif /* LPI2C15 */
3933
3934 #if defined(LPI2C16) && defined(RTE_I2C16) && RTE_I2C16
3935 /* User needs to provide the implementation for LPI2C16_GetFreq/InitPins/DeinitPins
3936 in the application for enabling according instance. */
3937 extern uint32_t LPI2C16_GetFreq(void);
3938
3939 static cmsis_lpi2c_resource_t LPI2C16_Resource = {LPI2C16, LPI2C16_GetFreq};
3940
3941 #if defined(RTE_I2C16_DMA_EN) && RTE_I2C16_DMA_EN
3942
3943 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
3944 static cmsis_lpi2c_edma_resource_t LPI2C16_EdmaResource = {
3945 RTE_I2C16_DMA_TX_DMA_BASE, RTE_I2C16_DMA_TX_CH, (uint16_t)RTE_I2C16_DMA_TX_PERI_SEL,
3946 RTE_I2C16_DMA_RX_DMA_BASE, RTE_I2C16_DMA_RX_CH, (uint16_t)RTE_I2C16_DMA_RX_PERI_SEL,
3947 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
3948 RTE_I2C16_DMA_TX_DMAMUX_BASE, RTE_I2C16_DMA_RX_DMAMUX_BASE,
3949 #endif
3950 };
3951
3952 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C16_EdmaHandle);
3953 static edma_handle_t LPI2C16_EdmaTxHandle;
3954 static edma_handle_t LPI2C16_EdmaRxHandle;
3955
3956 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
3957 ARMCC_SECTION("lpi2c16_edma_driver_state")
3958 static cmsis_lpi2c_edma_driver_state_t LPI2C16_EdmaDriverState = {
3959 #else
3960 static cmsis_lpi2c_edma_driver_state_t LPI2C16_EdmaDriverState = {
3961 #endif
3962 &LPI2C16_Resource, &LPI2C16_EdmaResource, &LPI2C16_EdmaHandle, &LPI2C16_EdmaTxHandle, &LPI2C16_EdmaRxHandle,
3963 };
3964
LPI2C16_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)3965 static int32_t LPI2C16_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
3966 {
3967 #ifdef RTE_I2C16_PIN_INIT
3968 RTE_I2C16_PIN_INIT();
3969 #endif
3970 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C16_EdmaDriverState);
3971 }
3972
LPI2C16_Master_EdmaUninitialize(void)3973 static int32_t LPI2C16_Master_EdmaUninitialize(void)
3974 {
3975 #ifdef RTE_I2C16_PIN_DEINIT
3976 RTE_I2C16_PIN_DEINIT();
3977 #endif
3978 return LPI2C_Master_EdmaUninitialize(&LPI2C16_EdmaDriverState);
3979 }
3980
LPI2C16_Master_EdmaPowerControl(ARM_POWER_STATE state)3981 static int32_t LPI2C16_Master_EdmaPowerControl(ARM_POWER_STATE state)
3982 {
3983 return LPI2C_Master_EdmaPowerControl(state, &LPI2C16_EdmaDriverState);
3984 }
3985
LPI2C16_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)3986 static int32_t LPI2C16_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
3987 {
3988 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C16_EdmaDriverState);
3989 }
3990
LPI2C16_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)3991 static int32_t LPI2C16_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
3992 {
3993 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C16_EdmaDriverState);
3994 }
3995
LPI2C16_Master_EdmaGetDataCount(void)3996 static int32_t LPI2C16_Master_EdmaGetDataCount(void)
3997 {
3998 return LPI2C_Master_EdmaGetDataCount(&LPI2C16_EdmaDriverState);
3999 }
4000
LPI2C16_Master_EdmaControl(uint32_t control,uint32_t arg)4001 static int32_t LPI2C16_Master_EdmaControl(uint32_t control, uint32_t arg)
4002 {
4003 return LPI2C_Master_EdmaControl(control, arg, &LPI2C16_EdmaDriverState);
4004 }
4005
LPI2C16_Master_EdmaGetStatus(void)4006 static ARM_I2C_STATUS LPI2C16_Master_EdmaGetStatus(void)
4007 {
4008 return LPI2C_Master_EdmaGetStatus(&LPI2C16_EdmaDriverState);
4009 }
4010
4011 #endif
4012
4013 #else
4014
4015 static cmsis_i2c_handle_t LPI2C16_Handle;
4016
4017 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
4018 ARMCC_SECTION("lpi2c16_interrupt_driver_state")
4019 static cmsis_lpi2c_interrupt_driver_state_t LPI2C16_InterruptDriverState = {
4020 #else
4021 static cmsis_lpi2c_interrupt_driver_state_t LPI2C16_InterruptDriverState = {
4022 #endif
4023 &LPI2C16_Resource,
4024 &LPI2C16_Handle,
4025 };
4026
KSDK_LPI2C16_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)4027 static void KSDK_LPI2C16_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
4028 {
4029 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C16_InterruptDriverState);
4030 }
4031
LPI2C16_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)4032 static int32_t LPI2C16_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
4033 {
4034 #ifdef RTE_I2C16_PIN_INIT
4035 RTE_I2C16_PIN_INIT();
4036 #endif
4037 return LPI2C_InterruptInitialize(cb_event, &LPI2C16_InterruptDriverState);
4038 }
4039
LPI2C16_InterruptUninitialize(void)4040 static int32_t LPI2C16_InterruptUninitialize(void)
4041 {
4042 #ifdef RTE_I2C16_PIN_DEINIT
4043 RTE_I2C16_PIN_DEINIT();
4044 #endif
4045 return LPI2C_InterruptUninitialize(&LPI2C16_InterruptDriverState);
4046 }
4047
LPI2C16_InterruptPowerControl(ARM_POWER_STATE state)4048 static int32_t LPI2C16_InterruptPowerControl(ARM_POWER_STATE state)
4049 {
4050 return LPI2C_InterruptPowerControl(state, &LPI2C16_InterruptDriverState);
4051 }
4052
LPI2C16_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)4053 static int32_t LPI2C16_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
4054 {
4055 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C16_InterruptDriverState);
4056 }
4057
LPI2C16_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)4058 static int32_t LPI2C16_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
4059 {
4060 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C16_InterruptDriverState);
4061 }
4062
LPI2C16_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)4063 static int32_t LPI2C16_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
4064 {
4065 LPI2C16_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C16_SLAVE_InterruptCallback;
4066 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C16_InterruptDriverState);
4067 }
4068
LPI2C16_Slave_InterruptReceive(uint8_t * data,uint32_t num)4069 static int32_t LPI2C16_Slave_InterruptReceive(uint8_t *data, uint32_t num)
4070 {
4071 LPI2C16_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C16_SLAVE_InterruptCallback;
4072 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C16_InterruptDriverState);
4073 }
4074
LPI2C16_InterruptGetDataCount(void)4075 static int32_t LPI2C16_InterruptGetDataCount(void)
4076 {
4077 return LPI2C_InterruptGetDataCount(&LPI2C16_InterruptDriverState);
4078 }
4079
LPI2C16_InterruptControl(uint32_t control,uint32_t arg)4080 static int32_t LPI2C16_InterruptControl(uint32_t control, uint32_t arg)
4081 {
4082 return LPI2C_InterruptControl(control, arg, &LPI2C16_InterruptDriverState);
4083 }
4084
LPI2C16_InterruptGetStatus(void)4085 static ARM_I2C_STATUS LPI2C16_InterruptGetStatus(void)
4086 {
4087 return LPI2C_InterruptGetStatus(&LPI2C16_InterruptDriverState);
4088 }
4089
4090 #endif /* RTE_I2C16_DMA_EN */
4091
4092 ARM_DRIVER_I2C Driver_I2C16 = {LPI2Cx_GetVersion,
4093 LPI2Cx_GetCapabilities,
4094 #if defined(RTE_I2C16_DMA_EN) && RTE_I2C16_DMA_EN
4095 LPI2C16_Master_EdmaInitialize,
4096 LPI2C16_Master_EdmaUninitialize,
4097 LPI2C16_Master_EdmaPowerControl,
4098 LPI2C16_Master_EdmaTransmit,
4099 LPI2C16_Master_EdmaReceive,
4100 NULL,
4101 NULL,
4102 LPI2C16_Master_EdmaGetDataCount,
4103 LPI2C16_Master_EdmaControl,
4104 LPI2C16_Master_EdmaGetStatus
4105 #else
4106 LPI2C16_InterruptInitialize,
4107 LPI2C16_InterruptUninitialize,
4108 LPI2C16_InterruptPowerControl,
4109 LPI2C16_Master_InterruptTransmit,
4110 LPI2C16_Master_InterruptReceive,
4111 LPI2C16_Slave_InterruptTransmit,
4112 LPI2C16_Slave_InterruptReceive,
4113 LPI2C16_InterruptGetDataCount,
4114 LPI2C16_InterruptControl,
4115 LPI2C16_InterruptGetStatus
4116 #endif /* RTE_I2C16_DMA_EN */
4117 };
4118
4119 #endif /* LPI2C16 */
4120
4121 #if defined(LPI2C17) && defined(RTE_I2C17) && RTE_I2C17
4122 /* User needs to provide the implementation for LPI2C17_GetFreq/InitPins/DeinitPins
4123 in the application for enabling according instance. */
4124 extern uint32_t LPI2C17_GetFreq(void);
4125
4126 static cmsis_lpi2c_resource_t LPI2C17_Resource = {LPI2C17, LPI2C17_GetFreq};
4127
4128 #if defined(RTE_I2C17_DMA_EN) && RTE_I2C17_DMA_EN
4129
4130 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
4131 static cmsis_lpi2c_edma_resource_t LPI2C17_EdmaResource = {
4132 RTE_I2C17_DMA_TX_DMA_BASE, RTE_I2C17_DMA_TX_CH, (uint16_t)RTE_I2C17_DMA_TX_PERI_SEL,
4133 RTE_I2C17_DMA_RX_DMA_BASE, RTE_I2C17_DMA_RX_CH, (uint16_t)RTE_I2C17_DMA_RX_PERI_SEL,
4134 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
4135 RTE_I2C17_DMA_TX_DMAMUX_BASE, RTE_I2C17_DMA_RX_DMAMUX_BASE,
4136 #endif
4137 };
4138
4139 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C17_EdmaHandle);
4140 static edma_handle_t LPI2C17_EdmaTxHandle;
4141 static edma_handle_t LPI2C17_EdmaRxHandle;
4142
4143 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
4144 ARMCC_SECTION("lpi2c17_edma_driver_state")
4145 static cmsis_lpi2c_edma_driver_state_t LPI2C17_EdmaDriverState = {
4146 #else
4147 static cmsis_lpi2c_edma_driver_state_t LPI2C17_EdmaDriverState = {
4148 #endif
4149 &LPI2C17_Resource, &LPI2C17_EdmaResource, &LPI2C17_EdmaHandle, &LPI2C17_EdmaTxHandle, &LPI2C17_EdmaRxHandle,
4150 };
4151
LPI2C17_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)4152 static int32_t LPI2C17_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
4153 {
4154 #ifdef RTE_I2C17_PIN_INIT
4155 RTE_I2C17_PIN_INIT();
4156 #endif
4157 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C17_EdmaDriverState);
4158 }
4159
LPI2C17_Master_EdmaUninitialize(void)4160 static int32_t LPI2C17_Master_EdmaUninitialize(void)
4161 {
4162 #ifdef RTE_I2C17_PIN_DEINIT
4163 RTE_I2C17_PIN_DEINIT();
4164 #endif
4165 return LPI2C_Master_EdmaUninitialize(&LPI2C17_EdmaDriverState);
4166 }
4167
LPI2C17_Master_EdmaPowerControl(ARM_POWER_STATE state)4168 static int32_t LPI2C17_Master_EdmaPowerControl(ARM_POWER_STATE state)
4169 {
4170 return LPI2C_Master_EdmaPowerControl(state, &LPI2C17_EdmaDriverState);
4171 }
4172
LPI2C17_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)4173 static int32_t LPI2C17_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
4174 {
4175 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C17_EdmaDriverState);
4176 }
4177
LPI2C17_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)4178 static int32_t LPI2C17_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
4179 {
4180 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C17_EdmaDriverState);
4181 }
4182
LPI2C17_Master_EdmaGetDataCount(void)4183 static int32_t LPI2C17_Master_EdmaGetDataCount(void)
4184 {
4185 return LPI2C_Master_EdmaGetDataCount(&LPI2C17_EdmaDriverState);
4186 }
4187
LPI2C17_Master_EdmaControl(uint32_t control,uint32_t arg)4188 static int32_t LPI2C17_Master_EdmaControl(uint32_t control, uint32_t arg)
4189 {
4190 return LPI2C_Master_EdmaControl(control, arg, &LPI2C17_EdmaDriverState);
4191 }
4192
LPI2C17_Master_EdmaGetStatus(void)4193 static ARM_I2C_STATUS LPI2C17_Master_EdmaGetStatus(void)
4194 {
4195 return LPI2C_Master_EdmaGetStatus(&LPI2C17_EdmaDriverState);
4196 }
4197
4198 #endif
4199
4200 #else
4201
4202 static cmsis_i2c_handle_t LPI2C17_Handle;
4203
4204 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
4205 ARMCC_SECTION("lpi2c17_interrupt_driver_state")
4206 static cmsis_lpi2c_interrupt_driver_state_t LPI2C17_InterruptDriverState = {
4207 #else
4208 static cmsis_lpi2c_interrupt_driver_state_t LPI2C17_InterruptDriverState = {
4209 #endif
4210 &LPI2C17_Resource,
4211 &LPI2C17_Handle,
4212 };
4213
KSDK_LPI2C17_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)4214 static void KSDK_LPI2C17_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
4215 {
4216 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C17_InterruptDriverState);
4217 }
4218
LPI2C17_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)4219 static int32_t LPI2C17_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
4220 {
4221 #ifdef RTE_I2C17_PIN_INIT
4222 RTE_I2C17_PIN_INIT();
4223 #endif
4224 return LPI2C_InterruptInitialize(cb_event, &LPI2C17_InterruptDriverState);
4225 }
4226
LPI2C17_InterruptUninitialize(void)4227 static int32_t LPI2C17_InterruptUninitialize(void)
4228 {
4229 #ifdef RTE_I2C17_PIN_DEINIT
4230 RTE_I2C17_PIN_DEINIT();
4231 #endif
4232 return LPI2C_InterruptUninitialize(&LPI2C17_InterruptDriverState);
4233 }
4234
LPI2C17_InterruptPowerControl(ARM_POWER_STATE state)4235 static int32_t LPI2C17_InterruptPowerControl(ARM_POWER_STATE state)
4236 {
4237 return LPI2C_InterruptPowerControl(state, &LPI2C17_InterruptDriverState);
4238 }
4239
LPI2C17_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)4240 static int32_t LPI2C17_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
4241 {
4242 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C17_InterruptDriverState);
4243 }
4244
LPI2C17_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)4245 static int32_t LPI2C17_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
4246 {
4247 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C17_InterruptDriverState);
4248 }
4249
LPI2C17_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)4250 static int32_t LPI2C17_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
4251 {
4252 LPI2C17_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C17_SLAVE_InterruptCallback;
4253 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C17_InterruptDriverState);
4254 }
4255
LPI2C17_Slave_InterruptReceive(uint8_t * data,uint32_t num)4256 static int32_t LPI2C17_Slave_InterruptReceive(uint8_t *data, uint32_t num)
4257 {
4258 LPI2C17_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C17_SLAVE_InterruptCallback;
4259 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C17_InterruptDriverState);
4260 }
4261
LPI2C17_InterruptGetDataCount(void)4262 static int32_t LPI2C17_InterruptGetDataCount(void)
4263 {
4264 return LPI2C_InterruptGetDataCount(&LPI2C17_InterruptDriverState);
4265 }
4266
LPI2C17_InterruptControl(uint32_t control,uint32_t arg)4267 static int32_t LPI2C17_InterruptControl(uint32_t control, uint32_t arg)
4268 {
4269 return LPI2C_InterruptControl(control, arg, &LPI2C17_InterruptDriverState);
4270 }
4271
LPI2C17_InterruptGetStatus(void)4272 static ARM_I2C_STATUS LPI2C17_InterruptGetStatus(void)
4273 {
4274 return LPI2C_InterruptGetStatus(&LPI2C17_InterruptDriverState);
4275 }
4276
4277 #endif /* RTE_I2C17_DMA_EN */
4278
4279 ARM_DRIVER_I2C Driver_I2C17 = {LPI2Cx_GetVersion,
4280 LPI2Cx_GetCapabilities,
4281 #if defined(RTE_I2C17_DMA_EN) && RTE_I2C17_DMA_EN
4282 LPI2C17_Master_EdmaInitialize,
4283 LPI2C17_Master_EdmaUninitialize,
4284 LPI2C17_Master_EdmaPowerControl,
4285 LPI2C17_Master_EdmaTransmit,
4286 LPI2C17_Master_EdmaReceive,
4287 NULL,
4288 NULL,
4289 LPI2C17_Master_EdmaGetDataCount,
4290 LPI2C17_Master_EdmaControl,
4291 LPI2C17_Master_EdmaGetStatus
4292 #else
4293 LPI2C17_InterruptInitialize,
4294 LPI2C17_InterruptUninitialize,
4295 LPI2C17_InterruptPowerControl,
4296 LPI2C17_Master_InterruptTransmit,
4297 LPI2C17_Master_InterruptReceive,
4298 LPI2C17_Slave_InterruptTransmit,
4299 LPI2C17_Slave_InterruptReceive,
4300 LPI2C17_InterruptGetDataCount,
4301 LPI2C17_InterruptControl,
4302 LPI2C17_InterruptGetStatus
4303 #endif /* RTE_I2C17_DMA_EN */
4304 };
4305
4306 #endif /* LPI2C17 */
4307
4308 #if defined(LPI2C18) && defined(RTE_I2C18) && RTE_I2C18
4309 /* User needs to provide the implementation for LPI2C18_GetFreq/InitPins/DeinitPins
4310 in the application for enabling according instance. */
4311 extern uint32_t LPI2C18_GetFreq(void);
4312
4313 static cmsis_lpi2c_resource_t LPI2C18_Resource = {LPI2C18, LPI2C18_GetFreq};
4314
4315 #if defined(RTE_I2C18_DMA_EN) && RTE_I2C18_DMA_EN
4316
4317 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
4318 static cmsis_lpi2c_edma_resource_t LPI2C18_EdmaResource = {
4319 RTE_I2C18_DMA_TX_DMA_BASE, RTE_I2C18_DMA_TX_CH, (uint16_t)RTE_I2C18_DMA_TX_PERI_SEL,
4320 RTE_I2C18_DMA_RX_DMA_BASE, RTE_I2C18_DMA_RX_CH, (uint16_t)RTE_I2C18_DMA_RX_PERI_SEL,
4321 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
4322 RTE_I2C18_DMA_TX_DMAMUX_BASE, RTE_I2C18_DMA_RX_DMAMUX_BASE,
4323 #endif
4324 };
4325
4326 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C18_EdmaHandle);
4327 static edma_handle_t LPI2C18_EdmaTxHandle;
4328 static edma_handle_t LPI2C18_EdmaRxHandle;
4329
4330 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
4331 ARMCC_SECTION("lpi2c18_edma_driver_state")
4332 static cmsis_lpi2c_edma_driver_state_t LPI2C18_EdmaDriverState = {
4333 #else
4334 static cmsis_lpi2c_edma_driver_state_t LPI2C18_EdmaDriverState = {
4335 #endif
4336 &LPI2C18_Resource, &LPI2C18_EdmaResource, &LPI2C18_EdmaHandle, &LPI2C18_EdmaTxHandle, &LPI2C18_EdmaRxHandle,
4337 };
4338
LPI2C18_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)4339 static int32_t LPI2C18_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
4340 {
4341 #ifdef RTE_I2C18_PIN_INIT
4342 RTE_I2C18_PIN_INIT();
4343 #endif
4344 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C18_EdmaDriverState);
4345 }
4346
LPI2C18_Master_EdmaUninitialize(void)4347 static int32_t LPI2C18_Master_EdmaUninitialize(void)
4348 {
4349 #ifdef RTE_I2C18_PIN_DEINIT
4350 RTE_I2C18_PIN_DEINIT();
4351 #endif
4352 return LPI2C_Master_EdmaUninitialize(&LPI2C18_EdmaDriverState);
4353 }
4354
LPI2C18_Master_EdmaPowerControl(ARM_POWER_STATE state)4355 static int32_t LPI2C18_Master_EdmaPowerControl(ARM_POWER_STATE state)
4356 {
4357 return LPI2C_Master_EdmaPowerControl(state, &LPI2C18_EdmaDriverState);
4358 }
4359
LPI2C18_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)4360 static int32_t LPI2C18_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
4361 {
4362 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C18_EdmaDriverState);
4363 }
4364
LPI2C18_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)4365 static int32_t LPI2C18_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
4366 {
4367 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C18_EdmaDriverState);
4368 }
4369
LPI2C18_Master_EdmaGetDataCount(void)4370 static int32_t LPI2C18_Master_EdmaGetDataCount(void)
4371 {
4372 return LPI2C_Master_EdmaGetDataCount(&LPI2C18_EdmaDriverState);
4373 }
4374
LPI2C18_Master_EdmaControl(uint32_t control,uint32_t arg)4375 static int32_t LPI2C18_Master_EdmaControl(uint32_t control, uint32_t arg)
4376 {
4377 return LPI2C_Master_EdmaControl(control, arg, &LPI2C18_EdmaDriverState);
4378 }
4379
LPI2C18_Master_EdmaGetStatus(void)4380 static ARM_I2C_STATUS LPI2C18_Master_EdmaGetStatus(void)
4381 {
4382 return LPI2C_Master_EdmaGetStatus(&LPI2C18_EdmaDriverState);
4383 }
4384
4385 #endif
4386
4387 #else
4388
4389 static cmsis_i2c_handle_t LPI2C18_Handle;
4390
4391 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
4392 ARMCC_SECTION("lpi2c18_interrupt_driver_state")
4393 static cmsis_lpi2c_interrupt_driver_state_t LPI2C18_InterruptDriverState = {
4394 #else
4395 static cmsis_lpi2c_interrupt_driver_state_t LPI2C18_InterruptDriverState = {
4396 #endif
4397 &LPI2C18_Resource,
4398 &LPI2C18_Handle,
4399 };
4400
KSDK_LPI2C18_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)4401 static void KSDK_LPI2C18_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
4402 {
4403 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C18_InterruptDriverState);
4404 }
4405
LPI2C18_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)4406 static int32_t LPI2C18_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
4407 {
4408 #ifdef RTE_I2C18_PIN_INIT
4409 RTE_I2C18_PIN_INIT();
4410 #endif
4411 return LPI2C_InterruptInitialize(cb_event, &LPI2C18_InterruptDriverState);
4412 }
4413
LPI2C18_InterruptUninitialize(void)4414 static int32_t LPI2C18_InterruptUninitialize(void)
4415 {
4416 #ifdef RTE_I2C18_PIN_DEINIT
4417 RTE_I2C18_PIN_DEINIT();
4418 #endif
4419 return LPI2C_InterruptUninitialize(&LPI2C18_InterruptDriverState);
4420 }
4421
LPI2C18_InterruptPowerControl(ARM_POWER_STATE state)4422 static int32_t LPI2C18_InterruptPowerControl(ARM_POWER_STATE state)
4423 {
4424 return LPI2C_InterruptPowerControl(state, &LPI2C18_InterruptDriverState);
4425 }
4426
LPI2C18_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)4427 static int32_t LPI2C18_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
4428 {
4429 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C18_InterruptDriverState);
4430 }
4431
LPI2C18_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)4432 static int32_t LPI2C18_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
4433 {
4434 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C18_InterruptDriverState);
4435 }
4436
LPI2C18_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)4437 static int32_t LPI2C18_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
4438 {
4439 LPI2C18_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C18_SLAVE_InterruptCallback;
4440 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C18_InterruptDriverState);
4441 }
4442
LPI2C18_Slave_InterruptReceive(uint8_t * data,uint32_t num)4443 static int32_t LPI2C18_Slave_InterruptReceive(uint8_t *data, uint32_t num)
4444 {
4445 LPI2C18_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C18_SLAVE_InterruptCallback;
4446 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C18_InterruptDriverState);
4447 }
4448
LPI2C18_InterruptGetDataCount(void)4449 static int32_t LPI2C18_InterruptGetDataCount(void)
4450 {
4451 return LPI2C_InterruptGetDataCount(&LPI2C18_InterruptDriverState);
4452 }
4453
LPI2C18_InterruptControl(uint32_t control,uint32_t arg)4454 static int32_t LPI2C18_InterruptControl(uint32_t control, uint32_t arg)
4455 {
4456 return LPI2C_InterruptControl(control, arg, &LPI2C18_InterruptDriverState);
4457 }
4458
LPI2C18_InterruptGetStatus(void)4459 static ARM_I2C_STATUS LPI2C18_InterruptGetStatus(void)
4460 {
4461 return LPI2C_InterruptGetStatus(&LPI2C18_InterruptDriverState);
4462 }
4463
4464 #endif /* RTE_I2C18_DMA_EN */
4465
4466 ARM_DRIVER_I2C Driver_I2C18 = {LPI2Cx_GetVersion,
4467 LPI2Cx_GetCapabilities,
4468 #if defined(RTE_I2C18_DMA_EN) && RTE_I2C18_DMA_EN
4469 LPI2C18_Master_EdmaInitialize,
4470 LPI2C18_Master_EdmaUninitialize,
4471 LPI2C18_Master_EdmaPowerControl,
4472 LPI2C18_Master_EdmaTransmit,
4473 LPI2C18_Master_EdmaReceive,
4474 NULL,
4475 NULL,
4476 LPI2C18_Master_EdmaGetDataCount,
4477 LPI2C18_Master_EdmaControl,
4478 LPI2C18_Master_EdmaGetStatus
4479 #else
4480 LPI2C18_InterruptInitialize,
4481 LPI2C18_InterruptUninitialize,
4482 LPI2C18_InterruptPowerControl,
4483 LPI2C18_Master_InterruptTransmit,
4484 LPI2C18_Master_InterruptReceive,
4485 LPI2C18_Slave_InterruptTransmit,
4486 LPI2C18_Slave_InterruptReceive,
4487 LPI2C18_InterruptGetDataCount,
4488 LPI2C18_InterruptControl,
4489 LPI2C18_InterruptGetStatus
4490 #endif /* RTE_I2C18_DMA_EN */
4491 };
4492
4493 #endif /* LPI2C18 */
4494
4495 #if defined(LPI2C19) && defined(RTE_I2C19) && RTE_I2C19
4496 /* User needs to provide the implementation for LPI2C19_GetFreq/InitPins/DeinitPins
4497 in the application for enabling according instance. */
4498 extern uint32_t LPI2C19_GetFreq(void);
4499
4500 static cmsis_lpi2c_resource_t LPI2C19_Resource = {LPI2C19, LPI2C19_GetFreq};
4501
4502 #if defined(RTE_I2C19_DMA_EN) && RTE_I2C19_DMA_EN
4503
4504 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
4505 static cmsis_lpi2c_edma_resource_t LPI2C19_EdmaResource = {
4506 RTE_I2C19_DMA_TX_DMA_BASE, RTE_I2C19_DMA_TX_CH, (uint16_t)RTE_I2C19_DMA_TX_PERI_SEL,
4507 RTE_I2C19_DMA_RX_DMA_BASE, RTE_I2C19_DMA_RX_CH, (uint16_t)RTE_I2C19_DMA_RX_PERI_SEL,
4508 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
4509 RTE_I2C19_DMA_TX_DMAMUX_BASE, RTE_I2C19_DMA_RX_DMAMUX_BASE,
4510 #endif
4511 };
4512
4513 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C19_EdmaHandle);
4514 static edma_handle_t LPI2C19_EdmaTxHandle;
4515 static edma_handle_t LPI2C19_EdmaRxHandle;
4516
4517 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
4518 ARMCC_SECTION("lpi2c19_edma_driver_state")
4519 static cmsis_lpi2c_edma_driver_state_t LPI2C19_EdmaDriverState = {
4520 #else
4521 static cmsis_lpi2c_edma_driver_state_t LPI2C19_EdmaDriverState = {
4522 #endif
4523 &LPI2C19_Resource, &LPI2C19_EdmaResource, &LPI2C19_EdmaHandle, &LPI2C19_EdmaTxHandle, &LPI2C19_EdmaRxHandle,
4524 };
4525
LPI2C19_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)4526 static int32_t LPI2C19_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
4527 {
4528 #ifdef RTE_I2C19_PIN_INIT
4529 RTE_I2C19_PIN_INIT();
4530 #endif
4531 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C19_EdmaDriverState);
4532 }
4533
LPI2C19_Master_EdmaUninitialize(void)4534 static int32_t LPI2C19_Master_EdmaUninitialize(void)
4535 {
4536 #ifdef RTE_I2C19_PIN_DEINIT
4537 RTE_I2C19_PIN_DEINIT();
4538 #endif
4539 return LPI2C_Master_EdmaUninitialize(&LPI2C19_EdmaDriverState);
4540 }
4541
LPI2C19_Master_EdmaPowerControl(ARM_POWER_STATE state)4542 static int32_t LPI2C19_Master_EdmaPowerControl(ARM_POWER_STATE state)
4543 {
4544 return LPI2C_Master_EdmaPowerControl(state, &LPI2C19_EdmaDriverState);
4545 }
4546
LPI2C19_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)4547 static int32_t LPI2C19_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
4548 {
4549 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C19_EdmaDriverState);
4550 }
4551
LPI2C19_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)4552 static int32_t LPI2C19_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
4553 {
4554 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C19_EdmaDriverState);
4555 }
4556
LPI2C19_Master_EdmaGetDataCount(void)4557 static int32_t LPI2C19_Master_EdmaGetDataCount(void)
4558 {
4559 return LPI2C_Master_EdmaGetDataCount(&LPI2C19_EdmaDriverState);
4560 }
4561
LPI2C19_Master_EdmaControl(uint32_t control,uint32_t arg)4562 static int32_t LPI2C19_Master_EdmaControl(uint32_t control, uint32_t arg)
4563 {
4564 return LPI2C_Master_EdmaControl(control, arg, &LPI2C19_EdmaDriverState);
4565 }
4566
LPI2C19_Master_EdmaGetStatus(void)4567 static ARM_I2C_STATUS LPI2C19_Master_EdmaGetStatus(void)
4568 {
4569 return LPI2C_Master_EdmaGetStatus(&LPI2C19_EdmaDriverState);
4570 }
4571
4572 #endif
4573
4574 #else
4575
4576 static cmsis_i2c_handle_t LPI2C19_Handle;
4577
4578 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
4579 ARMCC_SECTION("lpi2c19_interrupt_driver_state")
4580 static cmsis_lpi2c_interrupt_driver_state_t LPI2C19_InterruptDriverState = {
4581 #else
4582 static cmsis_lpi2c_interrupt_driver_state_t LPI2C19_InterruptDriverState = {
4583 #endif
4584 &LPI2C19_Resource,
4585 &LPI2C19_Handle,
4586 };
4587
KSDK_LPI2C19_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)4588 static void KSDK_LPI2C19_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
4589 {
4590 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C19_InterruptDriverState);
4591 }
4592
LPI2C19_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)4593 static int32_t LPI2C19_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
4594 {
4595 #ifdef RTE_I2C19_PIN_INIT
4596 RTE_I2C19_PIN_INIT();
4597 #endif
4598 return LPI2C_InterruptInitialize(cb_event, &LPI2C19_InterruptDriverState);
4599 }
4600
LPI2C19_InterruptUninitialize(void)4601 static int32_t LPI2C19_InterruptUninitialize(void)
4602 {
4603 #ifdef RTE_I2C19_PIN_DEINIT
4604 RTE_I2C19_PIN_DEINIT();
4605 #endif
4606 return LPI2C_InterruptUninitialize(&LPI2C19_InterruptDriverState);
4607 }
4608
LPI2C19_InterruptPowerControl(ARM_POWER_STATE state)4609 static int32_t LPI2C19_InterruptPowerControl(ARM_POWER_STATE state)
4610 {
4611 return LPI2C_InterruptPowerControl(state, &LPI2C19_InterruptDriverState);
4612 }
4613
LPI2C19_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)4614 static int32_t LPI2C19_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
4615 {
4616 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C19_InterruptDriverState);
4617 }
4618
LPI2C19_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)4619 static int32_t LPI2C19_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
4620 {
4621 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C19_InterruptDriverState);
4622 }
4623
LPI2C19_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)4624 static int32_t LPI2C19_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
4625 {
4626 LPI2C19_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C19_SLAVE_InterruptCallback;
4627 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C19_InterruptDriverState);
4628 }
4629
LPI2C19_Slave_InterruptReceive(uint8_t * data,uint32_t num)4630 static int32_t LPI2C19_Slave_InterruptReceive(uint8_t *data, uint32_t num)
4631 {
4632 LPI2C19_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C19_SLAVE_InterruptCallback;
4633 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C19_InterruptDriverState);
4634 }
4635
LPI2C19_InterruptGetDataCount(void)4636 static int32_t LPI2C19_InterruptGetDataCount(void)
4637 {
4638 return LPI2C_InterruptGetDataCount(&LPI2C19_InterruptDriverState);
4639 }
4640
LPI2C19_InterruptControl(uint32_t control,uint32_t arg)4641 static int32_t LPI2C19_InterruptControl(uint32_t control, uint32_t arg)
4642 {
4643 return LPI2C_InterruptControl(control, arg, &LPI2C19_InterruptDriverState);
4644 }
4645
LPI2C19_InterruptGetStatus(void)4646 static ARM_I2C_STATUS LPI2C19_InterruptGetStatus(void)
4647 {
4648 return LPI2C_InterruptGetStatus(&LPI2C19_InterruptDriverState);
4649 }
4650
4651 #endif /* RTE_I2C19_DMA_EN */
4652
4653 ARM_DRIVER_I2C Driver_I2C19 = {LPI2Cx_GetVersion,
4654 LPI2Cx_GetCapabilities,
4655 #if defined(RTE_I2C19_DMA_EN) && RTE_I2C19_DMA_EN
4656 LPI2C19_Master_EdmaInitialize,
4657 LPI2C19_Master_EdmaUninitialize,
4658 LPI2C19_Master_EdmaPowerControl,
4659 LPI2C19_Master_EdmaTransmit,
4660 LPI2C19_Master_EdmaReceive,
4661 NULL,
4662 NULL,
4663 LPI2C19_Master_EdmaGetDataCount,
4664 LPI2C19_Master_EdmaControl,
4665 LPI2C19_Master_EdmaGetStatus
4666 #else
4667 LPI2C19_InterruptInitialize,
4668 LPI2C19_InterruptUninitialize,
4669 LPI2C19_InterruptPowerControl,
4670 LPI2C19_Master_InterruptTransmit,
4671 LPI2C19_Master_InterruptReceive,
4672 LPI2C19_Slave_InterruptTransmit,
4673 LPI2C19_Slave_InterruptReceive,
4674 LPI2C19_InterruptGetDataCount,
4675 LPI2C19_InterruptControl,
4676 LPI2C19_InterruptGetStatus
4677 #endif /* RTE_I2C19_DMA_EN */
4678 };
4679
4680 #endif /* LPI2C19 */
4681
4682 #if defined(LPI2C20) && defined(RTE_I2C20) && RTE_I2C20
4683 /* User needs to provide the implementation for LPI2C20_GetFreq/InitPins/DeinitPins
4684 in the application for enabling according instance. */
4685 extern uint32_t LPI2C20_GetFreq(void);
4686
4687 static cmsis_lpi2c_resource_t LPI2C20_Resource = {LPI2C20, LPI2C20_GetFreq};
4688
4689 #if defined(RTE_I2C20_DMA_EN) && RTE_I2C20_DMA_EN
4690
4691 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
4692 static cmsis_lpi2c_edma_resource_t LPI2C20_EdmaResource = {
4693 RTE_I2C20_DMA_TX_DMA_BASE, RTE_I2C20_DMA_TX_CH, (uint16_t)RTE_I2C20_DMA_TX_PERI_SEL,
4694 RTE_I2C20_DMA_RX_DMA_BASE, RTE_I2C20_DMA_RX_CH, (uint16_t)RTE_I2C20_DMA_RX_PERI_SEL,
4695 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
4696 RTE_I2C20_DMA_TX_DMAMUX_BASE, RTE_I2C20_DMA_RX_DMAMUX_BASE,
4697 #endif
4698 };
4699
4700 AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C20_EdmaHandle);
4701 static edma_handle_t LPI2C20_EdmaTxHandle;
4702 static edma_handle_t LPI2C20_EdmaRxHandle;
4703
4704 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
4705 ARMCC_SECTION("lpi2c20_edma_driver_state")
4706 static cmsis_lpi2c_edma_driver_state_t LPI2C20_EdmaDriverState = {
4707 #else
4708 static cmsis_lpi2c_edma_driver_state_t LPI2C20_EdmaDriverState = {
4709 #endif
4710 &LPI2C20_Resource, &LPI2C20_EdmaResource, &LPI2C20_EdmaHandle, &LPI2C20_EdmaTxHandle, &LPI2C20_EdmaRxHandle,
4711 };
4712
LPI2C20_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)4713 static int32_t LPI2C20_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
4714 {
4715 #ifdef RTE_I2C20_PIN_INIT
4716 RTE_I2C20_PIN_INIT();
4717 #endif
4718 return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C20_EdmaDriverState);
4719 }
4720
LPI2C20_Master_EdmaUninitialize(void)4721 static int32_t LPI2C20_Master_EdmaUninitialize(void)
4722 {
4723 #ifdef RTE_I2C20_PIN_DEINIT
4724 RTE_I2C20_PIN_DEINIT();
4725 #endif
4726 return LPI2C_Master_EdmaUninitialize(&LPI2C20_EdmaDriverState);
4727 }
4728
LPI2C20_Master_EdmaPowerControl(ARM_POWER_STATE state)4729 static int32_t LPI2C20_Master_EdmaPowerControl(ARM_POWER_STATE state)
4730 {
4731 return LPI2C_Master_EdmaPowerControl(state, &LPI2C20_EdmaDriverState);
4732 }
4733
LPI2C20_Master_EdmaTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)4734 static int32_t LPI2C20_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
4735 {
4736 return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C20_EdmaDriverState);
4737 }
4738
LPI2C20_Master_EdmaReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)4739 static int32_t LPI2C20_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
4740 {
4741 return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C20_EdmaDriverState);
4742 }
4743
LPI2C20_Master_EdmaGetDataCount(void)4744 static int32_t LPI2C20_Master_EdmaGetDataCount(void)
4745 {
4746 return LPI2C_Master_EdmaGetDataCount(&LPI2C20_EdmaDriverState);
4747 }
4748
LPI2C20_Master_EdmaControl(uint32_t control,uint32_t arg)4749 static int32_t LPI2C20_Master_EdmaControl(uint32_t control, uint32_t arg)
4750 {
4751 return LPI2C_Master_EdmaControl(control, arg, &LPI2C20_EdmaDriverState);
4752 }
4753
LPI2C20_Master_EdmaGetStatus(void)4754 static ARM_I2C_STATUS LPI2C20_Master_EdmaGetStatus(void)
4755 {
4756 return LPI2C_Master_EdmaGetStatus(&LPI2C20_EdmaDriverState);
4757 }
4758
4759 #endif
4760
4761 #else
4762
4763 static cmsis_i2c_handle_t LPI2C20_Handle;
4764
4765 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
4766 ARMCC_SECTION("lpi2c20_interrupt_driver_state")
4767 static cmsis_lpi2c_interrupt_driver_state_t LPI2C20_InterruptDriverState = {
4768 #else
4769 static cmsis_lpi2c_interrupt_driver_state_t LPI2C20_InterruptDriverState = {
4770 #endif
4771 &LPI2C20_Resource,
4772 &LPI2C20_Handle,
4773 };
4774
KSDK_LPI2C20_SLAVE_InterruptCallback(LPI2C_Type * base,lpi2c_slave_transfer_t * xfer,void * userData)4775 static void KSDK_LPI2C20_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
4776 {
4777 KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C20_InterruptDriverState);
4778 }
4779
LPI2C20_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)4780 static int32_t LPI2C20_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
4781 {
4782 #ifdef RTE_I2C20_PIN_INIT
4783 RTE_I2C20_PIN_INIT();
4784 #endif
4785 return LPI2C_InterruptInitialize(cb_event, &LPI2C20_InterruptDriverState);
4786 }
4787
LPI2C20_InterruptUninitialize(void)4788 static int32_t LPI2C20_InterruptUninitialize(void)
4789 {
4790 #ifdef RTE_I2C20_PIN_DEINIT
4791 RTE_I2C20_PIN_DEINIT();
4792 #endif
4793 return LPI2C_InterruptUninitialize(&LPI2C20_InterruptDriverState);
4794 }
4795
LPI2C20_InterruptPowerControl(ARM_POWER_STATE state)4796 static int32_t LPI2C20_InterruptPowerControl(ARM_POWER_STATE state)
4797 {
4798 return LPI2C_InterruptPowerControl(state, &LPI2C20_InterruptDriverState);
4799 }
4800
LPI2C20_Master_InterruptTransmit(uint32_t addr,const uint8_t * data,uint32_t num,bool xfer_pending)4801 static int32_t LPI2C20_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
4802 {
4803 return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C20_InterruptDriverState);
4804 }
4805
LPI2C20_Master_InterruptReceive(uint32_t addr,uint8_t * data,uint32_t num,bool xfer_pending)4806 static int32_t LPI2C20_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
4807 {
4808 return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C20_InterruptDriverState);
4809 }
4810
LPI2C20_Slave_InterruptTransmit(const uint8_t * data,uint32_t num)4811 static int32_t LPI2C20_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
4812 {
4813 LPI2C20_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C20_SLAVE_InterruptCallback;
4814 return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C20_InterruptDriverState);
4815 }
4816
LPI2C20_Slave_InterruptReceive(uint8_t * data,uint32_t num)4817 static int32_t LPI2C20_Slave_InterruptReceive(uint8_t *data, uint32_t num)
4818 {
4819 LPI2C20_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C20_SLAVE_InterruptCallback;
4820 return LPI2C_Slave_InterruptReceive(data, num, &LPI2C20_InterruptDriverState);
4821 }
4822
LPI2C20_InterruptGetDataCount(void)4823 static int32_t LPI2C20_InterruptGetDataCount(void)
4824 {
4825 return LPI2C_InterruptGetDataCount(&LPI2C20_InterruptDriverState);
4826 }
4827
LPI2C20_InterruptControl(uint32_t control,uint32_t arg)4828 static int32_t LPI2C20_InterruptControl(uint32_t control, uint32_t arg)
4829 {
4830 return LPI2C_InterruptControl(control, arg, &LPI2C20_InterruptDriverState);
4831 }
4832
LPI2C20_InterruptGetStatus(void)4833 static ARM_I2C_STATUS LPI2C20_InterruptGetStatus(void)
4834 {
4835 return LPI2C_InterruptGetStatus(&LPI2C20_InterruptDriverState);
4836 }
4837
4838 #endif /* RTE_I2C20_DMA_EN */
4839
4840 ARM_DRIVER_I2C Driver_I2C20 = {LPI2Cx_GetVersion,
4841 LPI2Cx_GetCapabilities,
4842 #if defined(RTE_I2C20_DMA_EN) && RTE_I2C20_DMA_EN
4843 LPI2C20_Master_EdmaInitialize,
4844 LPI2C20_Master_EdmaUninitialize,
4845 LPI2C20_Master_EdmaPowerControl,
4846 LPI2C20_Master_EdmaTransmit,
4847 LPI2C20_Master_EdmaReceive,
4848 NULL,
4849 NULL,
4850 LPI2C20_Master_EdmaGetDataCount,
4851 LPI2C20_Master_EdmaControl,
4852 LPI2C20_Master_EdmaGetStatus
4853 #else
4854 LPI2C20_InterruptInitialize,
4855 LPI2C20_InterruptUninitialize,
4856 LPI2C20_InterruptPowerControl,
4857 LPI2C20_Master_InterruptTransmit,
4858 LPI2C20_Master_InterruptReceive,
4859 LPI2C20_Slave_InterruptTransmit,
4860 LPI2C20_Slave_InterruptReceive,
4861 LPI2C20_InterruptGetDataCount,
4862 LPI2C20_InterruptControl,
4863 LPI2C20_InterruptGetStatus
4864 #endif /* RTE_I2C20_DMA_EN */
4865 };
4866
4867 #endif /* LPI2C20 */
4868
