1 /* 2 * Copyright 2021-2023 NXP NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef SPI_IP_TYPES_H 8 #define SPI_IP_TYPES_H 9 10 /** 11 * @file Spi_Ip_Types.h 12 * 13 * @brief SPI IP driver types header file. 14 * @details SPI IP driver types header file. 15 16 * @addtogroup SPI_IP_DRIVER Spi Ip Driver 17 * @{ 18 */ 19 20 #ifdef __cplusplus 21 extern "C"{ 22 #endif 23 24 25 /*================================================================================================== 26 * INCLUDE FILES 27 * 1) system and project includes 28 * 2) needed interfaces from external units 29 * 3) internal and external interfaces from this unit 30 ==================================================================================================*/ 31 #include "StandardTypes.h" 32 #include "Spi_Ip_Cfg.h" 33 34 /*================================================================================================== 35 * SOURCE FILE VERSION INFORMATION 36 ==================================================================================================*/ 37 #define SPI_IP_TYPES_VENDOR_ID 43 38 #define SPI_IP_TYPES_AR_RELEASE_MAJOR_VERSION 4 39 #define SPI_IP_TYPES_AR_RELEASE_MINOR_VERSION 7 40 #define SPI_IP_TYPES_AR_RELEASE_REVISION_VERSION 0 41 #define SPI_IP_TYPES_SW_MAJOR_VERSION 1 42 #define SPI_IP_TYPES_SW_MINOR_VERSION 0 43 #define SPI_IP_TYPES_SW_PATCH_VERSION 0 44 45 /*================================================================================================== 46 * FILE VERSION CHECKS 47 ==================================================================================================*/ 48 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK 49 /* Check if current file and StandardTypes header file are of the same Autosar version */ 50 #if ((SPI_IP_TYPES_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \ 51 (SPI_IP_TYPES_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION)) 52 #error "AutoSar Version Numbers of Spi_Ip_Types.h and StandardTypes.h are different" 53 #endif 54 #endif 55 56 /* Check if Spi_Ip_Types.h header file and Spi_Ip_Cfg.h configuration header file are of the same vendor */ 57 #if (SPI_IP_TYPES_VENDOR_ID != SPI_IP_VENDOR_ID_CFG) 58 #error "Spi_Ip_Types.h and Spi_Ip_Cfg.h have different vendor IDs" 59 #endif 60 /* Check if Spi_Ip_Types.h header file and Spi_Ip_Cfg.h configuration header file are of the same Autosar version */ 61 #if ((SPI_IP_TYPES_AR_RELEASE_MAJOR_VERSION != SPI_IP_AR_RELEASE_MAJOR_VERSION_CFG) || \ 62 (SPI_IP_TYPES_AR_RELEASE_MINOR_VERSION != SPI_IP_AR_RELEASE_MINOR_VERSION_CFG) || \ 63 (SPI_IP_TYPES_AR_RELEASE_REVISION_VERSION != SPI_IP_AR_RELEASE_REVISION_VERSION_CFG)) 64 #error "AutoSar Version Numbers of Spi_Ip_Types.h and Spi_Ip_Cfg.h are different" 65 #endif 66 /* Check if Spi_Ip_Types.h header file and Spi_Ip_Cfg.h configuration header file are of the same software version */ 67 #if ((SPI_IP_TYPES_SW_MAJOR_VERSION != SPI_IP_SW_MAJOR_VERSION_CFG) || \ 68 (SPI_IP_TYPES_SW_MINOR_VERSION != SPI_IP_SW_MINOR_VERSION_CFG) || \ 69 (SPI_IP_TYPES_SW_PATCH_VERSION != SPI_IP_SW_PATCH_VERSION_CFG)) 70 #error "Software Version Numbers of Spi_Ip_Types.h and Spi_Ip_Cfg.h are different" 71 #endif 72 /*================================================================================================== 73 * CONSTANTS 74 ==================================================================================================*/ 75 76 /*================================================================================================== 77 * DEFINES AND MACROS 78 ==================================================================================================*/ 79 80 /*================================================================================================== 81 * ENUMS 82 ==================================================================================================*/ 83 84 /*================================================================================================== 85 * STRUCTURES AND OTHER TYPEDEFS 86 ==================================================================================================*/ 87 /** @brief Enum defining the possible events which triggers end of transfer callback. 88 * 89 * @implements Spi_Ip_EventType_enum 90 */ 91 typedef enum 92 { 93 SPI_IP_EVENT_END_TRANSFER = 0, /**< The transfer is successfully done. */ 94 SPI_IP_EVENT_FAULT = 1 /**< The transfer failed due to overflow/underflow. */ 95 } Spi_Ip_EventType; 96 97 /** @brief Callback for all peripherals which supports SPI features. */ 98 typedef void (*Spi_Ip_CallbackType)(uint8 Instance, Spi_Ip_EventType Event); 99 100 /** @brief Enum defining the possible transfer modes. 101 * 102 * @implements Spi_Ip_ModeType_enum 103 */ 104 typedef enum 105 { 106 SPI_IP_POLLING = 0, /**< For polling mode the application must call periodically Spi_Ip_ManageBuffers after asynchronous transfers. */ 107 SPI_IP_INTERRUPT /**< For interrupt mode the application doesn't need to perform any additional operations after asynchronous transfers. 108 The application must enable the interrupt requests and install the right callbacks. */ 109 } Spi_Ip_ModeType; 110 111 /** @brief Enum defining the possible states of hardware unit. 112 * @implements Spi_Ip_HwStatusType_enum 113 */ 114 typedef enum 115 { 116 SPI_IP_UNINIT = 0u, /**< Module is not initialized. */ 117 SPI_IP_IDLE = 1u, /**< Module is not used. */ 118 SPI_IP_BUSY = 2u, /**< A transfer is in progress. */ 119 SPI_IP_FAULT = 3u /**< During last transfer a fault occurred. */ 120 } Spi_Ip_HwStatusType; 121 122 /** @brief Enum defining the possible return types. 123 * 124 * @implements Spi_Ip_StatusType_enum 125 */ 126 typedef enum 127 { 128 SPI_IP_STATUS_SUCCESS = 0u, /**< Successful operation. */ 129 SPI_IP_STATUS_FAIL = 1u, /**< Failed operation. */ 130 SPI_IP_FIFO_ERROR = 2u, /**< Overflow or underflow error. */ 131 SPI_IP_TIMEOUT = 3u /**< Timeout error. */ 132 } Spi_Ip_StatusType; 133 134 /** @brief Structure defining some parameters often change of the spi bus. */ 135 typedef struct 136 { 137 uint8 FrameSize; /**< Frame size configured */ 138 boolean Lsb; /**< Transfer LSB first or MSB first */ 139 uint32 DefaultData; /**< Default data to send when TxBuffer is NULL_PTR */ 140 } Spi_Ip_DeviceParamsType; 141 142 /** @brief Structure defining the parameters of the spi bus. */ 143 typedef struct 144 { 145 uint8 Instance; /**< Instance of the hardware unit. */ 146 #if (SPI_IP_DUAL_CLOCK_MODE == STD_ON) 147 uint32 Ctar[2u]; /**< CTAR register which contains clocking and frame size configuration. */ 148 #else 149 uint32 Ctar; /**< CTAR register which contains clocking and frame size configuration. */ 150 #endif 151 uint32 Ctare; /**< CTARE registers which contains frame size configuration. */ 152 uint16 PushrCmd; /**< PUSHR CMD Fifo register which contains CS and continuos mode. */ 153 Spi_Ip_DeviceParamsType * DeviceParams; /**< Contain configuration for bit order, frame size, default transmit data. */ 154 } Spi_Ip_ExternalDeviceType; 155 156 #if (SPI_IP_DUAL_CLOCK_MODE == STD_ON) 157 /** 158 * @brief Specifies the Clock Modes. 159 */ 160 typedef enum 161 { 162 SPI_IP_NORMAL_CLOCK = 0, /**< @brief Clock reference is from SpiClockRef. */ 163 SPI_IP_ALTERNATE_CLOCK /**< @brief Clock reference is from SpiAlternateClockRef. */ 164 }Spi_Ip_DualClockModeType; 165 #endif 166 167 #if ((SPI_IP_DMA_USED == STD_ON) && (SPI_IP_ENABLE_DMAFASTTRANSFER_SUPPORT == STD_ON)) 168 /** @brief Structure defining transmition command needed for Dma Fast transfer. */ 169 typedef struct 170 { 171 uint16 DmaFastPushrCmd; /**< PUSHR CMD Fifo register which contains CS and continuos mode. */ 172 uint16 DmaFastPushrCmdLast; /**< PUSHR CMD Fifo register which contains CS and disable continuos mode. */ 173 uint32 DefaultData; /**< Default data to send when TxBuffer is NULL_PTR */ 174 } Spi_Ip_CmdDmaFastType; 175 176 /** @brief Structure defining information needed for Dma Fast transfer session. 177 * @implements Spi_Ip_FastTransferType_struct 178 */ 179 typedef struct 180 { 181 const Spi_Ip_ExternalDeviceType *ExternalDevice; /**< Point to external device configuration */ 182 const uint8* TxBuffer; /**< Store pointer for Tx buffer */ 183 uint8* RxBuffer; /**< Store pointer for Rx buffer */ 184 uint32 DefaultData; /**< Default data to send when TxBuffer is NULL_PTR */ 185 uint16 Length; /**< Number of bytes to be sent */ 186 boolean KeepCs; /**< Keep CS signal after transfer session completed */ 187 } Spi_Ip_FastTransferType; 188 #endif 189 190 /** @brief Structure defining information needed for SPI driver initialization. */ 191 typedef struct 192 { 193 uint8 Instance; /**< Instance of the hardware unit. */ 194 uint32 Mcr; /**< Select master/slave. */ 195 #if (SPI_IP_SLAVE_SUPPORT == STD_ON) 196 boolean SlaveMode; 197 #endif 198 #if (SPI_IP_DMA_USED == STD_ON) 199 boolean DmaUsed; /**< DMA is used or not */ 200 uint8 TxDmaChannel; /**< Id of TX DMA channel for transmition */ 201 uint8 TxCmdDmaChannel; /**< Id of CMD DMA channel for transmition */ 202 uint8 NumTxCmdDmaSGId; /**< Number of TCD Scatter Gather for CMD DMA channel */ 203 const uint8 *TxCmdDmaSGId; /**< Point to list of TCD Scatter Gather Id for CMD DMA channel */ 204 uint8 RxDmaChannel; /**< Id of RX DMA channel for receive */ 205 #if (SPI_IP_ENABLE_DMAFASTTRANSFER_SUPPORT == STD_ON) 206 uint8 MaxNumOfFastTransfer; /**< Maximum number of transfers in Dma Fast */ 207 Spi_Ip_CmdDmaFastType *CmdDmaFast; /**< Point to list of PUSH command used in Dma Fast transfer */ 208 uint8 NumberRxSG; /**< Number of TCD Scatter Gather for Rx DMA channel used in Dma Fast transfer */ 209 const uint8 *TxDmaFastSGId; /**< Point to list of TCD Scatter Gather Id for Tx DMA channel used in Dma Fast transfer */ 210 const uint8 *RxDmaFastSGId; /**< Point to list of TCD Scatter Gather Id for Rx DMA channel used in Dma Fast transfer */ 211 #endif 212 #endif 213 Spi_Ip_ModeType TransferMode; /**< Transfer mode for HWunit */ 214 uint8 StateIndex; /**< State of current transfer */ 215 } Spi_Ip_ConfigType; 216 217 /** @brief Structure defining information needed for internal state of the driver. */ 218 typedef struct 219 { 220 #if (SPI_IP_DUAL_CLOCK_MODE == STD_ON) 221 Spi_Ip_DualClockModeType ClockMode; /**< Store current clock mode for HWunit */ 222 #endif 223 Spi_Ip_ModeType TransferMode; /**< Store current transfer mode for HWunit */ 224 Spi_Ip_HwStatusType Status; /**< 0 = available, 1 = busy, 2 = fail due to overflow or underflow */ 225 uint8* RxBuffer; /**< Store pointer for Rx buffer */ 226 const uint8* TxBuffer; /**< Store pointer for Tx buffer */ 227 Spi_Ip_CallbackType Callback; /**< Store pointer for call back function */ 228 uint16 RxIndex; /**< Store current Rx index to receive data in Rx buffer */ 229 uint16 TxIndex; /**< Store current Tx index to transmit data in Tx buffer */ 230 uint16 ExpectedFifoReads; /**< Store number of frames needs to be receive for current transfer */ 231 uint16 ExpectedFifoWrites; /**< Store number of frames needs to be transmit for current transfer */ 232 uint16 ExpectedCmdFifoWrites; /**< Store number of frames needs to be transmit for current transfer */ 233 uint16 PushrCmd; /**< PUSHR CMD Fifo register which contains CS and continuos mode. */ 234 uint16 PushrCmdLast; /**< PUSHR CMD Fifo register which contains CS and disable continuos mode. */ 235 boolean KeepCs; /**< Keep CS signal after tranfers completed. */ 236 uint16 CurrentTxFifoSlot; /**< Number of TX FIFO slots are current available. */ 237 boolean CtareDtcpSupport; /**< Save CTARE DTCP value */ 238 const Spi_Ip_ConfigType *PhyUnitConfig; 239 const Spi_Ip_ExternalDeviceType *ExternalDevice; 240 } Spi_Ip_StateStructureType; 241 242 /*================================================================================================== 243 * GLOBAL VARIABLE DECLARATIONS 244 ==================================================================================================*/ 245 246 /*================================================================================================== 247 * FUNCTION PROTOTYPES 248 ==================================================================================================*/ 249 250 #ifdef __cplusplus 251 } 252 #endif 253 254 /** @} */ 255 256 #endif /*SPI_IP_TYPES*/ 257
