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Searched defs:DR_REG_INTERRUPT_CORE0_BASE (Results 1 – 3 of 3) sorted by relevance

/hal_espressif-latest/tools/esptool_py/flasher_stub/include/
Dsoc_support.h319 #define DR_REG_INTERRUPT_CORE0_BASE 0x600c2000 macro
329 #define DR_REG_INTERRUPT_CORE0_BASE 0x600c2000 macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dinterrupt_core0_reg.h23 #define DR_REG_INTERRUPT_CORE0_BASE DR_REG_INTERRUPT_BASE macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dinterrupt_core0_reg.h23 #define DR_REG_INTERRUPT_CORE0_BASE DR_REG_INTERRUPT_BASE macro