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Searched defs:DR_REG_INTERRUPT_CORE0_BASE (Results 1 – 4 of 4) sorted by relevance

/hal_espressif-3.4.0/components/esptool_py/esptool/flasher_stub/include/
Dsoc_support.h267 #define DR_REG_INTERRUPT_CORE0_BASE 0x600c2000 macro
277 #define DR_REG_INTERRUPT_CORE0_BASE 0x600c2000 macro
/hal_espressif-3.4.0/components/soc/esp32s3/include/soc/
Dinterrupt_core0_reg.h23 #define DR_REG_INTERRUPT_CORE0_BASE DR_REG_INTERRUPT_BASE macro
/hal_espressif-3.4.0/components/soc/esp32c3/include/soc/
Dinterrupt_core0_reg.h23 #define DR_REG_INTERRUPT_CORE0_BASE DR_REG_INTERRUPT_BASE macro
/hal_espressif-3.4.0/components/soc/esp32h2/include/soc/
Dinterrupt_core0_reg.h23 #define DR_REG_INTERRUPT_CORE0_BASE DR_REG_INTERRUPT_BASE macro