1 /* 2 * Copyright (c) 2023 Intel Corporation. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_INCLUDE_DRIVERS_DMA_INTEL_LPSS_H_ 8 #define ZEPHYR_INCLUDE_DRIVERS_DMA_INTEL_LPSS_H_ 9 10 #define DMA_INTEL_LPSS_OFFSET 0x800 11 #define DMA_INTEL_LPSS_REMAP_LOW 0x240 12 #define DMA_INTEL_LPSS_REMAP_HI 0x244 13 #define DMA_INTEL_LPSS_TX_CHAN 0 14 #define DMA_INTEL_LPSS_RX_CHAN 1 15 #define DMA_INTEL_LPSS_ADDR_RIGHT_SHIFT 32 16 17 void dma_intel_lpss_isr(const struct device *dev); 18 int dma_intel_lpss_setup(const struct device *dev); 19 void dma_intel_lpss_set_base(const struct device *dev, uintptr_t base); 20 21 #endif /* ZEPHYR_INCLUDE_DRIVERS_DMA_INTEL_LPSS_H_ */ 22