1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _FSL_DMAMUX_H_
10 #define _FSL_DMAMUX_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup dmamux
16 * @{
17 */
18
19 /*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22
23 /*! @name Driver version */
24 /*@{*/
25 /*! @brief DMAMUX driver version 2.1.0. */
26 #define FSL_DMAMUX_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
27 /*@}*/
28
29 /*******************************************************************************
30 * API
31 ******************************************************************************/
32
33 #if defined(__cplusplus)
34 extern "C" {
35 #endif /* __cplusplus */
36
37 /*!
38 * @name DMAMUX Initialization and de-initialization
39 * @{
40 */
41
42 /*!
43 * @brief Initializes the DMAMUX peripheral.
44 *
45 * This function ungates the DMAMUX clock.
46 *
47 * @param base DMAMUX peripheral base address.
48 *
49 */
50 void DMAMUX_Init(DMAMUX_Type *base);
51
52 /*!
53 * @brief Deinitializes the DMAMUX peripheral.
54 *
55 * This function gates the DMAMUX clock.
56 *
57 * @param base DMAMUX peripheral base address.
58 */
59 void DMAMUX_Deinit(DMAMUX_Type *base);
60
61 /* @} */
62 /*!
63 * @name DMAMUX Channel Operation
64 * @{
65 */
66
67 /*!
68 * @brief Enables the DMAMUX channel.
69 *
70 * This function enables the DMAMUX channel.
71 *
72 * @param base DMAMUX peripheral base address.
73 * @param channel DMAMUX channel number.
74 */
DMAMUX_EnableChannel(DMAMUX_Type * base,uint32_t channel)75 static inline void DMAMUX_EnableChannel(DMAMUX_Type *base, uint32_t channel)
76 {
77 assert(channel < (uint32_t)FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
78
79 base->CHCFG[channel] |= DMAMUX_CHCFG_ENBL_MASK;
80 }
81
82 /*!
83 * @brief Disables the DMAMUX channel.
84 *
85 * This function disables the DMAMUX channel.
86 *
87 * @note The user must disable the DMAMUX channel before configuring it.
88 * @param base DMAMUX peripheral base address.
89 * @param channel DMAMUX channel number.
90 */
DMAMUX_DisableChannel(DMAMUX_Type * base,uint32_t channel)91 static inline void DMAMUX_DisableChannel(DMAMUX_Type *base, uint32_t channel)
92 {
93 assert(channel < (uint32_t)FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
94
95 #if defined FSL_FEATURE_DMAMUX_CHCFG_REGISTER_WIDTH && (FSL_FEATURE_DMAMUX_CHCFG_REGISTER_WIDTH == 32U)
96 base->CHCFG[channel] &= ~DMAMUX_CHCFG_ENBL_MASK;
97 #else
98 base->CHCFG[channel] &= ~(uint8_t)DMAMUX_CHCFG_ENBL_MASK;
99 #endif
100 }
101
102 /*!
103 * @brief Configures the DMAMUX channel source.
104 *
105 * @param base DMAMUX peripheral base address.
106 * @param channel DMAMUX channel number.
107 * @param source Channel source, which is used to trigger the DMA transfer.User need to use the
108 * dma_request_source_t type as the input parameter.
109 */
DMAMUX_SetSource(DMAMUX_Type * base,uint32_t channel,int32_t source)110 static inline void DMAMUX_SetSource(DMAMUX_Type *base, uint32_t channel, int32_t source)
111 {
112 assert(channel < (uint32_t)FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
113
114 #if defined FSL_FEATURE_DMAMUX_CHCFG_REGISTER_WIDTH && (FSL_FEATURE_DMAMUX_CHCFG_REGISTER_WIDTH == 32U)
115 base->CHCFG[channel] = ((base->CHCFG[channel] & ~DMAMUX_CHCFG_SOURCE_MASK) | DMAMUX_CHCFG_SOURCE(source));
116 #else
117 base->CHCFG[channel] = (uint8_t)((base->CHCFG[channel] & ~DMAMUX_CHCFG_SOURCE_MASK) | DMAMUX_CHCFG_SOURCE(source));
118 #endif
119 }
120
121 #if defined(FSL_FEATURE_DMAMUX_HAS_TRIG) && FSL_FEATURE_DMAMUX_HAS_TRIG > 0U
122 /*!
123 * @brief Enables the DMAMUX period trigger.
124 *
125 * This function enables the DMAMUX period trigger feature.
126 *
127 * @param base DMAMUX peripheral base address.
128 * @param channel DMAMUX channel number.
129 */
DMAMUX_EnablePeriodTrigger(DMAMUX_Type * base,uint32_t channel)130 static inline void DMAMUX_EnablePeriodTrigger(DMAMUX_Type *base, uint32_t channel)
131 {
132 assert(channel < (uint32_t)FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
133
134 base->CHCFG[channel] |= DMAMUX_CHCFG_TRIG_MASK;
135 }
136
137 /*!
138 * @brief Disables the DMAMUX period trigger.
139 *
140 * This function disables the DMAMUX period trigger.
141 *
142 * @param base DMAMUX peripheral base address.
143 * @param channel DMAMUX channel number.
144 */
DMAMUX_DisablePeriodTrigger(DMAMUX_Type * base,uint32_t channel)145 static inline void DMAMUX_DisablePeriodTrigger(DMAMUX_Type *base, uint32_t channel)
146 {
147 assert(channel < (uint32_t)FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
148
149 #if defined FSL_FEATURE_DMAMUX_CHCFG_REGISTER_WIDTH && (FSL_FEATURE_DMAMUX_CHCFG_REGISTER_WIDTH == 32U)
150 base->CHCFG[channel] &= ~DMAMUX_CHCFG_TRIG_MASK;
151 #else
152 base->CHCFG[channel] &= ~(uint8_t)DMAMUX_CHCFG_TRIG_MASK;
153 #endif
154 }
155 #endif /* FSL_FEATURE_DMAMUX_HAS_TRIG */
156
157 #if (defined(FSL_FEATURE_DMAMUX_HAS_A_ON) && FSL_FEATURE_DMAMUX_HAS_A_ON)
158 /*!
159 * @brief Enables the DMA channel to be always ON.
160 *
161 * This function enables the DMAMUX channel always ON feature.
162 *
163 * @param base DMAMUX peripheral base address.
164 * @param channel DMAMUX channel number.
165 * @param enable Switcher of the always ON feature. "true" means enabled, "false" means disabled.
166 */
DMAMUX_EnableAlwaysOn(DMAMUX_Type * base,uint32_t channel,bool enable)167 static inline void DMAMUX_EnableAlwaysOn(DMAMUX_Type *base, uint32_t channel, bool enable)
168 {
169 assert(channel < (uint32_t)FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
170
171 if (enable)
172 {
173 base->CHCFG[channel] |= DMAMUX_CHCFG_A_ON_MASK;
174 }
175 else
176 {
177 base->CHCFG[channel] &= ~DMAMUX_CHCFG_A_ON_MASK;
178 }
179 }
180 #endif /* FSL_FEATURE_DMAMUX_HAS_A_ON */
181
182 /* @} */
183
184 #if defined(__cplusplus)
185 }
186 #endif /* __cplusplus */
187
188 /* @} */
189
190 #endif /* _FSL_DMAMUX_H_ */
191