1;********************** COPYRIGHT(c) 2017 STMicroelectronics ****************** 2;* File Name : startup_stm32l476xx.s 3;* Author : MCD Application Team 4;* Description : STM32L476xx Ultra Low Power devices vector table for MDK-ARM toolchain. 5;* This module performs: 6;* - Set the initial SP 7;* - Set the initial PC == Reset_Handler 8;* - Set the vector table entries with the exceptions ISR address 9;* - Branches to __main in the C library (which eventually 10;* calls main()). 11;* After Reset the Cortex-M4 processor is in Thread mode, 12;* priority is Privileged, and the Stack is set to Main. 13;* <<< Use Configuration Wizard in Context Menu >>> 14;******************************************************************************* 15;* 16;* Redistribution and use in source and binary forms, with or without modification, 17;* are permitted provided that the following conditions are met: 18;* 1. Redistributions of source code must retain the above copyright notice, 19;* this list of conditions and the following disclaimer. 20;* 2. Redistributions in binary form must reproduce the above copyright notice, 21;* this list of conditions and the following disclaimer in the documentation 22;* and/or other materials provided with the distribution. 23;* 3. Neither the name of STMicroelectronics nor the names of its contributors 24;* may be used to endorse or promote products derived from this software 25;* without specific prior written permission. 26;* 27;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 28;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 30;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 31;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 34;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 35;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 36;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37;* 38;******************************************************************************* 39; 40; Amount of memory (in bytes) allocated for Stack 41; Tailor this value to your application needs 42; <h> Stack Configuration 43; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 44; </h> 45 46Stack_Size EQU 0x800; 47 48 AREA STACK, NOINIT, READWRITE, ALIGN=3 49Stack_Mem SPACE Stack_Size 50__initial_sp 51 52 53; <h> Heap Configuration 54; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 55; </h> 56 57Heap_Size EQU 0x200; 58 59 AREA HEAP, NOINIT, READWRITE, ALIGN=3 60__heap_base 61Heap_Mem SPACE Heap_Size 62__heap_limit 63 64 PRESERVE8 65 THUMB 66 67 68; Vector Table Mapped to Address 0 at Reset 69 AREA RESET, DATA, READONLY 70 EXPORT __Vectors 71 EXPORT __Vectors_End 72 EXPORT __Vectors_Size 73 74__Vectors DCD __initial_sp ; Top of Stack 75 DCD Reset_Handler ; Reset Handler 76 DCD NMI_Handler ; NMI Handler 77 DCD HardFault_Handler ; Hard Fault Handler 78 DCD MemManage_Handler ; MPU Fault Handler 79 DCD BusFault_Handler ; Bus Fault Handler 80 DCD UsageFault_Handler ; Usage Fault Handler 81 DCD 0 ; Reserved 82 DCD 0 ; Reserved 83 DCD 0 ; Reserved 84 DCD 0 ; Reserved 85 DCD SVC_Handler ; SVCall Handler 86 DCD DebugMon_Handler ; Debug Monitor Handler 87 DCD 0 ; Reserved 88 DCD PendSV_Handler ; PendSV Handler 89 DCD SysTick_Handler ; SysTick Handler 90 91 ; External Interrupts 92 DCD WWDG_IRQHandler ; Window WatchDog 93 DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection 94 DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line 95 DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line 96 DCD FLASH_IRQHandler ; FLASH 97 DCD RCC_IRQHandler ; RCC 98 DCD EXTI0_IRQHandler ; EXTI Line0 99 DCD EXTI1_IRQHandler ; EXTI Line1 100 DCD EXTI2_IRQHandler ; EXTI Line2 101 DCD EXTI3_IRQHandler ; EXTI Line3 102 DCD EXTI4_IRQHandler ; EXTI Line4 103 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 104 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 105 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 106 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 107 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 108 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 109 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 110 DCD ADC1_2_IRQHandler ; ADC1, ADC2 111 DCD CAN1_TX_IRQHandler ; CAN1 TX 112 DCD CAN1_RX0_IRQHandler ; CAN1 RX0 113 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 114 DCD CAN1_SCE_IRQHandler ; CAN1 SCE 115 DCD EXTI9_5_IRQHandler ; External Line[9:5]s 116 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 117 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 118 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 119 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare 120 DCD TIM2_IRQHandler ; TIM2 121 DCD TIM3_IRQHandler ; TIM3 122 DCD TIM4_IRQHandler ; TIM4 123 DCD I2C1_EV_IRQHandler ; I2C1 Event 124 DCD I2C1_ER_IRQHandler ; I2C1 Error 125 DCD I2C2_EV_IRQHandler ; I2C2 Event 126 DCD I2C2_ER_IRQHandler ; I2C2 Error 127 DCD SPI1_IRQHandler ; SPI1 128 DCD SPI2_IRQHandler ; SPI2 129 DCD USART1_IRQHandler ; USART1 130 DCD USART2_IRQHandler ; USART2 131 DCD USART3_IRQHandler ; USART3 132 DCD EXTI15_10_IRQHandler ; External Line[15:10] 133 DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line 134 DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt 135 DCD TIM8_BRK_IRQHandler ; TIM8 Break Interrupt 136 DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt 137 DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation Interrupt 138 DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt 139 DCD ADC3_IRQHandler ; ADC3 global Interrupt 140 DCD FMC_IRQHandler ; FMC 141 DCD SDMMC1_IRQHandler ; SDMMC1 142 DCD TIM5_IRQHandler ; TIM5 143 DCD SPI3_IRQHandler ; SPI3 144 DCD UART4_IRQHandler ; UART4 145 DCD UART5_IRQHandler ; UART5 146 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors 147 DCD TIM7_IRQHandler ; TIM7 148 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 149 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 150 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 151 DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 152 DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 153 DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt 154 DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt 155 DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt 156 DCD COMP_IRQHandler ; COMP Interrupt 157 DCD LPTIM1_IRQHandler ; LP TIM1 interrupt 158 DCD LPTIM2_IRQHandler ; LP TIM2 interrupt 159 DCD OTG_FS_IRQHandler ; USB OTG FS 160 DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6 161 DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7 162 DCD LPUART1_IRQHandler ; LP UART1 interrupt 163 DCD QUADSPI_IRQHandler ; Quad SPI global interrupt 164 DCD I2C3_EV_IRQHandler ; I2C3 event 165 DCD I2C3_ER_IRQHandler ; I2C3 error 166 DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt 167 DCD SAI2_IRQHandler ; Serial Audio Interface 2 global interrupt 168 DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt 169 DCD TSC_IRQHandler ; Touch Sense Controller global interrupt 170 DCD LCD_IRQHandler ; LCD global interrupt 171 DCD 0 ; Reserved 172 DCD RNG_IRQHandler ; RNG global interrupt 173 DCD FPU_IRQHandler ; FPU 174 175__Vectors_End 176 177__Vectors_Size EQU __Vectors_End - __Vectors 178 179 AREA |.text|, CODE, READONLY 180 181; Reset handler 182Reset_Handler PROC 183 EXPORT Reset_Handler [WEAK] 184 IMPORT SystemInit 185 IMPORT __main 186 187 LDR R0, =SystemInit 188 BLX R0 189 LDR R0, =__main 190 BX R0 191 ENDP 192 193; Dummy Exception Handlers (infinite loops which can be modified) 194 195NMI_Handler PROC 196 EXPORT NMI_Handler [WEAK] 197 B . 198 ENDP 199HardFault_Handler\ 200 PROC 201 EXPORT HardFault_Handler [WEAK] 202 B . 203 ENDP 204MemManage_Handler\ 205 PROC 206 EXPORT MemManage_Handler [WEAK] 207 B . 208 ENDP 209BusFault_Handler\ 210 PROC 211 EXPORT BusFault_Handler [WEAK] 212 B . 213 ENDP 214UsageFault_Handler\ 215 PROC 216 EXPORT UsageFault_Handler [WEAK] 217 B . 218 ENDP 219SVC_Handler PROC 220 EXPORT SVC_Handler [WEAK] 221 B . 222 ENDP 223DebugMon_Handler\ 224 PROC 225 EXPORT DebugMon_Handler [WEAK] 226 B . 227 ENDP 228PendSV_Handler PROC 229 EXPORT PendSV_Handler [WEAK] 230 B . 231 ENDP 232SysTick_Handler PROC 233 EXPORT SysTick_Handler [WEAK] 234 B . 235 ENDP 236 237Default_Handler PROC 238 239 EXPORT WWDG_IRQHandler [WEAK] 240 EXPORT PVD_PVM_IRQHandler [WEAK] 241 EXPORT TAMP_STAMP_IRQHandler [WEAK] 242 EXPORT RTC_WKUP_IRQHandler [WEAK] 243 EXPORT FLASH_IRQHandler [WEAK] 244 EXPORT RCC_IRQHandler [WEAK] 245 EXPORT EXTI0_IRQHandler [WEAK] 246 EXPORT EXTI1_IRQHandler [WEAK] 247 EXPORT EXTI2_IRQHandler [WEAK] 248 EXPORT EXTI3_IRQHandler [WEAK] 249 EXPORT EXTI4_IRQHandler [WEAK] 250 EXPORT DMA1_Channel1_IRQHandler [WEAK] 251 EXPORT DMA1_Channel2_IRQHandler [WEAK] 252 EXPORT DMA1_Channel3_IRQHandler [WEAK] 253 EXPORT DMA1_Channel4_IRQHandler [WEAK] 254 EXPORT DMA1_Channel5_IRQHandler [WEAK] 255 EXPORT DMA1_Channel6_IRQHandler [WEAK] 256 EXPORT DMA1_Channel7_IRQHandler [WEAK] 257 EXPORT ADC1_2_IRQHandler [WEAK] 258 EXPORT CAN1_TX_IRQHandler [WEAK] 259 EXPORT CAN1_RX0_IRQHandler [WEAK] 260 EXPORT CAN1_RX1_IRQHandler [WEAK] 261 EXPORT CAN1_SCE_IRQHandler [WEAK] 262 EXPORT EXTI9_5_IRQHandler [WEAK] 263 EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] 264 EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] 265 EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK] 266 EXPORT TIM1_CC_IRQHandler [WEAK] 267 EXPORT TIM2_IRQHandler [WEAK] 268 EXPORT TIM3_IRQHandler [WEAK] 269 EXPORT TIM4_IRQHandler [WEAK] 270 EXPORT I2C1_EV_IRQHandler [WEAK] 271 EXPORT I2C1_ER_IRQHandler [WEAK] 272 EXPORT I2C2_EV_IRQHandler [WEAK] 273 EXPORT I2C2_ER_IRQHandler [WEAK] 274 EXPORT SPI1_IRQHandler [WEAK] 275 EXPORT SPI2_IRQHandler [WEAK] 276 EXPORT USART1_IRQHandler [WEAK] 277 EXPORT USART2_IRQHandler [WEAK] 278 EXPORT USART3_IRQHandler [WEAK] 279 EXPORT EXTI15_10_IRQHandler [WEAK] 280 EXPORT RTC_Alarm_IRQHandler [WEAK] 281 EXPORT DFSDM1_FLT3_IRQHandler [WEAK] 282 EXPORT TIM8_BRK_IRQHandler [WEAK] 283 EXPORT TIM8_UP_IRQHandler [WEAK] 284 EXPORT TIM8_TRG_COM_IRQHandler [WEAK] 285 EXPORT TIM8_CC_IRQHandler [WEAK] 286 EXPORT ADC3_IRQHandler [WEAK] 287 EXPORT FMC_IRQHandler [WEAK] 288 EXPORT SDMMC1_IRQHandler [WEAK] 289 EXPORT TIM5_IRQHandler [WEAK] 290 EXPORT SPI3_IRQHandler [WEAK] 291 EXPORT UART4_IRQHandler [WEAK] 292 EXPORT UART5_IRQHandler [WEAK] 293 EXPORT TIM6_DAC_IRQHandler [WEAK] 294 EXPORT TIM7_IRQHandler [WEAK] 295 EXPORT DMA2_Channel1_IRQHandler [WEAK] 296 EXPORT DMA2_Channel2_IRQHandler [WEAK] 297 EXPORT DMA2_Channel3_IRQHandler [WEAK] 298 EXPORT DMA2_Channel4_IRQHandler [WEAK] 299 EXPORT DMA2_Channel5_IRQHandler [WEAK] 300 EXPORT DFSDM1_FLT0_IRQHandler [WEAK] 301 EXPORT DFSDM1_FLT1_IRQHandler [WEAK] 302 EXPORT DFSDM1_FLT2_IRQHandler [WEAK] 303 EXPORT COMP_IRQHandler [WEAK] 304 EXPORT LPTIM1_IRQHandler [WEAK] 305 EXPORT LPTIM2_IRQHandler [WEAK] 306 EXPORT OTG_FS_IRQHandler [WEAK] 307 EXPORT DMA2_Channel6_IRQHandler [WEAK] 308 EXPORT DMA2_Channel7_IRQHandler [WEAK] 309 EXPORT LPUART1_IRQHandler [WEAK] 310 EXPORT QUADSPI_IRQHandler [WEAK] 311 EXPORT I2C3_EV_IRQHandler [WEAK] 312 EXPORT I2C3_ER_IRQHandler [WEAK] 313 EXPORT SAI1_IRQHandler [WEAK] 314 EXPORT SAI2_IRQHandler [WEAK] 315 EXPORT SWPMI1_IRQHandler [WEAK] 316 EXPORT TSC_IRQHandler [WEAK] 317 EXPORT LCD_IRQHandler [WEAK] 318 EXPORT RNG_IRQHandler [WEAK] 319 EXPORT FPU_IRQHandler [WEAK] 320 321WWDG_IRQHandler 322PVD_PVM_IRQHandler 323TAMP_STAMP_IRQHandler 324RTC_WKUP_IRQHandler 325FLASH_IRQHandler 326RCC_IRQHandler 327EXTI0_IRQHandler 328EXTI1_IRQHandler 329EXTI2_IRQHandler 330EXTI3_IRQHandler 331EXTI4_IRQHandler 332DMA1_Channel1_IRQHandler 333DMA1_Channel2_IRQHandler 334DMA1_Channel3_IRQHandler 335DMA1_Channel4_IRQHandler 336DMA1_Channel5_IRQHandler 337DMA1_Channel6_IRQHandler 338DMA1_Channel7_IRQHandler 339ADC1_2_IRQHandler 340CAN1_TX_IRQHandler 341CAN1_RX0_IRQHandler 342CAN1_RX1_IRQHandler 343CAN1_SCE_IRQHandler 344EXTI9_5_IRQHandler 345TIM1_BRK_TIM15_IRQHandler 346TIM1_UP_TIM16_IRQHandler 347TIM1_TRG_COM_TIM17_IRQHandler 348TIM1_CC_IRQHandler 349TIM2_IRQHandler 350TIM3_IRQHandler 351TIM4_IRQHandler 352I2C1_EV_IRQHandler 353I2C1_ER_IRQHandler 354I2C2_EV_IRQHandler 355I2C2_ER_IRQHandler 356SPI1_IRQHandler 357SPI2_IRQHandler 358USART1_IRQHandler 359USART2_IRQHandler 360USART3_IRQHandler 361EXTI15_10_IRQHandler 362RTC_Alarm_IRQHandler 363DFSDM1_FLT3_IRQHandler 364TIM8_BRK_IRQHandler 365TIM8_UP_IRQHandler 366TIM8_TRG_COM_IRQHandler 367TIM8_CC_IRQHandler 368ADC3_IRQHandler 369FMC_IRQHandler 370SDMMC1_IRQHandler 371TIM5_IRQHandler 372SPI3_IRQHandler 373UART4_IRQHandler 374UART5_IRQHandler 375TIM6_DAC_IRQHandler 376TIM7_IRQHandler 377DMA2_Channel1_IRQHandler 378DMA2_Channel2_IRQHandler 379DMA2_Channel3_IRQHandler 380DMA2_Channel4_IRQHandler 381DMA2_Channel5_IRQHandler 382DFSDM1_FLT0_IRQHandler 383DFSDM1_FLT1_IRQHandler 384DFSDM1_FLT2_IRQHandler 385COMP_IRQHandler 386LPTIM1_IRQHandler 387LPTIM2_IRQHandler 388OTG_FS_IRQHandler 389DMA2_Channel6_IRQHandler 390DMA2_Channel7_IRQHandler 391LPUART1_IRQHandler 392QUADSPI_IRQHandler 393I2C3_EV_IRQHandler 394I2C3_ER_IRQHandler 395SAI1_IRQHandler 396SAI2_IRQHandler 397SWPMI1_IRQHandler 398TSC_IRQHandler 399LCD_IRQHandler 400RNG_IRQHandler 401FPU_IRQHandler 402 403 B . 404 405 ENDP 406 407 ALIGN 408 409;******************************************************************************* 410; User Stack and Heap initialization 411;******************************************************************************* 412 IF :DEF:__MICROLIB 413 414 EXPORT __initial_sp 415 EXPORT __heap_base 416 EXPORT __heap_limit 417 418 ELSE 419 420 IMPORT __use_two_region_memory 421 EXPORT __user_initial_stackheap 422 423__user_initial_stackheap 424 425 LDR R0, = Heap_Mem 426 LDR R1, =(Stack_Mem + Stack_Size) 427 LDR R2, = (Heap_Mem + Heap_Size) 428 LDR R3, = Stack_Mem 429 BX LR 430 431 ALIGN 432 433 ENDIF 434 435 END 436 437;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** 438
