Searched defs:DGO_GP5 (Results 1 – 11 of 11) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/ |
| D | MIMX8UD7_dsp1.h | 107731 __IO uint32_t DGO_GP5; /**< PTF Operating Range Control, offset: 0x28 */ member
108783 …__IO uint32_t DGO_GP5; /**< RTD SIM DGO General Purpose Register 5, offs… member
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| D | MIMX8UD7_dsp0.h | 108428 __IO uint32_t DGO_GP5; /**< PTF Operating Range Control, offset: 0x28 */ member
109480 …__IO uint32_t DGO_GP5; /**< RTD SIM DGO General Purpose Register 5, offs… member
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| D | MIMX8UD7_cm33.h | 110244 __IO uint32_t DGO_GP5; /**< PTF Operating Range Control, offset: 0x28 */ member
111334 …__IO uint32_t DGO_GP5; /**< RTD SIM DGO General Purpose Register 5, offs… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/ |
| D | MIMX8UD3_cm33.h | 110244 __IO uint32_t DGO_GP5; /**< PTF Operating Range Control, offset: 0x28 */ member
111334 …__IO uint32_t DGO_GP5; /**< RTD SIM DGO General Purpose Register 5, offs… member
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| D | MIMX8UD3_dsp0.h | 108428 __IO uint32_t DGO_GP5; /**< PTF Operating Range Control, offset: 0x28 */ member
109480 …__IO uint32_t DGO_GP5; /**< RTD SIM DGO General Purpose Register 5, offs… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/ |
| D | MIMX8UD5_cm33.h | 108636 __IO uint32_t DGO_GP5; /**< PTF Operating Range Control, offset: 0x28 */ member
109726 …__IO uint32_t DGO_GP5; /**< RTD SIM DGO General Purpose Register 5, offs… member
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| D | MIMX8UD5_dsp0.h | 106841 __IO uint32_t DGO_GP5; /**< PTF Operating Range Control, offset: 0x28 */ member
107893 …__IO uint32_t DGO_GP5; /**< RTD SIM DGO General Purpose Register 5, offs… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/ |
| D | MIMX8US5_dsp0.h | 106841 __IO uint32_t DGO_GP5; /**< PTF Operating Range Control, offset: 0x28 */ member
107893 …__IO uint32_t DGO_GP5; /**< RTD SIM DGO General Purpose Register 5, offs… member
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| D | MIMX8US5_cm33.h | 108636 __IO uint32_t DGO_GP5; /**< PTF Operating Range Control, offset: 0x28 */ member
109726 …__IO uint32_t DGO_GP5; /**< RTD SIM DGO General Purpose Register 5, offs… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/ |
| D | MIMX8US3_dsp0.h | 108428 __IO uint32_t DGO_GP5; /**< PTF Operating Range Control, offset: 0x28 */ member
109480 …__IO uint32_t DGO_GP5; /**< RTD SIM DGO General Purpose Register 5, offs… member
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| D | MIMX8US3_cm33.h | 110244 __IO uint32_t DGO_GP5; /**< PTF Operating Range Control, offset: 0x28 */ member
111334 …__IO uint32_t DGO_GP5; /**< RTD SIM DGO General Purpose Register 5, offs… member
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