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Searched defs:DCDC_REG2_DCM_SET_CTRL_MASK (Results 1 – 23 of 23) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h8175 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h8893 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h10473 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h10457 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h12741 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h11499 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h12284 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h13110 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h12743 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h13896 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h13970 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm4.h26600 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
DMIMXRT1165_cm7.h26603 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm7.h28610 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
DMIMXRT1166_cm4.h28607 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h26921 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
DMIMXRT1175_cm4.h26918 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h26921 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h28922 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
DMIMXRT1173_cm7.h28925 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm4.h28925 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
DMIMXRT1176_cm7.h28928 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h28928 #define DCDC_REG2_DCM_SET_CTRL_MASK (0x10000000U) macro