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Searched defs:DCDC_REG0_PWD_ZCD_MASK (Results 1 – 23 of 23) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h7923 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h8641 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h10221 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h10205 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h12489 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h11247 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h12032 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h12858 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h12491 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h13644 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h13718 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm4.h26376 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
DMIMXRT1165_cm7.h26379 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm7.h28386 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
DMIMXRT1166_cm4.h28383 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h26697 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
DMIMXRT1175_cm4.h26694 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h26697 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h28698 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
DMIMXRT1173_cm7.h28701 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm4.h28701 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
DMIMXRT1176_cm7.h28704 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h28704 #define DCDC_REG0_PWD_ZCD_MASK (0x1U) macro