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Searched defs:DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm4.h26447 #define DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (0x20000U) macro
DMIMXRT1165_cm7.h26450 #define DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (0x20000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm7.h28457 #define DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (0x20000U) macro
DMIMXRT1166_cm4.h28454 #define DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (0x20000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h26768 #define DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (0x20000U) macro
DMIMXRT1175_cm4.h26765 #define DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (0x20000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h26768 #define DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (0x20000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h28769 #define DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (0x20000U) macro
DMIMXRT1173_cm7.h28772 #define DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (0x20000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm4.h28772 #define DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (0x20000U) macro
DMIMXRT1176_cm7.h28775 #define DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (0x20000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h28775 #define DCDC_REG0_PWD_HIGH_VDD1P0_DET_MASK (0x20000U) macro