/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/ |
D | MIMXRT1011.h | 7955 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/ |
D | MIMXRT1015.h | 8673 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/ |
D | MIMXRT1021.h | 10253 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/ |
D | MIMXRT1024.h | 10237 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/ |
D | MIMXRT1041.h | 12521 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/ |
D | MIMXRT1051.h | 11279 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/ |
D | MIMXRT1052.h | 12064 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/ |
D | MIMXRT1061.h | 12890 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/ |
D | MIMXRT1042.h | 12523 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/ |
D | MIMXRT1062.h | 13676 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/ |
D | MIMXRT1064.h | 13750 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/ |
D | MIMXRT1165_cm4.h | 26409 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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D | MIMXRT1165_cm7.h | 26412 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/ |
D | MIMXRT1166_cm7.h | 28419 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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D | MIMXRT1166_cm4.h | 28416 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/ |
D | MIMXRT1175_cm7.h | 26730 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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D | MIMXRT1175_cm4.h | 26727 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1171/ |
D | MIMXRT1171.h | 26730 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1173/ |
D | MIMXRT1173_cm4.h | 28731 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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D | MIMXRT1173_cm7.h | 28734 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1176/ |
D | MIMXRT1176_cm4.h | 28734 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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D | MIMXRT1176_cm7.h | 28737 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1172/ |
D | MIMXRT1172.h | 28737 #define DCDC_REG0_PWD_CUR_SNS_CMP_MASK (0x10U) macro
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