1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_flash_ramfunc.c
4 * @author MCD Application Team
5 * @brief FLASH RAMFUNC driver.
6 * This file provides a Flash firmware functions which should be
7 * executed from internal SRAM
8 * + FLASH HalfPage Programming
9 * + FLASH Power Down in Run mode
10 *
11 * @verbatim
12 ==============================================================================
13 ##### Flash RAM functions #####
14 ==============================================================================
15
16 *** ARM Compiler ***
17 --------------------
18 [..] RAM functions are defined using the toolchain options.
19 Functions that are executed in RAM should reside in a separate
20 source module. Using the 'Options for File' dialog you can simply change
21 the 'Code / Const' area of a module to a memory space in physical RAM.
22 Available memory areas are declared in the 'Target' tab of the
23 Options for Target' dialog.
24
25 *** ICCARM Compiler ***
26 -----------------------
27 [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
28
29 *** GNU Compiler ***
30 --------------------
31 [..] RAM functions are defined using a specific toolchain attribute
32 "__attribute__((section(".RamFunc")))".
33
34 @endverbatim
35 ******************************************************************************
36 * @attention
37 *
38 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
39 *
40 * Redistribution and use in source and binary forms, with or without modification,
41 * are permitted provided that the following conditions are met:
42 * 1. Redistributions of source code must retain the above copyright notice,
43 * this list of conditions and the following disclaimer.
44 * 2. Redistributions in binary form must reproduce the above copyright notice,
45 * this list of conditions and the following disclaimer in the documentation
46 * and/or other materials provided with the distribution.
47 * 3. Neither the name of STMicroelectronics nor the names of its contributors
48 * may be used to endorse or promote products derived from this software
49 * without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
52 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
53 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
54 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
55 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
56 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
57 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
58 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
59 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 ******************************************************************************
63 */
64
65 /* Includes ------------------------------------------------------------------*/
66 #include "stm32l4xx_hal.h"
67
68 /** @addtogroup STM32L4xx_HAL_Driver
69 * @{
70 */
71
72 /** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC
73 * @brief FLASH functions executed from RAM
74 * @{
75 */
76
77 #ifdef HAL_FLASH_MODULE_ENABLED
78
79 /* Private typedef -----------------------------------------------------------*/
80 /* Private define ------------------------------------------------------------*/
81 /* Private macro -------------------------------------------------------------*/
82 /* Private variables ---------------------------------------------------------*/
83 extern FLASH_ProcessTypeDef pFlash;
84
85 /* Private function prototypes -----------------------------------------------*/
86 /* Exported functions -------------------------------------------------------*/
87
88 /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH in RAM function Exported Functions
89 * @{
90 */
91
92 /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions
93 * @brief Data transfers functions
94 *
95 @verbatim
96 ===============================================================================
97 ##### ramfunc functions #####
98 ===============================================================================
99 [..]
100 This subsection provides a set of functions that should be executed from RAM.
101
102 @endverbatim
103 * @{
104 */
105
106 /**
107 * @brief Enable the Power down in Run Mode
108 * @note This function should be called and executed from SRAM memory
109 * @retval None
110 */
HAL_FLASHEx_EnableRunPowerDown(void)111 __RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void)
112 {
113 /* Enable the Power Down in Run mode*/
114 __HAL_FLASH_POWER_DOWN_ENABLE();
115
116 return HAL_OK;
117
118 }
119
120 /**
121 * @brief Disable the Power down in Run Mode
122 * @note This function should be called and executed from SRAM memory
123 * @retval None
124 */
HAL_FLASHEx_DisableRunPowerDown(void)125 __RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void)
126 {
127 /* Disable the Power Down in Run mode*/
128 __HAL_FLASH_POWER_DOWN_DISABLE();
129
130 return HAL_OK;
131 }
132
133 #if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
134 /**
135 * @brief Program the FLASH DBANK User Option Byte.
136 *
137 * @note To configure the user option bytes, the option lock bit OPTLOCK must
138 * be cleared with the call of the HAL_FLASH_OB_Unlock() function.
139 * @note To modify the DBANK option byte, no PCROP region should be defined.
140 * To deactivate PCROP, user should perform RDP changing
141 *
142 * @param DBankConfig: The FLASH DBANK User Option Byte value.
143 * This parameter can be one of the following values:
144 * @arg OB_DBANK_128_BITS: Single-bank with 128-bits data
145 * @arg OB_DBANK_64_BITS: Dual-bank with 64-bits data
146 *
147 * @retval HAL status
148 */
HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig)149 __RAM_FUNC HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig)
150 {
151 register uint32_t count, reg;
152 HAL_StatusTypeDef status = HAL_ERROR;
153
154 /* Process Locked */
155 __HAL_LOCK(&pFlash);
156
157 /* Check if the PCROP is disabled */
158 reg = FLASH->PCROP1SR;
159 if (reg > FLASH->PCROP1ER)
160 {
161 reg = FLASH->PCROP2SR;
162 if (reg > FLASH->PCROP2ER)
163 {
164 /* Disable Flash prefetch */
165 __HAL_FLASH_PREFETCH_BUFFER_DISABLE();
166
167 if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != 0U)
168 {
169 /* Disable Flash instruction cache */
170 __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
171
172 /* Flush Flash instruction cache */
173 __HAL_FLASH_INSTRUCTION_CACHE_RESET();
174 }
175
176 if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != 0U)
177 {
178 /* Disable Flash data cache */
179 __HAL_FLASH_DATA_CACHE_DISABLE();
180
181 /* Flush Flash data cache */
182 __HAL_FLASH_DATA_CACHE_RESET();
183 }
184
185 /* Disable WRP zone 1 of 1st bank if needed */
186 reg = FLASH->WRP1AR;
187 if (((reg & FLASH_WRP1AR_WRP1A_STRT) >> FLASH_WRP1AR_WRP1A_STRT_Pos) <=
188 ((reg & FLASH_WRP1AR_WRP1A_END) >> FLASH_WRP1AR_WRP1A_END_Pos))
189 {
190 MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END), FLASH_WRP1AR_WRP1A_STRT);
191 }
192
193 /* Disable WRP zone 2 of 1st bank if needed */
194 reg = FLASH->WRP1BR;
195 if (((reg & FLASH_WRP1BR_WRP1B_STRT) >> FLASH_WRP1BR_WRP1B_STRT_Pos) <=
196 ((reg & FLASH_WRP1BR_WRP1B_END) >> FLASH_WRP1BR_WRP1B_END_Pos))
197 {
198 MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END), FLASH_WRP1BR_WRP1B_STRT);
199 }
200
201 /* Disable WRP zone 1 of 2nd bank if needed */
202 reg = FLASH->WRP2AR;
203 if (((reg & FLASH_WRP2AR_WRP2A_STRT) >> FLASH_WRP2AR_WRP2A_STRT_Pos) <=
204 ((reg & FLASH_WRP2AR_WRP2A_END) >> FLASH_WRP2AR_WRP2A_END_Pos))
205 {
206 MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END), FLASH_WRP2AR_WRP2A_STRT);
207 }
208
209 /* Disable WRP zone 2 of 2nd bank if needed */
210 reg = FLASH->WRP2BR;
211 if (((reg & FLASH_WRP2BR_WRP2B_STRT) >> FLASH_WRP2BR_WRP2B_STRT_Pos) <=
212 ((reg & FLASH_WRP2BR_WRP2B_END) >> FLASH_WRP2BR_WRP2B_END_Pos))
213 {
214 MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END), FLASH_WRP2BR_WRP2B_STRT);
215 }
216
217 /* Modify the DBANK user option byte */
218 MODIFY_REG(FLASH->OPTR, FLASH_OPTR_DBANK, DBankConfig);
219
220 /* Set OPTSTRT Bit */
221 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
222
223 /* Wait for last operation to be completed */
224 /* 8 is the number of required instruction cycles for the below loop statement (timeout expressed in ms) */
225 count = FLASH_TIMEOUT_VALUE * (SystemCoreClock / 8U / 1000U);
226 do
227 {
228 if (count == 0U)
229 {
230 break;
231 }
232 count--;
233 } while (__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET);
234
235 /* If the option byte program operation is completed, disable the OPTSTRT Bit */
236 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
237
238 /* Set the bit to force the option byte reloading */
239 SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH);
240 }
241 }
242
243 /* Process Unlocked */
244 __HAL_UNLOCK(&pFlash);
245
246 return status;
247 }
248 #endif
249
250 /**
251 * @}
252 */
253
254 /**
255 * @}
256 */
257 #endif /* HAL_FLASH_MODULE_ENABLED */
258
259
260
261 /**
262 * @}
263 */
264
265 /**
266 * @}
267 */
268
269
270 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
271
272
273
