1 /** 2 ****************************************************************************** 3 * @file stm32u5xx_hal_dac.h 4 * @author MCD Application Team 5 * @brief Header file of DAC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2021 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32U5xx_HAL_DAC_H 21 #define STM32U5xx_HAL_DAC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /** @addtogroup STM32U5xx_HAL_Driver 28 * @{ 29 */ 30 31 /* Includes ------------------------------------------------------------------*/ 32 #include "stm32u5xx_hal_def.h" 33 34 #if defined(DAC1) 35 36 /** @addtogroup DAC 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 42 /** @defgroup DAC_Exported_Types DAC Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief HAL State structures definition 48 */ 49 typedef enum 50 { 51 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ 52 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ 53 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ 54 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ 55 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ 56 57 } HAL_DAC_StateTypeDef; 58 59 /** 60 * @brief DAC handle Structure definition 61 */ 62 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 63 typedef struct __DAC_HandleTypeDef 64 #else 65 typedef struct 66 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 67 { 68 DAC_TypeDef *Instance; /*!< Register base address */ 69 70 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ 71 72 HAL_LockTypeDef Lock; /*!< DAC locking object */ 73 74 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ 75 76 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ 77 78 __IO uint32_t ErrorCode; /*!< DAC Error code */ 79 80 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 81 void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 82 void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 83 void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 84 void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 85 86 void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 87 void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 88 void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 89 void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 90 91 92 void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac); 93 void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac); 94 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 95 96 } DAC_HandleTypeDef; 97 98 /** 99 * @brief DAC Configuration sample and hold Channel structure definition 100 */ 101 typedef struct 102 { 103 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. 104 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 105 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 106 107 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel 108 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 109 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 110 111 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel 112 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 113 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ 114 } DAC_SampleAndHoldConfTypeDef; 115 116 /** 117 * @brief DAC Configuration regular Channel structure definition 118 */ 119 typedef struct 120 { 121 uint32_t DAC_HighFrequency; /*!< Specifies the frequency interface mode 122 This parameter can be a value of @ref DAC_HighFrequency */ 123 124 uint32_t DAC_AutonomousMode; /*!< Specifies whether the autonomous mode state 125 This parameter can be a value of @ref DAC_AutonomousMode 126 Note: HAL_DACEx_SetConfigAutonomousMode() API allows to select and update 127 the autonomous mode state afterwards */ 128 129 FunctionalState DAC_DMADoubleDataMode; /*!< Specifies if DMA double data mode should be enabled or not for the selected channel. 130 This parameter can be ENABLE or DISABLE */ 131 132 FunctionalState DAC_SignedFormat; /*!< Specifies if signed format should be used or not for the selected channel. 133 This parameter can be ENABLE or DISABLE */ 134 135 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. 136 This parameter can be a value of @ref DAC_SampleAndHold */ 137 138 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. 139 This parameter can be a value of @ref DAC_trigger_selection */ 140 141 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. 142 This parameter can be a value of @ref DAC_output_buffer */ 143 144 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral. 145 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ 146 147 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode 148 This parameter must be a value of @ref DAC_UserTrimming 149 DAC_UserTrimming is either factory or user trimming */ 150 151 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value 152 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. 153 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 154 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ 155 } DAC_ChannelConfTypeDef; 156 157 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 158 /** 159 * @brief HAL DAC Callback ID enumeration definition 160 */ 161 typedef enum 162 { 163 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ 164 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ 165 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ 166 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ 167 168 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ 169 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ 170 HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ 171 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ 172 173 HAL_DAC_MSPINIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ 174 HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ 175 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ 176 } HAL_DAC_CallbackIDTypeDef; 177 178 /** 179 * @brief HAL DAC Callback pointer definition 180 */ 181 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); 182 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 183 184 /** 185 * @} 186 */ 187 188 /* Exported constants --------------------------------------------------------*/ 189 190 /** @defgroup DAC_Exported_Constants DAC Exported Constants 191 * @{ 192 */ 193 194 /** @defgroup DAC_Error_Code DAC Error Code 195 * @{ 196 */ 197 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ 198 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ 199 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ 200 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ 201 #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ 202 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 203 #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ 204 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 205 206 /** 207 * @} 208 */ 209 210 /** @defgroup DAC_trigger_selection DAC trigger selection 211 * @{ 212 */ 213 #define DAC_TRIGGER_NONE 0x00000000UL /*!< conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */ 214 #define DAC_TRIGGER_SOFTWARE ( DAC_CR_TEN1) /*!< conversion started by software trigger for DAC channel */ 215 #define DAC_TRIGGER_T1_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel. */ 216 #define DAC_TRIGGER_T2_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 217 #define DAC_TRIGGER_T4_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ 218 #define DAC_TRIGGER_T5_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ 219 #define DAC_TRIGGER_T6_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 220 #define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 221 #define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 222 #define DAC_TRIGGER_T15_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TEN1) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */ 223 #define DAC_TRIGGER_LPTIM1_CH1 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< LPTIM1 CH1 selected as external conversion trigger for DAC channel */ 224 #define DAC_TRIGGER_LPTIM3_CH1 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< LPTIM3 CH1 selected as external conversion trigger for DAC channel */ 225 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 226 227 /** 228 * @} 229 */ 230 231 /** @defgroup DAC_output_buffer DAC output buffer 232 * @{ 233 */ 234 #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U 235 #define DAC_OUTPUTBUFFER_DISABLE (DAC_MCR_MODE1_1) 236 237 /** 238 * @} 239 */ 240 241 /** @defgroup DAC_Channel_selection DAC Channel selection 242 * @{ 243 */ 244 #define DAC_CHANNEL_1 0x00000000U 245 246 #define DAC_CHANNEL_2 0x00000010U 247 248 /** 249 * @} 250 */ 251 252 /** @defgroup DAC_data_alignment DAC data alignment 253 * @{ 254 */ 255 #define DAC_ALIGN_12B_R 0x00000000U 256 #define DAC_ALIGN_12B_L 0x00000004U 257 #define DAC_ALIGN_8B_R 0x00000008U 258 259 /** 260 * @} 261 */ 262 263 /** @defgroup DAC_flags_definition DAC flags definition 264 * @{ 265 */ 266 #define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) 267 268 #define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) 269 270 #define DAC_FLAG_DAC1RDY (DAC_SR_DAC1RDY) 271 272 #define DAC_FLAG_DAC2RDY (DAC_SR_DAC2RDY) 273 274 275 /** 276 * @} 277 */ 278 279 /** @defgroup DAC_IT_definition DAC IT definition 280 * @{ 281 */ 282 #define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1) 283 284 #define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2) 285 286 287 /** 288 * @} 289 */ 290 291 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral 292 * @{ 293 */ 294 #define DAC_CHIPCONNECT_EXTERNAL (1UL << 0) 295 #define DAC_CHIPCONNECT_INTERNAL (1UL << 1) 296 #define DAC_CHIPCONNECT_BOTH (1UL << 2) 297 298 /** 299 * @} 300 */ 301 302 /** @defgroup DAC_UserTrimming DAC User Trimming 303 * @{ 304 */ 305 #define DAC_TRIMMING_FACTORY (0x00000000UL) /*!< Factory trimming */ 306 #define DAC_TRIMMING_USER (0x00000001UL) /*!< User trimming */ 307 /** 308 * @} 309 */ 310 311 /** @defgroup DAC_SampleAndHold DAC power mode 312 * @{ 313 */ 314 #define DAC_SAMPLEANDHOLD_DISABLE (0x00000000UL) 315 #define DAC_SAMPLEANDHOLD_ENABLE (DAC_MCR_MODE1_2) 316 317 /** 318 * @} 319 */ 320 /** @defgroup DAC_AutonomousMode DAC Autonomous Mode 321 * @brief DAC Autonomous mode 322 * @{ 323 */ 324 #define DAC_AUTONOMOUS_MODE_DISABLE 0x00000000U /*!< Autonomous mode disable */ 325 #define DAC_AUTONOMOUS_MODE_ENABLE DAC_AUTOCR_AUTOMODE /*!< Autonomous mode enable */ 326 /** 327 * @} 328 */ 329 330 /** @defgroup DAC_Trigger_Stop_mode DAC Trigger Stop Mode 331 * @brief DAC Trigger stop mode 332 * @{ 333 */ 334 #define DAC_TRIGGER_STOP_LPTIM1_CH1 DAC_TRIGGER_LPTIM1_CH1 /*!< LPTIM1 output selected as DAC trigger in stop mode */ 335 #define DAC_TRIGGER_STOP_LPTIM3_CH1 DAC_TRIGGER_LPTIM3_CH1 /*!< LPTIM3 output selected as DAC trigger in stop mode */ 336 #define DAC_TRIGGER_STOP_EXT_IT9 DAC_TRIGGER_EXT_IT9 /*!< EXTI line 9 selected as DAC trigger in stop mode */ 337 /** 338 * @} 339 */ 340 341 /** @defgroup DAC_HighFrequency DAC high frequency interface mode 342 * @{ 343 */ 344 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE 0x00000000UL /*!< High frequency interface mode disabled */ 345 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ (DAC_MCR_HFSEL_0) /*!< High frequency interface mode compatible to AHB>80MHz enabled */ 346 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_160MHZ (DAC_MCR_HFSEL_1) /*!< High frequency interface mode compatible to AHB>160MHz enabled */ 347 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC 0x00000002UL /*!< High frequency interface mode automatic */ 348 349 /** 350 * @} 351 */ 352 353 /** 354 * @} 355 */ 356 357 /* Delay for DAC channel voltage settling time from DAC channel startup */ 358 /* (transition from disable to enable). */ 359 /* Note: DAC channel startup time depends on board application environment: */ 360 /* impedance connected to DAC channel output. */ 361 /* The delay below is specified under conditions: */ 362 /* - voltage maximum transition (lowest to highest value) */ 363 /* - until voltage reaches final value +-1LSB */ 364 /* - DAC channel output buffer enabled */ 365 /* - load impedance of 5kOhm (min), 50pF (max) */ 366 /* Literal set to maximum value (refer to device datasheet, */ 367 /* parameter "tWAKEUP"). */ 368 /* Unit: us */ 369 #define DAC_DELAY_STARTUP_US (15UL) /*!< Delay for DAC channel voltage settling time from DAC channel startup (transition from disable to enable) */ 370 371 /* Exported macro ------------------------------------------------------------*/ 372 373 /** @defgroup DAC_Exported_Macros DAC Exported Macros 374 * @{ 375 */ 376 377 /** @brief Reset DAC handle state. 378 * @param __HANDLE__ specifies the DAC handle. 379 * @retval None 380 */ 381 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 382 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ 383 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ 384 (__HANDLE__)->MspInitCallback = NULL; \ 385 (__HANDLE__)->MspDeInitCallback = NULL; \ 386 } while(0) 387 #else 388 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 389 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 390 391 /** @brief Enable the DAC channel. 392 * @param __HANDLE__ specifies the DAC handle. 393 * @param __DAC_Channel__ specifies the DAC channel 394 * @retval None 395 */ 396 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ 397 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 398 399 /** @brief Disable the DAC channel. 400 * @param __HANDLE__ specifies the DAC handle 401 * @param __DAC_Channel__ specifies the DAC channel. 402 * @retval None 403 */ 404 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ 405 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 406 407 /** @brief Set DHR12R1 alignment. 408 * @param __ALIGNMENT__ specifies the DAC alignment 409 * @retval None 410 */ 411 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008UL + (__ALIGNMENT__)) 412 413 414 /** @brief Set DHR12R2 alignment. 415 * @param __ALIGNMENT__ specifies the DAC alignment 416 * @retval None 417 */ 418 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014UL + (__ALIGNMENT__)) 419 420 421 /** @brief Set DHR12RD alignment. 422 * @param __ALIGNMENT__ specifies the DAC alignment 423 * @retval None 424 */ 425 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020UL + (__ALIGNMENT__)) 426 427 /** @brief Enable the DAC interrupt. 428 * @param __HANDLE__ specifies the DAC handle 429 * @param __INTERRUPT__ specifies the DAC interrupt. 430 * This parameter can be any combination of the following values: 431 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 432 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt 433 * @retval None 434 */ 435 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 436 437 /** @brief Disable the DAC interrupt. 438 * @param __HANDLE__ specifies the DAC handle 439 * @param __INTERRUPT__ specifies the DAC interrupt. 440 * This parameter can be any combination of the following values: 441 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 442 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt 443 * @retval None 444 */ 445 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 446 447 /** @brief Check whether the specified DAC interrupt source is enabled or not. 448 * @param __HANDLE__ DAC handle 449 * @param __INTERRUPT__ DAC interrupt source to check 450 * This parameter can be any combination of the following values: 451 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 452 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt 453 * @retval State of interruption (SET or RESET) 454 */ 455 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR\ 456 & (__INTERRUPT__)) == (__INTERRUPT__)) 457 458 /** @brief Get the selected DAC's flag status. 459 * @param __HANDLE__ specifies the DAC handle. 460 * @param __FLAG__ specifies the DAC flag to get. 461 * This parameter can be any combination of the following values: 462 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag 463 * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag 464 * @arg DAC_FLAG_DAC1RDY DAC channel 1 ready status flag 465 * @arg DAC_FLAG_DAC2RDY DAC channel 2 ready status flag 466 * @retval None 467 */ 468 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 469 470 /** @brief Clear the DAC's flag. 471 * @param __HANDLE__ specifies the DAC handle. 472 * @param __FLAG__ specifies the DAC flag to clear. 473 * This parameter can be any combination of the following values: 474 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag 475 * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag 476 * @retval None 477 */ 478 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 479 480 /** 481 * @} 482 */ 483 484 /* Private macro -------------------------------------------------------------*/ 485 486 /** @defgroup DAC_Private_Macros DAC Private Macros 487 * @{ 488 */ 489 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 490 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 491 492 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ 493 ((CHANNEL) == DAC_CHANNEL_2)) 494 495 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 496 ((ALIGN) == DAC_ALIGN_12B_L) || \ 497 ((ALIGN) == DAC_ALIGN_8B_R)) 498 499 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0UL) 500 501 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FFUL) 502 503 /** 504 * @} 505 */ 506 507 /* Include DAC HAL Extended module */ 508 #include "stm32u5xx_hal_dac_ex.h" 509 510 /* Exported functions --------------------------------------------------------*/ 511 512 /** @addtogroup DAC_Exported_Functions 513 * @{ 514 */ 515 516 /** @addtogroup DAC_Exported_Functions_Group1 517 * @{ 518 */ 519 /* Initialization and de-initialization functions *****************************/ 520 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac); 521 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac); 522 void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac); 523 void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac); 524 525 /** 526 * @} 527 */ 528 529 /** @addtogroup DAC_Exported_Functions_Group2 530 * @{ 531 */ 532 /* IO operation functions *****************************************************/ 533 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel); 534 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel); 535 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length, 536 uint32_t Alignment); 537 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel); 538 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac); 539 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); 540 541 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac); 542 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac); 543 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); 544 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); 545 546 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 547 /* DAC callback registering/unregistering */ 548 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, 549 pDAC_CallbackTypeDef pCallback); 550 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID); 551 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 552 553 /** 554 * @} 555 */ 556 557 /** @addtogroup DAC_Exported_Functions_Group3 558 * @{ 559 */ 560 /* Peripheral Control functions ***********************************************/ 561 uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel); 562 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, 563 const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel); 564 /** 565 * @} 566 */ 567 568 /** @addtogroup DAC_Exported_Functions_Group4 569 * @{ 570 */ 571 /* Peripheral State and Error functions ***************************************/ 572 HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac); 573 uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac); 574 575 /** 576 * @} 577 */ 578 579 /** 580 * @} 581 */ 582 583 /** @defgroup DAC_Private_Functions DAC Private Functions 584 * @{ 585 */ 586 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma); 587 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma); 588 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); 589 /** 590 * @} 591 */ 592 593 /** 594 * @} 595 */ 596 597 #endif /* DAC1 */ 598 599 /** 600 * @} 601 */ 602 603 #ifdef __cplusplus 604 } 605 #endif 606 607 608 #endif /* STM32U5xx_HAL_DAC_H */ 609
