1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_dac.h 4 * @author MCD Application Team 5 * @brief Header file of DAC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7xx_HAL_DAC_H 21 #define STM32H7xx_HAL_DAC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /** @addtogroup STM32H7xx_HAL_Driver 28 * @{ 29 */ 30 31 /* Includes ------------------------------------------------------------------*/ 32 #include "stm32h7xx_hal_def.h" 33 34 #if defined(DAC1) || defined(DAC2) 35 36 /** @addtogroup DAC 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 42 /** @defgroup DAC_Exported_Types DAC Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief HAL State structures definition 48 */ 49 typedef enum 50 { 51 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ 52 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ 53 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ 54 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ 55 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ 56 57 } HAL_DAC_StateTypeDef; 58 59 /** 60 * @brief DAC handle Structure definition 61 */ 62 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 63 typedef struct __DAC_HandleTypeDef 64 #else 65 typedef struct 66 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 67 { 68 DAC_TypeDef *Instance; /*!< Register base address */ 69 70 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ 71 72 HAL_LockTypeDef Lock; /*!< DAC locking object */ 73 74 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ 75 76 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ 77 78 __IO uint32_t ErrorCode; /*!< DAC Error code */ 79 80 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 81 void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 82 void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 83 void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 84 void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 85 86 void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 87 void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 88 void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 89 void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 90 91 92 void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac); 93 void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac); 94 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 95 96 } DAC_HandleTypeDef; 97 98 /** 99 * @brief DAC Configuration sample and hold Channel structure definition 100 */ 101 typedef struct 102 { 103 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. 104 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 105 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 106 107 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel 108 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 109 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 110 111 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel 112 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 113 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ 114 } DAC_SampleAndHoldConfTypeDef; 115 116 /** 117 * @brief DAC Configuration regular Channel structure definition 118 */ 119 typedef struct 120 { 121 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. 122 This parameter can be a value of @ref DAC_SampleAndHold */ 123 124 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. 125 This parameter can be a value of @ref DAC_trigger_selection */ 126 127 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. 128 This parameter can be a value of @ref DAC_output_buffer */ 129 130 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral. 131 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ 132 133 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode 134 This parameter must be a value of @ref DAC_UserTrimming 135 DAC_UserTrimming is either factory or user trimming */ 136 137 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value 138 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. 139 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 140 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ 141 } DAC_ChannelConfTypeDef; 142 143 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 144 /** 145 * @brief HAL DAC Callback ID enumeration definition 146 */ 147 typedef enum 148 { 149 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ 150 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ 151 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ 152 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ 153 154 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ 155 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ 156 HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ 157 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ 158 159 HAL_DAC_MSPINIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ 160 HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ 161 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ 162 } HAL_DAC_CallbackIDTypeDef; 163 164 /** 165 * @brief HAL DAC Callback pointer definition 166 */ 167 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); 168 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 169 170 /** 171 * @} 172 */ 173 174 /* Exported constants --------------------------------------------------------*/ 175 176 /** @defgroup DAC_Exported_Constants DAC Exported Constants 177 * @{ 178 */ 179 180 /** @defgroup DAC_Error_Code DAC Error Code 181 * @{ 182 */ 183 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ 184 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ 185 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ 186 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ 187 #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ 188 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 189 #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ 190 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 191 192 /** 193 * @} 194 */ 195 196 /** @defgroup DAC_trigger_selection DAC trigger selection 197 * @{ 198 */ 199 #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */ 200 #define DAC_TRIGGER_SOFTWARE ( DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ 201 #define DAC_TRIGGER_T1_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel */ 202 #define DAC_TRIGGER_T2_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 203 #define DAC_TRIGGER_T4_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ 204 #define DAC_TRIGGER_T5_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ 205 #define DAC_TRIGGER_T6_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 206 #define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 207 #define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 208 #define DAC_TRIGGER_T15_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TEN1) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */ 209 #if defined(HRTIM1) 210 #define DAC_TRIGGER_HR1_TRGO1 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< HR1 TRGO1 selected as external conversion trigger for DAC channel */ 211 #define DAC_TRIGGER_HR1_TRGO2 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< HR1 TRGO2 selected as external conversion trigger for DAC channel */ 212 #endif /* HRTIM12 */ 213 #define DAC_TRIGGER_LPTIM1_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< LPTIM1 OUT TRGO selected as external conversion trigger for DAC channel */ 214 #define DAC_TRIGGER_LPTIM2_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< LPTIM2 OUT TRGO selected as external conversion trigger for DAC channel */ 215 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 216 #if defined(TIM23) 217 #define DAC_TRIGGER_T23_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM23 TRGO selected as external conversion trigger for DAC channel */ 218 #endif /* TIM23 */ 219 #if defined(TIM24) 220 #define DAC_TRIGGER_T24_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM24 TRGO selected as external conversion trigger for DAC channel */ 221 #endif /* TIM24 */ 222 #if defined(DAC2) 223 #define DAC_TRIGGER_LPTIM3_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< LPTIM3 OUT TRGO selected as external conversion trigger for DAC channel */ 224 #endif /* DAC2 */ 225 226 /** 227 * @} 228 */ 229 230 /** @defgroup DAC_output_buffer DAC output buffer 231 * @{ 232 */ 233 #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U 234 #define DAC_OUTPUTBUFFER_DISABLE (DAC_MCR_MODE1_1) 235 236 /** 237 * @} 238 */ 239 240 /** @defgroup DAC_Channel_selection DAC Channel selection 241 * @{ 242 */ 243 #define DAC_CHANNEL_1 0x00000000U 244 245 #define DAC_CHANNEL_2 0x00000010U 246 247 /** 248 * @} 249 */ 250 251 /** @defgroup DAC_data_alignment DAC data alignment 252 * @{ 253 */ 254 #define DAC_ALIGN_12B_R 0x00000000U 255 #define DAC_ALIGN_12B_L 0x00000004U 256 #define DAC_ALIGN_8B_R 0x00000008U 257 258 /** 259 * @} 260 */ 261 262 /** @defgroup DAC_flags_definition DAC flags definition 263 * @{ 264 */ 265 #define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) 266 267 #define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) 268 269 270 /** 271 * @} 272 */ 273 274 /** @defgroup DAC_IT_definition DAC IT definition 275 * @{ 276 */ 277 #define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1) 278 279 #define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2) 280 281 282 /** 283 * @} 284 */ 285 286 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral 287 * @{ 288 */ 289 #define DAC_CHIPCONNECT_EXTERNAL (1UL << 0) /*!< DAC channel output is connected to an external pin.*/ 290 #define DAC_CHIPCONNECT_INTERNAL (1UL << 1) /*!< DAC channel output is connected to on-chip peripherals (via 291 internal paths) and to an external pin. */ 292 #define DAC_CHIPCONNECT_BOTH (1UL << 2) /*!< DAC channel output is connected to on-chip peripherals (via 293 internal paths) and to an external pin. 294 Note: this connection is not available in mode normal 295 with buffer disabled. */ 296 /** 297 * @} 298 */ 299 300 /** @defgroup DAC_UserTrimming DAC User Trimming 301 * @{ 302 */ 303 #define DAC_TRIMMING_FACTORY (0x00000000UL) /*!< Factory trimming */ 304 #define DAC_TRIMMING_USER (0x00000001UL) /*!< User trimming */ 305 /** 306 * @} 307 */ 308 309 /** @defgroup DAC_SampleAndHold DAC power mode 310 * @{ 311 */ 312 #define DAC_SAMPLEANDHOLD_DISABLE (0x00000000UL) 313 #define DAC_SAMPLEANDHOLD_ENABLE (DAC_MCR_MODE1_2) 314 315 /** 316 * @} 317 */ 318 /** 319 * @} 320 */ 321 322 /* Exported macro ------------------------------------------------------------*/ 323 324 /** @defgroup DAC_Exported_Macros DAC Exported Macros 325 * @{ 326 */ 327 328 /** @brief Reset DAC handle state. 329 * @param __HANDLE__ specifies the DAC handle. 330 * @retval None 331 */ 332 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 333 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ 334 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ 335 (__HANDLE__)->MspInitCallback = NULL; \ 336 (__HANDLE__)->MspDeInitCallback = NULL; \ 337 } while(0) 338 #else 339 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 340 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 341 342 /** @brief Enable the DAC channel. 343 * @param __HANDLE__ specifies the DAC handle. 344 * @param __DAC_Channel__ specifies the DAC channel 345 * @retval None 346 */ 347 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ 348 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 349 350 /** @brief Disable the DAC channel. 351 * @param __HANDLE__ specifies the DAC handle 352 * @param __DAC_Channel__ specifies the DAC channel. 353 * @retval None 354 */ 355 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ 356 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 357 358 /** @brief Set DHR12R1 alignment. 359 * @param __ALIGNMENT__ specifies the DAC alignment 360 * @retval None 361 */ 362 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008UL + (__ALIGNMENT__)) 363 364 365 /** @brief Set DHR12R2 alignment. 366 * @param __ALIGNMENT__ specifies the DAC alignment 367 * @retval None 368 */ 369 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014UL + (__ALIGNMENT__)) 370 371 372 /** @brief Set DHR12RD alignment. 373 * @param __ALIGNMENT__ specifies the DAC alignment 374 * @retval None 375 */ 376 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020UL + (__ALIGNMENT__)) 377 378 /** @brief Enable the DAC interrupt. 379 * @param __HANDLE__ specifies the DAC handle 380 * @param __INTERRUPT__ specifies the DAC interrupt. 381 * This parameter can be any combination of the following values: 382 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 383 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt 384 * @retval None 385 */ 386 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 387 388 /** @brief Disable the DAC interrupt. 389 * @param __HANDLE__ specifies the DAC handle 390 * @param __INTERRUPT__ specifies the DAC interrupt. 391 * This parameter can be any combination of the following values: 392 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 393 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt 394 * @retval None 395 */ 396 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 397 398 /** @brief Check whether the specified DAC interrupt source is enabled or not. 399 * @param __HANDLE__ DAC handle 400 * @param __INTERRUPT__ DAC interrupt source to check 401 * This parameter can be any combination of the following values: 402 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 403 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt 404 * @retval State of interruption (SET or RESET) 405 */ 406 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR\ 407 & (__INTERRUPT__)) == (__INTERRUPT__)) 408 409 /** @brief Get the selected DAC's flag status. 410 * @param __HANDLE__ specifies the DAC handle. 411 * @param __FLAG__ specifies the DAC flag to get. 412 * This parameter can be any combination of the following values: 413 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag 414 * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag 415 * @retval None 416 */ 417 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 418 419 /** @brief Clear the DAC's flag. 420 * @param __HANDLE__ specifies the DAC handle. 421 * @param __FLAG__ specifies the DAC flag to clear. 422 * This parameter can be any combination of the following values: 423 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag 424 * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag 425 * @retval None 426 */ 427 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 428 429 /** 430 * @} 431 */ 432 433 /* Private macro -------------------------------------------------------------*/ 434 435 /** @defgroup DAC_Private_Macros DAC Private Macros 436 * @{ 437 */ 438 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 439 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 440 441 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ 442 ((CHANNEL) == DAC_CHANNEL_2)) 443 444 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 445 ((ALIGN) == DAC_ALIGN_12B_L) || \ 446 ((ALIGN) == DAC_ALIGN_8B_R)) 447 448 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0UL) 449 450 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FFUL) 451 452 /** 453 * @} 454 */ 455 456 /* Include DAC HAL Extended module */ 457 #include "stm32h7xx_hal_dac_ex.h" 458 459 /* Exported functions --------------------------------------------------------*/ 460 461 /** @addtogroup DAC_Exported_Functions 462 * @{ 463 */ 464 465 /** @addtogroup DAC_Exported_Functions_Group1 466 * @{ 467 */ 468 /* Initialization and de-initialization functions *****************************/ 469 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac); 470 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac); 471 void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac); 472 void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac); 473 474 /** 475 * @} 476 */ 477 478 /** @addtogroup DAC_Exported_Functions_Group2 479 * @{ 480 */ 481 /* IO operation functions *****************************************************/ 482 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel); 483 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel); 484 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length, 485 uint32_t Alignment); 486 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel); 487 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac); 488 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); 489 490 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac); 491 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac); 492 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); 493 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); 494 495 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 496 /* DAC callback registering/unregistering */ 497 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, 498 pDAC_CallbackTypeDef pCallback); 499 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID); 500 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 501 502 /** 503 * @} 504 */ 505 506 /** @addtogroup DAC_Exported_Functions_Group3 507 * @{ 508 */ 509 /* Peripheral Control functions ***********************************************/ 510 uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel); 511 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, 512 const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel); 513 /** 514 * @} 515 */ 516 517 /** @addtogroup DAC_Exported_Functions_Group4 518 * @{ 519 */ 520 /* Peripheral State and Error functions ***************************************/ 521 HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac); 522 uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac); 523 524 /** 525 * @} 526 */ 527 528 /** 529 * @} 530 */ 531 532 /** @defgroup DAC_Private_Functions DAC Private Functions 533 * @{ 534 */ 535 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma); 536 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma); 537 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); 538 /** 539 * @} 540 */ 541 542 /** 543 * @} 544 */ 545 546 #endif /* DAC1 || DAC2 */ 547 548 /** 549 * @} 550 */ 551 552 #ifdef __cplusplus 553 } 554 #endif 555 556 557 #endif /* STM32H7xx_HAL_DAC_H */ 558
