1 /***************************************************************************//**
2 * \file cy_trigmux.c
3 * \version 1.70
4 *
5 * \brief Trigger mux API.
6 *
7 ********************************************************************************
8 * \copyright
9 * Copyright 2016-2020 Cypress Semiconductor Corporation
10 * SPDX-License-Identifier: Apache-2.0
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 *     http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *******************************************************************************/
24 
25 #include "cy_device.h"
26 
27 #if defined (CY_IP_MXSPERI) || defined (CY_IP_MXPERI)
28 
29 #include "cy_trigmux.h"
30 
31 CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 14.3', 4, \
32 'CY_PERI_V1 is not available for CAT1B devices.')
33 
34 
35 /*******************************************************************************
36 * Function Name: Cy_TrigMux_Connect
37 ****************************************************************************//**
38 *
39 * Connects an input trigger source and output trigger.
40 *
41 * \param inTrig
42 * An input selection for the trigger mux.
43 * - Bit 30 should be cleared.
44 * - Bit 12 should be cleared.
45 * - Bits 11:8 represent the trigger group selection.
46 * - Bits 7:0 select the input trigger signal for the specified trigger multiplexer.
47 *
48 * \param outTrig
49 * The output of the trigger mux. This refers to the consumer of the trigger mux.
50 * - Bit 30 should be set.
51 * - Bit 12 should be cleared.
52 * - Bits 11:8 represent the trigger group selection.<br>
53 *  For PERI_ver1:
54 * - Bits 6:0 select the output trigger number in the trigger group.<br>
55 *  For PERI_ver2:
56 * - Bits 7:0 select the output trigger number in the trigger group.
57 *
58 * \param invert
59 * - true: The output trigger is inverted.
60 * - false: The output trigger is not inverted.
61 *
62 * \param trigType The trigger signal type.
63 * - TRIGGER_TYPE_EDGE: The trigger is synchronized to the consumer blocks clock
64 *   and a two-cycle pulse is generated on this clock.
65 * - TRIGGER_TYPE_LEVEL: The trigger is a simple level output.
66 *
67 * \return status:
68 * - CY_TRIGMUX_SUCCESS: The connection is made successfully.
69 * - CY_TRIGMUX_BAD_PARAM: Some parameter is invalid.
70 *
71 * \funcusage
72 * \snippet trigmux/snippet/main.c snippet_Cy_TrigMux_Connect
73 *
74 *******************************************************************************/
Cy_TrigMux_Connect(uint32_t inTrig,uint32_t outTrig,bool invert,en_trig_type_t trigType)75 cy_en_trigmux_status_t Cy_TrigMux_Connect(uint32_t inTrig, uint32_t outTrig, bool invert, en_trig_type_t trigType)
76 {
77     cy_en_trigmux_status_t retVal = CY_TRIGMUX_BAD_PARAM;
78     CY_ASSERT_L3(CY_TRIGMUX_IS_TRIGTYPE_VALID(trigType));
79     CY_ASSERT_L2(CY_TRIGMUX_IS_INTRIG_VALID(inTrig));
80     CY_ASSERT_L2(CY_TRIGMUX_IS_OUTTRIG_VALID(outTrig));
81 
82     /* inTrig and outTrig should be in the same group */
83     if ((inTrig & PERI_TR_CMD_GROUP_SEL_Msk) == (outTrig & PERI_TR_CMD_GROUP_SEL_Msk))
84     {
85         uint32_t interruptState = Cy_SysLib_EnterCriticalSection();
86 
87 #if defined (CY_IP_MXSPERI) && (CY_IP_MXSPERI_INSTANCES == 2U)
88         if (0UL != (outTrig & PERI_INSTANCE_1_IDENT_Msk))
89         {
90             CY_TRIGMUX1_TR_CTL(outTrig) = (CY_TRIGMUX1_TR_CTL(outTrig) &
91                                       (uint32_t)~(PERI_TR_GR_TR_OUT_CTL_TR_SEL_Msk |
92                                                   PERI_TR_GR_TR_OUT_CTL_TR_INV_Msk |
93                                                   PERI_TR_GR_TR_OUT_CTL_TR_EDGE_Msk)) |
94                                         (_VAL2FLD(PERI_TR_GR_TR_OUT_CTL_TR_SEL, inTrig) |
95                                         _BOOL2FLD(PERI_TR_GR_TR_OUT_CTL_TR_INV, invert) |
96                                          _VAL2FLD(PERI_TR_GR_TR_OUT_CTL_TR_EDGE, trigType));
97 
98         }
99         else
100         {
101             CY_TRIGMUX_TR_CTL(outTrig) = (CY_TRIGMUX_TR_CTL(outTrig) &
102                                       (uint32_t)~(PERI_TR_GR_TR_OUT_CTL_TR_SEL_Msk |
103                                                   PERI_TR_GR_TR_OUT_CTL_TR_INV_Msk |
104                                                   PERI_TR_GR_TR_OUT_CTL_TR_EDGE_Msk)) |
105                                         (_VAL2FLD(PERI_TR_GR_TR_OUT_CTL_TR_SEL, inTrig) |
106                                         _BOOL2FLD(PERI_TR_GR_TR_OUT_CTL_TR_INV, invert) |
107                                          _VAL2FLD(PERI_TR_GR_TR_OUT_CTL_TR_EDGE, trigType));
108         }
109 #else
110 
111         CY_TRIGMUX_TR_CTL(outTrig) = (CY_TRIGMUX_TR_CTL(outTrig) &
112                                       (uint32_t)~(PERI_TR_GR_TR_OUT_CTL_TR_SEL_Msk |
113                                                   PERI_TR_GR_TR_OUT_CTL_TR_INV_Msk |
114                                                   PERI_TR_GR_TR_OUT_CTL_TR_EDGE_Msk)) |
115                                         (_VAL2FLD(PERI_TR_GR_TR_OUT_CTL_TR_SEL, inTrig) |
116                                         _BOOL2FLD(PERI_TR_GR_TR_OUT_CTL_TR_INV, invert) |
117                                          _VAL2FLD(PERI_TR_GR_TR_OUT_CTL_TR_EDGE, trigType));
118 #endif
119 
120         Cy_SysLib_ExitCriticalSection(interruptState);
121 
122         retVal = CY_TRIGMUX_SUCCESS;
123     }
124 
125     return retVal;
126 }
127 
128 
129 /*******************************************************************************
130 * Function Name: Cy_TrigMux_Select
131 ****************************************************************************//**
132 *
133 * Enables and configures the specified 1-to-1 trigger line. For PERI_ver2 only.
134 *
135 * \param outTrig
136 * The 1to1 trigger line.
137 * - Bit 30 should be set.
138 * - Bit 12 should be set.
139 * - Bits 11:8 represent the 1-to-1 trigger group selection.
140 * - Bits 7:0 select the trigger line number in the trigger group.
141 *
142 * \param invert
143 * - true: The trigger signal is inverted.
144 * - false: The trigger signal is not inverted.
145 *
146 * \param trigType The trigger signal type.
147 * - TRIGGER_TYPE_EDGE: The trigger is synchronized to the consumer blocks clock
148 *   and a two-cycle pulse is generated on this clock.
149 * - TRIGGER_TYPE_LEVEL: The trigger is a simple level output.
150 *
151 * \return status:
152 * - CY_TRIGMUX_SUCCESS: The selection is made successfully.
153 * - CY_TRIGMUX_BAD_PARAM: Some parameter is invalid.
154 *
155 * \funcusage
156 * \snippet trigmux/snippet/main.c snippet_Cy_TrigMux_Select
157 *
158 *******************************************************************************/
Cy_TrigMux_Select(uint32_t outTrig,bool invert,en_trig_type_t trigType)159 cy_en_trigmux_status_t Cy_TrigMux_Select(uint32_t outTrig, bool invert, en_trig_type_t trigType)
160 {
161     cy_en_trigmux_status_t retVal = CY_TRIGMUX_BAD_PARAM;
162 
163     CY_ASSERT_L3(CY_TRIGMUX_IS_TRIGTYPE_VALID(trigType));
164     CY_ASSERT_L2(CY_TRIGMUX_IS_ONETRIG_VALID(outTrig));
165 
166     if (CY_PERI_V1 == 0U) /* !mxperi_v1 */
167     {
168         uint32_t interruptState;
169 
170         interruptState = Cy_SysLib_EnterCriticalSection();
171 
172         CY_TRIGMUX_TR_CTL(outTrig) = (CY_TRIGMUX_TR_CTL(outTrig) &
173                           (uint32_t)~(PERI_TR_1TO1_GR_V2_TR_CTL_TR_INV_Msk |
174                                       PERI_TR_1TO1_GR_V2_TR_CTL_TR_EDGE_Msk)) |
175                                      (PERI_TR_1TO1_GR_V2_TR_CTL_TR_SEL_Msk      |
176                             _BOOL2FLD(PERI_TR_1TO1_GR_V2_TR_CTL_TR_INV, invert) |
177                              _VAL2FLD(PERI_TR_1TO1_GR_V2_TR_CTL_TR_EDGE, trigType));
178 
179         Cy_SysLib_ExitCriticalSection(interruptState);
180 
181         retVal = CY_TRIGMUX_SUCCESS;
182     }
183 
184     return retVal;
185 }
186 
187 
188 /*******************************************************************************
189 * Function Name: Cy_TrigMux_Deselect
190 ****************************************************************************//**
191 *
192 * Disables the specified 1-to-1 trigger line. For PERI_ver2 only.
193 *
194 * \param outTrig
195 * The 1to1 trigger line.
196 * - Bit 30 should be set.
197 * - Bit 12 should be set.
198 * - Bits 11:8 represent the 1-to-1 trigger group selection.
199 * - Bits 7:0 select the trigger line number in the trigger group.
200 *
201 * \return status:
202 * - CY_TRIGMUX_SUCCESS: The deselection is made successfully.
203 * - CY_TRIGMUX_BAD_PARAM: Some parameter is invalid.
204 *
205 * \funcusage
206 * \snippet trigmux/snippet/main.c snippet_Cy_TrigMux_Deselect
207 *
208 *******************************************************************************/
Cy_TrigMux_Deselect(uint32_t outTrig)209 cy_en_trigmux_status_t Cy_TrigMux_Deselect(uint32_t outTrig)
210 {
211     cy_en_trigmux_status_t retVal = CY_TRIGMUX_BAD_PARAM;
212 
213     CY_ASSERT_L2(CY_TRIGMUX_IS_ONETRIG_VALID(outTrig));
214 
215     if (CY_PERI_V1 == 0U) /* !mxperi_v1 */
216     {
217         uint32_t interruptState;
218 
219         interruptState = Cy_SysLib_EnterCriticalSection();
220 
221         CY_TRIGMUX_TR_CTL(outTrig) &= (uint32_t)~(PERI_TR_1TO1_GR_V2_TR_CTL_TR_SEL_Msk |
222                                                   PERI_TR_1TO1_GR_V2_TR_CTL_TR_INV_Msk |
223                                                   PERI_TR_1TO1_GR_V2_TR_CTL_TR_EDGE_Msk);
224 
225         Cy_SysLib_ExitCriticalSection(interruptState);
226 
227         retVal = CY_TRIGMUX_SUCCESS;
228     }
229 
230     return retVal;
231 }
232 
233 
234 /*******************************************************************************
235 * Function Name: Cy_TrigMux_SetDebugFreeze
236 ****************************************************************************//**
237 *
238 * Enables/disables the Debug Freeze feature for the specified trigger
239 * multiplexer or 1-to-1 trigger line. For PERI_ver2 only.
240 *
241 * \param outTrig
242 * The output of the trigger mux or dedicated 1-to-1 trigger line.
243 * - Bit 30 should be set.
244 * - For PERI_ver1 Bits 11:8 represent the trigger group selection.
245 * - For PERI_ver2 Bits 12:8 represent the trigger group selection.
246 * - Bits 7:0 select the output trigger number in the trigger group.
247 *
248 * \param enable
249 * - true: The Debug Freeze feature is enabled.
250 * - false: The Debug Freeze feature is disabled.
251 *
252 * \return status:
253 * - CY_TRIGMUX_SUCCESS: The operation is made successfully.
254 * - CY_TRIGMUX_BAD_PARAM: The outTrig parameter is invalid.
255 *
256 * \funcusage
257 * \snippet trigmux/snippet/main.c snippet_Cy_TrigMux_SetDebugFreeze
258 *
259 *******************************************************************************/
Cy_TrigMux_SetDebugFreeze(uint32_t outTrig,bool enable)260 cy_en_trigmux_status_t Cy_TrigMux_SetDebugFreeze(uint32_t outTrig, bool enable)
261 {
262     cy_en_trigmux_status_t retVal = CY_TRIGMUX_BAD_PARAM;
263 
264     if (CY_PERI_V1 == 0U) /* !mxperi_v1 */
265     {
266         uint32_t interruptState;
267 
268         interruptState = Cy_SysLib_EnterCriticalSection();
269 
270         if (enable)
271         {
272             CY_TRIGMUX_TR_CTL(outTrig) |= PERI_TR_GR_V2_TR_CTL_DBG_FREEZE_EN_Msk;
273         }
274         else
275         {
276             CY_TRIGMUX_TR_CTL(outTrig) &= (uint32_t)~PERI_TR_GR_V2_TR_CTL_DBG_FREEZE_EN_Msk;
277         }
278 
279         Cy_SysLib_ExitCriticalSection(interruptState);
280 
281         retVal = CY_TRIGMUX_SUCCESS;
282     }
283 
284     return retVal;
285 }
286 
287 
288 CY_MISRA_BLOCK_END('MISRA C-2012 Rule 14.3')
289 
290 #endif /* CY_IP_MXSPERI, CY_IP_MXPERI */
291 
292 /* [] END OF FILE */
293