1 /***************************************************************************//**
2 * \file cy_scb_uart.h
3 * \version 2.80
4 *
5 * Provides UART API declarations of the SCB driver.
6 *
7 ********************************************************************************
8 * \copyright
9 * Copyright 2016-2021 Cypress Semiconductor Corporation
10 * SPDX-License-Identifier: Apache-2.0
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *******************************************************************************/
24
25 /**
26 * \addtogroup group_scb_uart
27 * \{
28 * Driver API for UART
29 *
30 * The functions and other declarations used in this part of the driver are in
31 * cy_scb_uart.h. You can also include cy_pdl.h to get access
32 * to all functions and declarations in the PDL.
33 *
34 * The Universal Asynchronous Receiver/Transmitter (UART) protocol is an
35 * asynchronous serial interface protocol. UART communication is typically
36 * point-to-point. The UART interface consists of two signals:
37 * * TX: Transmitter output
38 * * RX: Receiver input
39 *
40 * Additionally, two side-band signals are used to implement flow control in
41 * UART. Note that the flow control applies only to TX functionality.
42 * * Clear to Send (CTS): This is an input signal to the transmitter.
43 * When active, it indicates that the slave is ready for the master to
44 * transmit data.
45 * * Ready to Send (RTS): This is an output signal from the receiver. When
46 * active, it indicates that the receiver is ready to receive data
47 *
48 * Features:
49 * * Supports UART protocol
50 * * Standard UART
51 * * Multi-processor mode
52 * * SmartCard (ISO7816) reader
53 * * IrDA
54 * * Data frame size programmable from 4 to 16 bits
55 * * Programmable number of STOP bits, which can be set in terms of half bit
56 * periods between 1 and 4
57 * * Parity support (odd and even parity)
58 * * Median filter on Rx input
59 * * Programmable oversampling
60 * * Start skipping
61 *
62 ********************************************************************************
63 * \section group_scb_uart_configuration Configuration Considerations
64 ********************************************************************************
65 * The UART driver configuration can be divided to number of sequential
66 * steps listed below:
67 * * \ref group_scb_uart_config
68 * * \ref group_scb_uart_pins
69 * * \ref group_scb_uart_clock
70 * * \ref group_scb_uart_data_rate
71 * * \ref group_scb_uart_intr
72 * * \ref group_scb_uart_enable
73 *
74 * \note
75 * UART driver is built on top of the SCB hardware block. The SCB5 instance is
76 * used as an example for all code snippets. Modify the code to match your
77 * design.
78 *
79 ********************************************************************************
80 * \subsection group_scb_uart_config Configure UART
81 ********************************************************************************
82 * To set up the UART driver, provide the configuration parameters in the
83 * \ref cy_stc_scb_uart_config_t structure. For example: provide uartMode,
84 * oversample, dataWidth, enableMsbFirst, parity, and stopBits. The other
85 * parameters are optional. To initialize the driver, call \ref Cy_SCB_UART_Init
86 * function providing a pointer to the populated \ref cy_stc_scb_uart_config_t
87 * structure and the allocated \ref cy_stc_scb_uart_context_t structure.
88 *
89 * \snippet scb/uart_snippet/main.c UART_CFG
90 *
91 ********************************************************************************
92 * \subsection group_scb_uart_pins Assign and Configure Pins
93 ********************************************************************************
94 * Only dedicated SCB pins can be used for UART operation. The HSIOM
95 * register must be configured to connect dedicated SCB UART pins to the
96 * SCB block. Also, the UART output pins must be configured in Strong Drive
97 * Input Off mode and UART input pins in Digital High-Z:
98 *
99 * \snippet scb/uart_snippet/main.c UART_CFG_PINS
100 *
101 ********************************************************************************
102 * \subsection group_scb_uart_clock Assign Clock Divider
103 ********************************************************************************
104 * A clock source must be connected to the SCB block to oversample input and
105 * output signals, in this document this clock will be referred as clk_scb.
106 * You must use one of available integer or fractional dividers. Use the
107 * \ref group_sysclk driver API to do this.
108 *
109 * \snippet scb/uart_snippet/main.c UART_CFG_ASSIGN_CLOCK
110 *
111 ********************************************************************************
112 * \subsection group_scb_uart_data_rate Configure Baud Rate
113 ********************************************************************************
114 * To get the UART to operate with the desired baud rate, the clk_scb frequency
115 * and the oversample must be configured. Use the \ref group_sysclk driver API
116 * to configure clk_scb frequency. Set the <em><b>oversample parameter
117 * in configuration structure</b></em> to define the number of the SCB clocks
118 * within one UART bit-time.
119 *
120 * \snippet scb/uart_snippet/main.c UART_CFG_DATA_RATE
121 *
122 * <b>Refer to the technical reference manual (TRM) section UART sub-section
123 * Clocking and Oversampling to get information about how to configure the UART to run with
124 * desired baud rate.</b>
125 *
126 ********************************************************************************
127 * \subsection group_scb_uart_intr Configure Interrupt
128 ********************************************************************************
129 * The interrupt is optional for the UART operation. To configure interrupt
130 * the \ref Cy_SCB_UART_Interrupt function must be called in the interrupt
131 * handler for the selected SCB instance. Also, this interrupt must be enabled
132 * in the NVIC.
133 * The interrupt must be configured when \ref group_scb_uart_hl will be used.
134 *
135 * \snippet scb/uart_snippet/main.c UART_INTR_A
136 * \snippet scb/uart_snippet/main.c UART_INTR_B
137 *
138 ********************************************************************************
139 * \subsection group_scb_uart_enable Enable UART
140 ********************************************************************************
141 * Finally, enable the UART operation by calling \ref Cy_SCB_UART_Enable.
142 *
143 * \snippet scb/uart_snippet/main.c UART_ENABLE
144 *
145 ********************************************************************************
146 * \section group_scb_uart_use_cases Common Use Cases
147 ********************************************************************************
148 * The UART API is divided into two categories: \ref group_scb_uart_low_level_functions
149 * and \ref group_scb_uart_high_level_functions. \n
150 * <em>Do not mix <b>High-Level</b> and <b>Low-Level</b> API because a Low-Level
151 * API can adversely affect the operation of a High-Level API.</em>
152 *
153 ********************************************************************************
154 * \subsection group_scb_uart_ll Low-Level API
155 ********************************************************************************
156 * The \ref group_scb_uart_low_level_functions functions allow
157 * interacting directly with the hardware and do not use \ref Cy_SCB_UART_Interrupt.
158 * These functions do not require context for operation. Thus, NULL can be
159 * passed for context parameter in \ref Cy_SCB_UART_Init and \ref Cy_SCB_UART_Disable
160 * instead of a pointer to the context structure.
161 *
162 * * To write data into the TX FIFO, use one of the provided functions:
163 * \ref Cy_SCB_UART_Put, \ref Cy_SCB_UART_PutArray,
164 * \ref Cy_SCB_UART_PutArrayBlocking or \ref Cy_SCB_UART_PutString.
165 * Note that putting data into the TX FIFO starts data transfer.
166 *
167 * * To read data from the RX FIFO, use one of the provided functions:
168 * \ref Cy_SCB_UART_Get, \ref Cy_SCB_UART_GetArray or
169 * \ref Cy_SCB_UART_GetArrayBlocking.
170 *
171 * * The statuses can be polled using: \ref Cy_SCB_UART_GetRxFifoStatus and
172 * \ref Cy_SCB_UART_GetTxFifoStatus.
173 * <em>The statuses are <b>W1C (Write 1 to Clear)</b> and after a status
174 * is set, it must be cleared.</em> Note that there are statuses evaluated as level.
175 * These statuses remain set until an event is true. Therefore, after the clear
176 * operation, the status is cleared but then it is restored (if event is still
177 * true).
178 * Also, the following functions can be used for polling as well
179 * \ref Cy_SCB_UART_IsTxComplete, \ref Cy_SCB_UART_GetNumInRxFifo and
180 * \ref Cy_SCB_UART_GetNumInTxFifo.
181 *
182 * \snippet scb/uart_snippet/main.c UART_TRANSMIT_DATA_LL
183 *
184 ********************************************************************************
185 * \subsection group_scb_uart_hl High-Level API
186 ********************************************************************************
187 * The \ref group_scb_uart_high_level_functions API use \ref Cy_SCB_UART_Interrupt
188 * to execute the transfer. Call \ref Cy_SCB_UART_Transmit to start transmission.
189 * Call \ref Cy_SCB_UART_Receive to start receive operation. After the
190 * operation is started the \ref Cy_SCB_UART_Interrupt handles the data
191 * transfer until its completion.
192 * Therefore \ref Cy_SCB_UART_Interrupt must be called inside the user
193 * interrupt handler to make the High-Level API work. To monitor status
194 * of transmit operation, use \ref Cy_SCB_UART_GetTransmitStatus and
195 * \ref Cy_SCB_UART_GetReceiveStatus to monitor receive status appropriately.
196 * Alternatively use \ref Cy_SCB_UART_RegisterCallback to register callback
197 * function to be notified about \ref group_scb_uart_macros_callback_events.
198 *
199 * <b>Receive Operation</b>
200 * \snippet scb/uart_snippet/main.c UART_RECEIVE_DATA_HL
201 *
202 * <b>Transmit Operation</b>
203 * \snippet scb/uart_snippet/main.c UART_TRANSMIT_DATA_HL
204 *
205 * There is also capability to insert a receive ring buffer that operates between
206 * the RX FIFO and the user buffer. The received data is copied into the ring
207 * buffer from the RX FIFO. This process runs in the background after the ring
208 * buffer operation is started by \ref Cy_SCB_UART_StartRingBuffer.
209 * When \ref Cy_SCB_UART_Receive is called, it first reads data from the ring
210 * buffer and then sets up an interrupt to receive more data if the required
211 * amount has not yet been read.
212 *
213 ********************************************************************************
214 * \section group_scb_uart_dma_trig DMA Trigger
215 ********************************************************************************
216 * The SCB provides TX and RX output trigger signals that can be routed to the
217 * DMA controller inputs. These signals are assigned based on the data availability
218 * in the TX and RX FIFOs appropriately.
219 *
220 * * The RX trigger signal is active while the number of data
221 * elements in the RX FIFO is greater than the value of RX FIFO level. Use
222 * function \ref Cy_SCB_SetRxFifoLevel or set configuration structure
223 * rxFifoTriggerLevel parameter to configure RX FIFO level value. \n
224 * <em>For example, the RX FIFO has 8 data elements and the RX FIFO level is 0.
225 * The RX trigger signal is active until DMA reads all data from
226 * the RX FIFO.</em>
227 *
228 * * The TX trigger signal is active while the number of data elements
229 * in the TX FIFO is less than the value of TX FIFO level. Use function
230 * \ref Cy_SCB_SetTxFifoLevel or set configuration structure txFifoTriggerLevel
231 * parameter to configure TX FIFO level value. \n
232 * <em>For example, the TX FIFO has 0 data elements (empty) and the TX FIFO level
233 * is 7. The TX trigger signal is active until DMA loads TX FIFO
234 * with 8 data elements (note that after the first TX load operation, the data
235 * element goes to the shift register and TX FIFO is empty).</em>
236 *
237 * To route SCB TX or RX trigger signals to DMA controller use \ref group_trigmux
238 * driver API.
239 *
240 * \note
241 * To properly handle DMA level request signal activation and de-activation from the SCB
242 * peripheral block the DMA Descriptor typically must be configured to re-trigger
243 * after 16 Clk_Slow cycles.
244 *
245 ********************************************************************************
246 * \section group_scb_uart_lp Low Power Support
247 ********************************************************************************
248 * The UART driver provides callback functions to handle power mode
249 * transition. The callback \ref Cy_SCB_UART_DeepSleepCallback must be called
250 * during execution of \ref Cy_SysPm_CpuEnterDeepSleep \ref Cy_SCB_UART_HibernateCallback
251 * must be called during execution of \ref Cy_SysPm_SystemEnterHibernate. To trigger the
252 * callback execution, the callback must be registered before calling the
253 * power mode transition function. Refer to \ref group_syspm driver for more
254 * information about power mode transitions and callback registration.
255 *
256 * The UART is disabled during Deep Sleep and Hibernate and stops driving
257 * the output pins. The state of the UART output pins TX and RTS is High-Z,
258 * which can cause unexpected behavior of the UART receiver due to possible
259 * glitches on these lines. These pins must be set to the inactive state before
260 * entering Deep Sleep or Hibernate mode.
261 * These pins must keep the inactive level (the same state
262 * when UART TX is enabled and does not transfer data) before entering Deep
263 * Sleep or Hibernate mode. To do that, write the GPIO data register of each pin
264 * to the inactive level for each output pin. Then configure High-Speed Input
265 * Output Multiplexer (HSIOM) of each pin to be controlled by the GPIO (use
266 * \ref group_gpio driver API). After exiting Deep Sleep mode the UART
267 * must be enabled and the pins configuration restored to return the
268 * UART control of the pins (after exiting Hibernate mode, the
269 * system initialization code does the same). Copy either or
270 * both \ref Cy_SCB_UART_DeepSleepCallback and \ref Cy_SCB_UART_HibernateCallback
271 * as appropriate, and make the changes described above inside the function.
272 * Alternately, external pull-up or pull-down resistors can be connected
273 * to the appropriate UART lines to keep them inactive during Deep-Sleep or
274 * Hibernate.
275 *
276 * \defgroup group_scb_uart_macros Macros
277 * \defgroup group_scb_uart_functions Functions
278 * \{
279 * \defgroup group_scb_uart_general_functions General
280 * \defgroup group_scb_uart_high_level_functions High-Level
281 * \defgroup group_scb_uart_low_level_functions Low-Level
282 * \defgroup group_scb_uart_interrupt_functions Interrupt
283 * \defgroup group_scb_uart_low_power_functions Low Power Callbacks
284 * \}
285 * \defgroup group_scb_uart_data_structures Data Structures
286 * \defgroup group_scb_uart_enums Enumerated Types
287 */
288
289 #if !defined(CY_SCB_UART_H)
290 #define CY_SCB_UART_H
291
292 #include "cy_device.h"
293
294 #if defined (CY_IP_MXSCB)
295
296 #include "cy_scb_common.h"
297
298 #if defined(__cplusplus)
299 extern "C" {
300 #endif
301
302 /***************************************
303 * Enumerated Types
304 ***************************************/
305
306 /**
307 * \addtogroup group_scb_uart_enums
308 * \{
309 */
310
311 /** UART status codes */
312 typedef enum
313 {
314 /** Operation completed successfully */
315 CY_SCB_UART_SUCCESS = 0U,
316
317 /** One or more of input parameters are invalid */
318 CY_SCB_UART_BAD_PARAM = (CY_SCB_ID | CY_PDL_STATUS_ERROR | CY_SCB_UART_ID | 1U),
319
320 /**
321 * The UART is busy processing a receive operation.
322 */
323 CY_SCB_UART_RECEIVE_BUSY = (CY_SCB_ID | CY_PDL_STATUS_ERROR | CY_SCB_UART_ID | 2U),
324
325 /**
326 * The UART is busy processing a transmit operation.
327 */
328 CY_SCB_UART_TRANSMIT_BUSY = (CY_SCB_ID | CY_PDL_STATUS_ERROR | CY_SCB_UART_ID | 3U)
329 } cy_en_scb_uart_status_t;
330
331 /** UART Mode */
332 typedef enum
333 {
334 CY_SCB_UART_STANDARD = 0U, /**< Configures the SCB for Standard UART operation */
335 CY_SCB_UART_SMARTCARD = 1U, /**< Configures the SCB for SmartCard operation */
336 CY_SCB_UART_IRDA = 2U, /**< Configures the SCB for IrDA operation */
337 } cy_en_scb_uart_mode_t;
338
339 /** UART Stop Bits */
340 typedef enum
341 {
342 CY_SCB_UART_STOP_BITS_1 = 2U, /**< UART looks for 1 Stop Bit */
343 CY_SCB_UART_STOP_BITS_1_5 = 3U, /**< UART looks for 1.5 Stop Bits */
344 CY_SCB_UART_STOP_BITS_2 = 4U, /**< UART looks for 2 Stop Bits */
345 CY_SCB_UART_STOP_BITS_2_5 = 5U, /**< UART looks for 2.5 Stop Bits */
346 CY_SCB_UART_STOP_BITS_3 = 6U, /**< UART looks for 3 Stop Bits */
347 CY_SCB_UART_STOP_BITS_3_5 = 7U, /**< UART looks for 3.5 Stop Bits */
348 CY_SCB_UART_STOP_BITS_4 = 8U, /**< UART looks for 4 Stop Bits */
349 } cy_en_scb_uart_stop_bits_t;
350
351 /** UART Parity */
352 typedef enum
353 {
354 CY_SCB_UART_PARITY_NONE = 0U, /**< UART has no parity check */
355 CY_SCB_UART_PARITY_EVEN = 2U, /**< UART has even parity check */
356 CY_SCB_UART_PARITY_ODD = 3U, /**< UART has odd parity check */
357 } cy_en_scb_uart_parity_t;
358
359 /** UART Polarity */
360 typedef enum
361 {
362 CY_SCB_UART_ACTIVE_LOW = 0U, /**< Signal is active low */
363 CY_SCB_UART_ACTIVE_HIGH = 1U, /**< Signal is active high */
364 } cy_en_scb_uart_polarity_t;
365 /** \} group_scb_uart_enums */
366
367
368 /*******************************************************************************
369 * Type Definitions
370 *******************************************************************************/
371
372 /**
373 * \addtogroup group_scb_uart_data_structures
374 * \{
375 */
376
377 /**
378 * Provides the typedef for the callback function called in the
379 * \ref Cy_SCB_UART_Interrupt to notify the user about occurrences of
380 * \ref group_scb_uart_macros_callback_events.
381 */
382 typedef void (* cy_cb_scb_uart_handle_events_t)(uint32_t event);
383
384 /** UART configuration structure */
385 typedef struct stc_scb_uart_config
386 {
387 /** Specifies the UART's mode of operation */
388 cy_en_scb_uart_mode_t uartMode;
389
390 /**
391 * Oversample factor for UART.
392 * * The UART baud rate is the SCB Clock frequency / oversample
393 * (valid range is 8-16).
394 * * For IrDA, the oversample is always 16, unless
395 * \ref irdaEnableLowPowerReceiver is enabled. Then the oversample is
396 * reduced to the \ref group_scb_uart_macros_irda_lp_ovs set.
397 */
398 uint32_t oversample;
399
400 /** The width of UART data (valid range is 5 to 9) */
401 uint32_t dataWidth;
402
403 /**
404 * Enables the hardware to shift out data element MSB first; otherwise,
405 * LSB first
406 */
407 bool enableMsbFirst;
408
409 /**
410 * Specifies the number of stop bits in the UART transaction, in half-bit
411 * increments
412 */
413 cy_en_scb_uart_stop_bits_t stopBits;
414
415 /** Configures the UART parity */
416 cy_en_scb_uart_parity_t parity;
417
418 /**
419 * Enables a digital 3-tap median filter (2 out of 3 voting) to be applied
420 * to the input of the RX FIFO to filter glitches on the line (for IrDA,
421 * this parameter is ignored)
422 *
423 */
424 bool enableInputFilter;
425
426 /**
427 * Enables the hardware to drop data in the RX FIFO when a parity error is
428 * detected
429 */
430 bool dropOnParityError;
431
432 /**
433 * Enables the hardware to drop data in the RX FIFO when a frame error is
434 * detected
435 */
436 bool dropOnFrameError;
437
438 /**
439 * Enables the UART operation in Multi-Processor mode which requires
440 * dataWidth to be 9 bits (the 9th bit is used to indicate address byte)
441 */
442 bool enableMutliProcessorMode;
443
444 /**
445 * If Multi Processor mode is enabled, this is the address of the RX
446 * FIFO. If the address matches, data is accepted into the FIFO. If
447 * it does not match, the data is ignored.
448 */
449 uint32_t receiverAddress;
450
451 /**
452 * This is the address mask for the Multi Processor address. 1 indicates
453 * that the incoming address must match the corresponding bit in the slave
454 * address. A 0 in the mask indicates that the incoming address does
455 * not need to match.
456 */
457 uint32_t receiverAddressMask;
458
459 /**
460 * Enables the hardware to accept the matching address in the RX FIFO.
461 * This is useful when the device supports more than one address.
462 */
463 bool acceptAddrInFifo;
464
465 /** Inverts the IrDA RX input */
466 bool irdaInvertRx;
467
468 /**
469 * Enables the low-power receive for IrDA mode.
470 * Note that the transmission must be disabled if this mode is enabled.
471 */
472 bool irdaEnableLowPowerReceiver;
473
474 /**
475 * Enables retransmission of the frame placed in the TX FIFO when
476 * NACK is received in SmartCard mode (for Standard and IrDA , this parameter
477 * is ignored)
478 */
479 bool smartCardRetryOnNack;
480
481 /**
482 * Enables the usage of the CTS input signal for the transmitter. The
483 * transmitter waits for CTS to be active before sending data
484 */
485 bool enableCts;
486
487 /** Sets the CTS Polarity */
488 cy_en_scb_uart_polarity_t ctsPolarity;
489
490 /**
491 * When the RX FIFO has fewer entries than rtsRxFifoLevel, the
492 * RTS signal is active (note to disable RTS, set this field to zero)
493 */
494 uint32_t rtsRxFifoLevel;
495
496 /** Sets the RTS Polarity */
497 cy_en_scb_uart_polarity_t rtsPolarity;
498
499 /** Specifies the number of bits to detect a break condition */
500 uint32_t breakWidth;
501 #if(CY_IP_MXSCB_VERSION>=3) || defined (CY_DOXYGEN)
502 /** Specifies the low or high level pulse detection for break condition */
503 /**
504 * \note
505 * This parameter is available for CAT1B devices.
506 **/
507 bool breaklevel;
508 #endif /* CY_IP_MXSCB_VERSION */
509 /**
510 * When there are more entries in the RX FIFO than this level
511 * the RX trigger output goes high. This output can be connected
512 * to a DMA channel through a trigger mux.
513 * Also, it controls the \ref CY_SCB_UART_RX_TRIGGER interrupt source.
514 */
515 uint32_t rxFifoTriggerLevel;
516
517 /**
518 * The bits set in this mask allow the event to cause an interrupt
519 * (See \ref group_scb_uart_macros_rx_fifo_status for the set of constants)
520 */
521 uint32_t rxFifoIntEnableMask;
522
523 /**
524 * When there are fewer entries in the TX FIFO then this level
525 * the TX trigger output goes high. This output can be connected
526 * to a DMA channel through a trigger mux.
527 * Also, it controls \ref CY_SCB_UART_TX_TRIGGER interrupt source.
528 */
529 uint32_t txFifoTriggerLevel;
530
531 /**
532 * Bits set in this mask allows the event to cause an interrupt
533 * (See \ref group_scb_uart_macros_tx_fifo_status for the set of constants)
534 */
535 uint32_t txFifoIntEnableMask;
536 } cy_stc_scb_uart_config_t;
537
538 /** UART context structure.
539 * All fields for the context structure are internal. Firmware never reads or
540 * writes these values. Firmware allocates the structure and provides the
541 * address of the structure to the driver in function calls. Firmware must
542 * ensure that the defined instance of this structure remains in scope
543 * while the drive is in use.
544 */
545 typedef struct cy_stc_scb_uart_context
546 {
547 /** \cond INTERNAL */
548 uint32_t volatile txStatus; /**< The transmit status */
549 uint32_t volatile rxStatus; /**< The receive status */
550
551 void *rxRingBuf; /**< The pointer to the ring buffer */
552 uint32_t rxRingBufSize; /**< The ring buffer size */
553 uint32_t volatile rxRingBufHead; /**< The ring buffer head index */
554 uint32_t volatile rxRingBufTail; /**< The ring buffer tail index */
555
556 void *rxBuf; /**< The pointer to the receive buffer */
557 uint32_t rxBufSize; /**< The receive buffer size */
558 uint32_t volatile rxBufIdx; /**< The current location in the receive buffer */
559
560 void *txBuf; /**< The pointer to the transmit buffer */
561 uint32_t txBufSize; /**< The transmit buffer size */
562 uint32_t volatile txLeftToTransmit; /**< The number of data elements left to be transmitted */
563
564 /**
565 * Enables the low-power receive for IrDA mode.
566 * Note that the transmission must be disabled if this mode is enabled.
567 */
568 bool irdaEnableLowPowerReceiver;
569
570 /** The pointer to an event callback that is called when any of
571 * \ref group_scb_uart_macros_callback_events occurs
572 */
573 cy_cb_scb_uart_handle_events_t cbEvents;
574
575 #if !defined(NDEBUG)
576 uint32_t initKey; /**< Tracks the context initialization */
577 #endif /* !(NDEBUG) */
578 /** \endcond */
579 } cy_stc_scb_uart_context_t;
580 /** \} group_scb_uart_data_structures */
581
582
583 /*******************************************************************************
584 * Function Prototypes
585 *******************************************************************************/
586
587 /**
588 * \addtogroup group_scb_uart_general_functions
589 * \{
590 */
591 cy_en_scb_uart_status_t Cy_SCB_UART_Init(CySCB_Type *base, cy_stc_scb_uart_config_t const *config,
592 cy_stc_scb_uart_context_t *context);
593 void Cy_SCB_UART_DeInit (CySCB_Type *base);
594 __STATIC_INLINE void Cy_SCB_UART_Enable(CySCB_Type *base);
595 void Cy_SCB_UART_Disable(CySCB_Type *base, cy_stc_scb_uart_context_t *context);
596
597 __STATIC_INLINE void Cy_SCB_UART_EnableCts (CySCB_Type *base);
598 __STATIC_INLINE void Cy_SCB_UART_DisableCts (CySCB_Type *base);
599 __STATIC_INLINE void Cy_SCB_UART_SetRtsFifoLevel(CySCB_Type *base, uint32_t level);
600 __STATIC_INLINE uint32_t Cy_SCB_UART_GetRtsFifoLevel(CySCB_Type const *base);
601
602 __STATIC_INLINE void Cy_SCB_UART_EnableSkipStart (CySCB_Type *base);
603 __STATIC_INLINE void Cy_SCB_UART_DisableSkipStart(CySCB_Type *base);
604 /** \} group_scb_uart_general_functions */
605
606 /**
607 * \addtogroup group_scb_uart_high_level_functions
608 * \{
609 */
610 void Cy_SCB_UART_StartRingBuffer (CySCB_Type *base, void *buffer, uint32_t size,
611 cy_stc_scb_uart_context_t *context);
612 void Cy_SCB_UART_StopRingBuffer (CySCB_Type *base, cy_stc_scb_uart_context_t *context);
613 uint32_t Cy_SCB_UART_GetNumInRingBuffer(CySCB_Type const *base, cy_stc_scb_uart_context_t const *context);
614 void Cy_SCB_UART_ClearRingBuffer (CySCB_Type const *base, cy_stc_scb_uart_context_t *context);
615
616 cy_en_scb_uart_status_t Cy_SCB_UART_Receive(CySCB_Type *base, void *buffer, uint32_t size,
617 cy_stc_scb_uart_context_t *context);
618 void Cy_SCB_UART_AbortReceive (CySCB_Type *base, cy_stc_scb_uart_context_t *context);
619 uint32_t Cy_SCB_UART_GetReceiveStatus(CySCB_Type const *base, cy_stc_scb_uart_context_t const *context);
620 uint32_t Cy_SCB_UART_GetNumReceived (CySCB_Type const *base, cy_stc_scb_uart_context_t const *context);
621
622 cy_en_scb_uart_status_t Cy_SCB_UART_Transmit(CySCB_Type *base, void *buffer, uint32_t size,
623 cy_stc_scb_uart_context_t *context);
624 void Cy_SCB_UART_AbortTransmit (CySCB_Type *base, cy_stc_scb_uart_context_t *context);
625 uint32_t Cy_SCB_UART_GetTransmitStatus (CySCB_Type const *base, cy_stc_scb_uart_context_t const *context);
626 uint32_t Cy_SCB_UART_GetNumLeftToTransmit(CySCB_Type const *base, cy_stc_scb_uart_context_t const *context);
627 /** \} group_scb_uart_high_level_functions */
628
629 /**
630 * \addtogroup group_scb_uart_low_level_functions
631 * \{
632 */
633 __STATIC_INLINE uint32_t Cy_SCB_UART_Put (CySCB_Type *base, uint32_t data);
634 __STATIC_INLINE uint32_t Cy_SCB_UART_PutArray (CySCB_Type *base, void *buffer, uint32_t size);
635 __STATIC_INLINE void Cy_SCB_UART_PutArrayBlocking(CySCB_Type *base, void *buffer, uint32_t size);
636 __STATIC_INLINE void Cy_SCB_UART_PutString (CySCB_Type *base, char_t const string[]);
637 void Cy_SCB_UART_SendBreakBlocking(CySCB_Type *base, uint32_t breakWidth);
638
639 __STATIC_INLINE uint32_t Cy_SCB_UART_Get (CySCB_Type const *base);
640 __STATIC_INLINE uint32_t Cy_SCB_UART_GetArray (CySCB_Type const *base, void *buffer, uint32_t size);
641 __STATIC_INLINE void Cy_SCB_UART_GetArrayBlocking(CySCB_Type const *base, void *buffer, uint32_t size);
642
643 __STATIC_INLINE uint32_t Cy_SCB_UART_GetTxFifoStatus (CySCB_Type const *base);
644 __STATIC_INLINE void Cy_SCB_UART_ClearTxFifoStatus(CySCB_Type *base, uint32_t clearMask);
645
646 __STATIC_INLINE uint32_t Cy_SCB_UART_GetRxFifoStatus (CySCB_Type const *base);
647 __STATIC_INLINE void Cy_SCB_UART_ClearRxFifoStatus(CySCB_Type *base, uint32_t clearMask);
648
649 __STATIC_INLINE uint32_t Cy_SCB_UART_GetNumInTxFifo (CySCB_Type const *base);
650 __STATIC_INLINE bool Cy_SCB_UART_IsTxComplete (CySCB_Type const *base);
651
652 __STATIC_INLINE uint32_t Cy_SCB_UART_GetNumInRxFifo (CySCB_Type const *base);
653
654 __STATIC_INLINE void Cy_SCB_UART_ClearRxFifo (CySCB_Type *base);
655 __STATIC_INLINE void Cy_SCB_UART_ClearTxFifo (CySCB_Type *base);
656
657 __STATIC_INLINE uint32_t Cy_SCB_UART_GetOverSample(CySCB_Type const *base);
658 cy_en_scb_uart_status_t Cy_SCB_UART_SetOverSample(CySCB_Type *base, uint32_t overSample, cy_stc_scb_uart_context_t *context);
659
660 __STATIC_INLINE uint32_t Cy_SCB_UART_GetDataWidth(CySCB_Type const *base);
661 void Cy_SCB_UART_SetDataWidth(CySCB_Type *base, uint32_t dataWidth);
662
663 __STATIC_INLINE uint32_t Cy_SCB_UART_GetParity(CySCB_Type const *base);
664 void Cy_SCB_UART_SetParity(CySCB_Type *base, cy_en_scb_uart_parity_t parity);
665
666 __STATIC_INLINE uint32_t Cy_SCB_UART_GetStopBits(CySCB_Type const *base);
667 void Cy_SCB_UART_SetStopBits(CySCB_Type *base, cy_en_scb_uart_stop_bits_t stopBits);
668
669 __STATIC_INLINE bool Cy_SCB_UART_GetDropOnParityError(CySCB_Type const *base);
670 void Cy_SCB_UART_SetDropOnParityError(CySCB_Type *base, bool dropOnParityError);
671
672 __STATIC_INLINE bool Cy_SCB_UART_GetEnableMsbFirst(CySCB_Type const *base);
673 void Cy_SCB_UART_SetEnableMsbFirst(CySCB_Type *base, bool enableMsbFirst);
674 /** \} group_scb_uart_low_level_functions */
675
676 /**
677 * \addtogroup group_scb_uart_interrupt_functions
678 * \{
679 */
680 void Cy_SCB_UART_Interrupt(CySCB_Type *base, cy_stc_scb_uart_context_t *context);
681
682 __STATIC_INLINE void Cy_SCB_UART_RegisterCallback(CySCB_Type const *base, cy_cb_scb_uart_handle_events_t callback,
683 cy_stc_scb_uart_context_t *context);
684 /** \} group_scb_uart_interrupt_functions */
685
686 /**
687 * \addtogroup group_scb_uart_low_power_functions
688 * \{
689 */
690 cy_en_syspm_status_t Cy_SCB_UART_DeepSleepCallback(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode);
691 cy_en_syspm_status_t Cy_SCB_UART_HibernateCallback(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode);
692 /** \} group_scb_uart_low_power_functions */
693
694
695 /*******************************************************************************
696 * API Constants
697 *******************************************************************************/
698
699 /**
700 * \addtogroup group_scb_uart_macros
701 * \{
702 */
703
704 /**
705 * \defgroup group_scb_uart_macros_irda_lp_ovs UART IRDA Low Power Oversample factors
706 * \{
707 */
708 #define CY_SCB_UART_IRDA_LP_OVS16 (1UL) /**< IrDA in low-power mode oversampled by 16 */
709 #define CY_SCB_UART_IRDA_LP_OVS32 (2UL) /**< IrDA in low-power mode oversampled by 32 */
710 #define CY_SCB_UART_IRDA_LP_OVS48 (3UL) /**< IrDA in low-power mode oversampled by 48 */
711 #define CY_SCB_UART_IRDA_LP_OVS96 (4UL) /**< IrDA in low-power mode oversampled by 96 */
712 #define CY_SCB_UART_IRDA_LP_OVS192 (5UL) /**< IrDA in low-power mode oversampled by 192 */
713 #define CY_SCB_UART_IRDA_LP_OVS768 (6UL) /**< IrDA in low-power mode oversampled by 768 */
714 #define CY_SCB_UART_IRDA_LP_OVS1536 (7UL) /**< IrDA in low-power mode oversampled by 1536 */
715 /** \} group_scb_uart_macros_irda_lp_ovs */
716
717 /**
718 * \defgroup group_scb_uart_macros_rx_fifo_status UART RX FIFO status.
719 * \{
720 * Macros to check UART RX FIFO status returned by \ref Cy_SCB_UART_GetRxFifoStatus
721 * function or assign mask for \ref Cy_SCB_UART_ClearRxFifoStatus function.
722 * Each UART RX FIFO status is encoded in a separate bit, therefore multiple
723 * bits may be set to indicate the current status.
724 */
725
726 /** The number of entries in the RX FIFO is more than the RX FIFO trigger level
727 * value
728 */
729 #define CY_SCB_UART_RX_TRIGGER (SCB_INTR_RX_TRIGGER_Msk)
730
731 /** The RX FIFO is not empty, there is data to read */
732 #define CY_SCB_UART_RX_NOT_EMPTY (SCB_INTR_RX_NOT_EMPTY_Msk)
733
734 /**
735 * The RX FIFO is full, there is no more space for additional data, and
736 * any additional data will be dropped
737 */
738 #define CY_SCB_UART_RX_FULL (SCB_INTR_RX_FULL_Msk)
739
740 /**
741 * The RX FIFO was full and there was an attempt to write to it.
742 * That additional data was dropped.
743 */
744 #define CY_SCB_UART_RX_OVERFLOW (SCB_INTR_RX_OVERFLOW_Msk)
745
746 /** An attempt to read from an empty RX FIFO */
747 #define CY_SCB_UART_RX_UNDERFLOW (SCB_INTR_RX_UNDERFLOW_Msk)
748
749 /** The RX FIFO detected a frame error, either a stop or stop-bit error */
750 #define CY_SCB_UART_RX_ERR_FRAME (SCB_INTR_RX_FRAME_ERROR_Msk)
751
752 /** The RX FIFO detected a parity error */
753 #define CY_SCB_UART_RX_ERR_PARITY (SCB_INTR_RX_PARITY_ERROR_Msk)
754
755 /** The RX FIFO detected a break transmission from the transmitter */
756 #define CY_SCB_UART_RX_BREAK_DETECT (SCB_INTR_RX_BREAK_DETECT_Msk)
757 /** \} group_scb_uart_macros_rx_fifo_status */
758
759 /**
760 * \defgroup group_scb_uart_macros_tx_fifo_status UART TX FIFO Statuses
761 * \{
762 * Macros to check UART TX FIFO status returned by \ref Cy_SCB_UART_GetTxFifoStatus
763 * function or assign mask for \ref Cy_SCB_UART_ClearTxFifoStatus function.
764 * Each UART TX FIFO status is encoded in a separate bit, therefore multiple bits
765 * may be set to indicate the current status.
766 */
767
768 /** The number of entries in the TX FIFO is less than the TX FIFO trigger level
769 * value
770 */
771 #define CY_SCB_UART_TX_TRIGGER (SCB_INTR_TX_TRIGGER_Msk)
772
773 /** The TX FIFO is not full, there is a space for more data */
774 #define CY_SCB_UART_TX_NOT_FULL (SCB_INTR_TX_NOT_FULL_Msk)
775
776 /** The TX FIFO is empty, note there may still be data in the shift register.*/
777 #define CY_SCB_UART_TX_EMPTY (SCB_INTR_TX_EMPTY_Msk)
778
779 /** An attempt to write to the full TX FIFO */
780 #define CY_SCB_UART_TX_OVERFLOW (SCB_INTR_TX_OVERFLOW_Msk)
781
782 /** An attempt to read from an empty transmitter FIFO (hardware reads). */
783 #define CY_SCB_UART_TX_UNDERFLOW (SCB_INTR_TX_UNDERFLOW_Msk)
784
785 /** All data has been transmitted out of the FIFO, including shifter */
786 #define CY_SCB_UART_TX_DONE (SCB_INTR_TX_UART_DONE_Msk)
787
788 /** SmartCard only: the transmitter received a NACK */
789 #define CY_SCB_UART_TX_NACK (SCB_INTR_TX_UART_NACK_Msk)
790
791 /** SmartCard only: the transmitter lost arbitration */
792 #define CY_SCB_UART_TX_ARB_LOST (SCB_INTR_TX_UART_ARB_LOST_Msk)
793 /** \} group_scb_uart_macros_tx_fifo_status */
794
795 /**
796 * \defgroup group_scb_uart_macros_receive_status UART Receive Statuses
797 * \{
798 * Macros to check current UART receive status returned by
799 * \ref Cy_SCB_UART_GetReceiveStatus function.
800 * Each UART receive status is encoded in a separate bit, therefore multiple bits
801 * may be set to indicate the current status.
802 */
803 /** The receive operation started by \ref Cy_SCB_UART_Receive is in progress */
804 #define CY_SCB_UART_RECEIVE_ACTIVE (0x01UL)
805
806 /**
807 * The hardware RX FIFO was full and there was an attempt to write to it.
808 * That additional data was dropped.
809 */
810 #define CY_SCB_UART_RECEIVE_OVERFLOW (SCB_INTR_RX_OVERFLOW_Msk)
811
812 /** The receive hardware detected a frame error, either a start or
813 * stop bit error
814 */
815 #define CY_SCB_UART_RECEIVE_ERR_FRAME (SCB_INTR_RX_FRAME_ERROR_Msk)
816
817 /** The receive hardware detected a parity error */
818 #define CY_SCB_UART_RECEIVE_ERR_PARITY (SCB_INTR_RX_PARITY_ERROR_Msk)
819
820 /** The receive hardware detected a break transmission from transmitter */
821 #define CY_SCB_UART_RECEIVE_BREAK_DETECT (SCB_INTR_RX_BREAK_DETECT_Msk)
822 /** \} group_scb_uart_macros_receive_status */
823
824 /**
825 * \defgroup group_scb_uart_macros_transmit_status UART Transmit Status
826 * \{
827 * Macros to check current UART transmit status returned by
828 * \ref Cy_SCB_UART_GetTransmitStatus function.
829 * Each UART transmit status is encoded in a separate bit, therefore multiple bits
830 * may be set to indicate the current status.
831 */
832
833 /** The transmit operation started by \ref Cy_SCB_UART_Transmit is in progress */
834 #define CY_SCB_UART_TRANSMIT_ACTIVE (0x01UL)
835
836 /**
837 * All data elements specified by \ref Cy_SCB_UART_Transmit have been loaded
838 * into the TX FIFO
839 */
840 #define CY_SCB_UART_TRANSMIT_IN_FIFO (0x02UL)
841
842 /** SmartCard only: the transmitter received a NACK */
843 #define CY_SCB_UART_TRANSMIT_NACK (SCB_INTR_TX_UART_NACK_Msk)
844
845 /** SmartCard only: the transmitter lost arbitration */
846 #define CY_SCB_UART_TRANSMIT_ARB_LOST (SCB_INTR_TX_UART_ARB_LOST_Msk)
847 /** \} group_scb_uart_macros_transmit_status */
848
849 /**
850 * \defgroup group_scb_uart_macros_callback_events UART Callback Events
851 * \{
852 * Macros to check UART events passed by \ref cy_cb_scb_uart_handle_events_t callback.
853 * Note that only single event is notified by the callback when it is called.
854 */
855
856 /**
857 * All data elements specified by \ref Cy_SCB_UART_Transmit have been loaded
858 * into the TX FIFO
859 */
860 #define CY_SCB_UART_TRANSMIT_IN_FIFO_EVENT (0x01UL)
861
862 /** The transmit operation started by \ref Cy_SCB_UART_Transmit is complete */
863 #define CY_SCB_UART_TRANSMIT_DONE_EVENT (0x02UL)
864
865 /** The receive operation started by \ref Cy_SCB_UART_Receive is complete */
866 #define CY_SCB_UART_RECEIVE_DONE_EVENT (0x04UL)
867
868 /**
869 * The ring buffer is full, there is no more space for additional data.
870 * Additional data is stored in the RX FIFO until it becomes full, at which
871 * point data is dropped.
872 */
873 #define CY_SCB_UART_RB_FULL_EVENT (0x08UL)
874
875 /**
876 * An error was detected during the receive operation. This includes overflow,
877 * frame error, or parity error. Check \ref Cy_SCB_UART_GetReceiveStatus to
878 * determine the source of the error.
879 */
880 #define CY_SCB_UART_RECEIVE_ERR_EVENT (0x10UL)
881
882 /**
883 * An error was detected during the transmit operation. This includes a NACK
884 * or lost arbitration. Check \ref Cy_SCB_UART_GetTransmitStatus to determine
885 * the source of the error
886 */
887 #define CY_SCB_UART_TRANSMIT_ERR_EVENT (0x20UL)
888
889 /** The receive fifo is not empty. To use this event the \ref CY_SCB_RX_INTR_NOT_EMPTY interrupt must be enabled by the user. */
890 #define CY_SCB_UART_RECEIVE_NOT_EMTPY (0x40UL)
891
892 /** The transmit fifo is empty. To use this event the \ref CY_SCB_UART_TX_EMPTY interrupt must be enabled by the user. */
893 #define CY_SCB_UART_TRANSMIT_EMTPY (0x80UL)
894 /** \} group_scb_uart_macros_callback_events */
895
896
897 /** Data returned by the hardware when an empty RX FIFO is read */
898 #define CY_SCB_UART_RX_NO_DATA (0xFFFFFFFFUL)
899
900
901 /*******************************************************************************
902 * Internal Constants
903 *******************************************************************************/
904
905 /** \cond INTERNAL */
906 #define CY_SCB_UART_TX_INTR_MASK (CY_SCB_UART_TX_TRIGGER | CY_SCB_UART_TX_NOT_FULL | CY_SCB_UART_TX_EMPTY | \
907 CY_SCB_UART_TX_OVERFLOW | CY_SCB_UART_TX_UNDERFLOW | CY_SCB_UART_TX_DONE | \
908 CY_SCB_UART_TX_NACK | CY_SCB_UART_TX_ARB_LOST)
909
910 #define CY_SCB_UART_RX_INTR_MASK (CY_SCB_UART_RX_TRIGGER | CY_SCB_UART_RX_NOT_EMPTY | CY_SCB_UART_RX_FULL | \
911 CY_SCB_UART_RX_OVERFLOW | CY_SCB_UART_RX_UNDERFLOW | CY_SCB_UART_RX_ERR_FRAME | \
912 CY_SCB_UART_RX_ERR_PARITY | CY_SCB_UART_RX_BREAK_DETECT)
913
914 #define CY_SCB_UART_TX_INTR (CY_SCB_TX_INTR_LEVEL | CY_SCB_TX_INTR_UART_NACK | CY_SCB_TX_INTR_UART_ARB_LOST)
915
916 #define CY_SCB_UART_RX_INTR (CY_SCB_RX_INTR_LEVEL | CY_SCB_RX_INTR_OVERFLOW | CY_SCB_RX_INTR_UART_FRAME_ERROR | \
917 CY_SCB_RX_INTR_UART_PARITY_ERROR | CY_SCB_RX_INTR_UART_BREAK_DETECT)
918
919 #define CY_SCB_UART_RECEIVE_ERR (CY_SCB_RX_INTR_OVERFLOW | CY_SCB_RX_INTR_UART_FRAME_ERROR | \
920 CY_SCB_RX_INTR_UART_PARITY_ERROR)
921
922 #define CY_SCB_UART_TRANSMIT_ERR (CY_SCB_TX_INTR_UART_NACK | CY_SCB_TX_INTR_UART_ARB_LOST)
923
924 #define CY_SCB_UART_INIT_KEY (0x00ABCDEFUL)
925
926 #define CY_SCB_UART_IS_MODE_VALID(mode) ( (CY_SCB_UART_STANDARD == (mode)) || \
927 (CY_SCB_UART_SMARTCARD == (mode)) || \
928 (CY_SCB_UART_IRDA == (mode)) )
929
930 #define CY_SCB_UART_IS_STOP_BITS_VALID(stopBits) ( (CY_SCB_UART_STOP_BITS_1 == (stopBits)) || \
931 (CY_SCB_UART_STOP_BITS_1_5 == (stopBits)) || \
932 (CY_SCB_UART_STOP_BITS_2 == (stopBits)) || \
933 (CY_SCB_UART_STOP_BITS_2_5 == (stopBits)) || \
934 (CY_SCB_UART_STOP_BITS_3 == (stopBits)) || \
935 (CY_SCB_UART_STOP_BITS_3_5 == (stopBits)) || \
936 (CY_SCB_UART_STOP_BITS_4 == (stopBits)) )
937
938 #define CY_SCB_UART_IS_PARITY_VALID(parity) ( (CY_SCB_UART_PARITY_NONE == (parity)) || \
939 (CY_SCB_UART_PARITY_EVEN == (parity)) || \
940 (CY_SCB_UART_PARITY_ODD == (parity)) )
941
942 #define CY_SCB_UART_IS_POLARITY_VALID(polarity) ( (CY_SCB_UART_ACTIVE_LOW == (polarity)) || \
943 (CY_SCB_UART_ACTIVE_HIGH == (polarity)) )
944
945 #define CY_SCB_UART_IS_IRDA_LP_OVS_VALID(ovs) ( (CY_SCB_UART_IRDA_LP_OVS16 == (ovs)) || \
946 (CY_SCB_UART_IRDA_LP_OVS32 == (ovs)) || \
947 (CY_SCB_UART_IRDA_LP_OVS48 == (ovs)) || \
948 (CY_SCB_UART_IRDA_LP_OVS96 == (ovs)) || \
949 (CY_SCB_UART_IRDA_LP_OVS192 == (ovs)) || \
950 (CY_SCB_UART_IRDA_LP_OVS768 == (ovs)) || \
951 (CY_SCB_UART_IRDA_LP_OVS1536 == (ovs)) )
952
953 #define CY_SCB_UART_IS_ADDRESS_VALID(addr) ((addr) <= 0xFFUL)
954 #define CY_SCB_UART_IS_ADDRESS_MASK_VALID(mask) ((mask) <= 0xFFUL)
955 #define CY_SCB_UART_IS_DATA_WIDTH_VALID(width) ( ((width) >= 5UL) && ((width) <= 9UL) )
956 #define CY_SCB_UART_IS_OVERSAMPLE_VALID(ovs, mode, lpRx) ( ((CY_SCB_UART_STANDARD == (mode)) || (CY_SCB_UART_SMARTCARD == (mode))) ? \
957 (((ovs) >= 8UL) && ((ovs) <= 16UL)) : \
958 (bool) ((lpRx) ? CY_SCB_UART_IS_IRDA_LP_OVS_VALID(ovs) : true) )
959
960 #define CY_SCB_UART_IS_RX_BREAK_WIDTH_VALID(base, width) ( ((width) >= (_FLD2VAL(SCB_RX_CTRL_DATA_WIDTH, (base)->RX_CTRL) + 3UL)) && \
961 ((width) <= 16UL) )
962 #define CY_SCB_UART_IS_TX_BREAK_WIDTH_VALID(width) ( ((width) >= 4UL) && ((width) <= 16UL) )
963
964 #define CY_SCB_UART_IS_MUTLI_PROC_VALID(mp, mode, width, parity) ( (mp) ? ((CY_SCB_UART_STANDARD == (mode)) && ((width) == 9UL) && \
965 (CY_SCB_UART_PARITY_NONE == (parity))) : true)
966 /** \endcond */
967
968 /** \} group_scb_uart_macros */
969
970
971 /*******************************************************************************
972 * In-line Function Implementation
973 *******************************************************************************/
974
975 /**
976 * \addtogroup group_scb_uart_general_functions
977 * \{
978 */
979
980 /*******************************************************************************
981 * Function Name: Cy_SCB_UART_Enable
982 ****************************************************************************//**
983 *
984 * Enables the SCB block for the UART operation.
985 *
986 * \param base
987 * The pointer to the UART SCB instance.
988 *
989 *******************************************************************************/
Cy_SCB_UART_Enable(CySCB_Type * base)990 __STATIC_INLINE void Cy_SCB_UART_Enable(CySCB_Type *base)
991 {
992 SCB_CTRL(base) |= SCB_CTRL_ENABLED_Msk;
993 }
994
995
996 /*******************************************************************************
997 * Function Name: Cy_SCB_UART_EnableCts
998 ****************************************************************************//**
999 *
1000 * Enables the Clear to Send (CTS) input for the UART. The UART will not transmit
1001 * data while this signal is inactive.
1002 *
1003 * \param base
1004 * The pointer to the UART SCB instance.
1005 *
1006 *******************************************************************************/
Cy_SCB_UART_EnableCts(CySCB_Type * base)1007 __STATIC_INLINE void Cy_SCB_UART_EnableCts(CySCB_Type *base)
1008 {
1009 SCB_UART_FLOW_CTRL(base) |= SCB_UART_FLOW_CTRL_CTS_ENABLED_Msk;
1010 }
1011
1012
1013 /*******************************************************************************
1014 * Function Name: Cy_SCB_UART_DisableCts
1015 ****************************************************************************//**
1016 *
1017 * Disables the Clear to Send (CTS) input for the UART.
1018 * See \ref Cy_SCB_UART_EnableCts for the details.
1019 *
1020 * \param base
1021 * The pointer to the UART SCB instance.
1022 *
1023 *******************************************************************************/
Cy_SCB_UART_DisableCts(CySCB_Type * base)1024 __STATIC_INLINE void Cy_SCB_UART_DisableCts(CySCB_Type *base)
1025 {
1026 SCB_UART_FLOW_CTRL(base) &= (uint32_t) ~SCB_UART_FLOW_CTRL_CTS_ENABLED_Msk;
1027 }
1028
1029
1030 /*******************************************************************************
1031 * Function Name: Cy_SCB_UART_SetRtsFifoLevel
1032 ****************************************************************************//**
1033 *
1034 * Sets a level for the Ready To Send (RTS) signal activation.
1035 * When the number of data elements in the receive FIFO is below this level,
1036 * then the RTS output is active. Otherwise, the RTS signal is inactive.
1037 * To disable the RTS signal generation, set this level to zero.
1038 *
1039 * \param base
1040 * The pointer to the UART SCB instance.
1041 *
1042 * \param level
1043 * The level in the RX FIFO for RTS signal activation.
1044 *
1045 *******************************************************************************/
Cy_SCB_UART_SetRtsFifoLevel(CySCB_Type * base,uint32_t level)1046 __STATIC_INLINE void Cy_SCB_UART_SetRtsFifoLevel(CySCB_Type *base, uint32_t level)
1047 {
1048 CY_ASSERT_L2(CY_SCB_IS_TRIGGER_LEVEL_VALID(base, level));
1049
1050 CY_REG32_CLR_SET(SCB_UART_FLOW_CTRL(base), SCB_UART_FLOW_CTRL_TRIGGER_LEVEL, level);
1051 }
1052
1053
1054 /*******************************************************************************
1055 * Function Name: Cy_SCB_UART_GetRtsFifoLevel
1056 ****************************************************************************//**
1057 *
1058 * Returns the level in the RX FIFO for the RTS signal activation.
1059 *
1060 * \param base
1061 * The pointer to the UART SCB instance.
1062 *
1063 * \return
1064 * The level in the RX FIFO for RTS signal activation.
1065 *
1066 *******************************************************************************/
Cy_SCB_UART_GetRtsFifoLevel(CySCB_Type const * base)1067 __STATIC_INLINE uint32_t Cy_SCB_UART_GetRtsFifoLevel(CySCB_Type const *base)
1068 {
1069 return _FLD2VAL(SCB_UART_FLOW_CTRL_TRIGGER_LEVEL, SCB_UART_FLOW_CTRL(base));
1070 }
1071
1072
1073 /*******************************************************************************
1074 * Function Name: Cy_SCB_UART_EnableSkipStart
1075 ****************************************************************************//**
1076 *
1077 * Enables the skip start-bit functionality.
1078 * When skip start is enabled the UART hardware does not synchronize to a
1079 * start bit but synchronizes to the first rising edge. To create a rising edge,
1080 * the first data bit must be a 1. This feature is useful when the start bit
1081 * falling edge is used to wake the device through a GPIO interrupt.
1082 *
1083 * \param base
1084 * The pointer to the UART SCB instance.
1085 *
1086 * \note
1087 * When skip start-bit feature is enabled, it is applied (UART synchronizes
1088 * to the first rising edge after start bit) whenever the SCB is enabled.
1089 * This can cause incorrect UART synchronization and data reception when
1090 * the first data bit is not a 1. Therefore, disable the skip start-bit
1091 * when it should not be applied.
1092 * Note that SCB is disabled before enter Deep Sleep mode or after calling
1093 * \ref Cy_SCB_UART_Disable.
1094 *
1095 *******************************************************************************/
Cy_SCB_UART_EnableSkipStart(CySCB_Type * base)1096 __STATIC_INLINE void Cy_SCB_UART_EnableSkipStart(CySCB_Type *base)
1097 {
1098 SCB_UART_RX_CTRL(base) |= SCB_UART_RX_CTRL_SKIP_START_Msk;
1099 }
1100
1101
1102 /*******************************************************************************
1103 * Function Name: Cy_SCB_UART_DisableSkipStart
1104 ****************************************************************************//**
1105 *
1106 * Disable the skip start-bit functionality.
1107 * See \ref Cy_SCB_UART_EnableSkipStart for the details.
1108 *
1109 * \param base
1110 * The pointer to the UART SCB instance.
1111 *
1112 *******************************************************************************/
Cy_SCB_UART_DisableSkipStart(CySCB_Type * base)1113 __STATIC_INLINE void Cy_SCB_UART_DisableSkipStart(CySCB_Type *base)
1114 {
1115 SCB_UART_RX_CTRL(base) &= (uint32_t) ~SCB_UART_RX_CTRL_SKIP_START_Msk;
1116 }
1117 /** \} group_scb_uart_general_functions */
1118
1119
1120 /**
1121 * \addtogroup group_scb_uart_low_level_functions
1122 * \{
1123 */
1124
1125
1126 /*******************************************************************************
1127 * Function Name: Cy_SCB_UART_GetOverSample
1128 ****************************************************************************//**
1129 *
1130 * Returns the value of oversample.
1131 *
1132 * \param base
1133 * The pointer to the UART SCB instance.
1134 *
1135 * \return
1136 * The value of oversample.
1137 *
1138 * \snippet scb/uart_snippet/main.c UART_GET_OVS
1139 *
1140 *******************************************************************************/
Cy_SCB_UART_GetOverSample(CySCB_Type const * base)1141 __STATIC_INLINE uint32_t Cy_SCB_UART_GetOverSample(CySCB_Type const *base)
1142 {
1143 return (_FLD2VAL(SCB_CTRL_OVS, SCB_CTRL(base))+1UL);
1144 }
1145
1146
1147 /*******************************************************************************
1148 * Function Name: Cy_SCB_UART_GetDataWidth
1149 ****************************************************************************//**
1150 *
1151 * Returns the value of datawidth.
1152 *
1153 * \param base
1154 * The pointer to the UART SCB instance.
1155 *
1156 * \return
1157 * The value of datawidth.
1158 *
1159 * \note
1160 * Values of Tx and Rx datawidth are same.
1161 *
1162 * \snippet scb/uart_snippet/main.c UART_GET_DATA_WIDTH
1163 *
1164 *******************************************************************************/
Cy_SCB_UART_GetDataWidth(CySCB_Type const * base)1165 __STATIC_INLINE uint32_t Cy_SCB_UART_GetDataWidth(CySCB_Type const *base)
1166 {
1167 return (_FLD2VAL(SCB_TX_CTRL_DATA_WIDTH, SCB_TX_CTRL(base))+1UL);
1168 }
1169
1170
1171 /*******************************************************************************
1172 * Function Name: Cy_SCB_UART_GetParity
1173 ****************************************************************************//**
1174 *
1175 * Returns the value of parity.
1176 *
1177 * \param base
1178 * The pointer to the UART SCB instance.
1179 *
1180 * \return
1181 * The value of parity.
1182 *
1183 * \note
1184 * Values of Tx and Rx parity are same.
1185 *
1186 * \snippet scb/uart_snippet/main.c UART_GET_PARITY
1187 *
1188 *******************************************************************************/
Cy_SCB_UART_GetParity(CySCB_Type const * base)1189 __STATIC_INLINE uint32_t Cy_SCB_UART_GetParity(CySCB_Type const *base)
1190 {
1191 return _FLD2VAL(CY_SCB_UART_TX_CTRL_SET_PARITY, SCB_UART_TX_CTRL(base));
1192 }
1193
1194
1195 /*******************************************************************************
1196 * Function Name: Cy_SCB_UART_GetStopBits
1197 ****************************************************************************//**
1198 *
1199 * Returns the value of stop bits.
1200 *
1201 * \param base
1202 * The pointer to the UART SCB instance.
1203 *
1204 * \return
1205 * The value of stop bits.
1206 *
1207 * \note
1208 * Values of Tx and Rx stop bits are same.
1209 *
1210 * \snippet scb/uart_snippet/main.c UART_GET_STOP_BITS
1211 *
1212 *******************************************************************************/
Cy_SCB_UART_GetStopBits(CySCB_Type const * base)1213 __STATIC_INLINE uint32_t Cy_SCB_UART_GetStopBits(CySCB_Type const *base)
1214 {
1215 return (_FLD2VAL(SCB_UART_TX_CTRL_STOP_BITS, SCB_UART_TX_CTRL(base))+1UL);
1216 }
1217
1218
1219 /*******************************************************************************
1220 * Function Name: Cy_SCB_UART_GetDropOnParityError
1221 ****************************************************************************//**
1222 *
1223 * Returns the value of SetDropOnParityError.
1224 *
1225 * \param base
1226 * The pointer to the UART SCB instance.
1227 *
1228 * \return
1229 * The value of SetDropOnParityError.
1230 *
1231 * \snippet scb/uart_snippet/main.c UART_GET_DROP_ON_PARITY_ERROR
1232 *
1233 *******************************************************************************/
Cy_SCB_UART_GetDropOnParityError(CySCB_Type const * base)1234 __STATIC_INLINE bool Cy_SCB_UART_GetDropOnParityError(CySCB_Type const *base)
1235 {
1236 return _FLD2BOOL(SCB_UART_RX_CTRL_DROP_ON_PARITY_ERROR, SCB_UART_RX_CTRL(base));
1237 }
1238
1239
1240 /*******************************************************************************
1241 * Function Name: Cy_SCB_UART_GetEnableMsbFirst
1242 ****************************************************************************//**
1243 *
1244 * Returns the value of enableMsbFirst.
1245 *
1246 * \param base
1247 * The pointer to the UART SCB instance.
1248 *
1249 * \return
1250 * The value of enableMsbFirst.
1251 *
1252 * \note
1253 * Values of Tx and Rx enableMsbFirst are same.
1254 *
1255 * \snippet scb/uart_snippet/main.c UART_GET_ENABLE_MSB_FIRST
1256 *
1257 *******************************************************************************/
Cy_SCB_UART_GetEnableMsbFirst(CySCB_Type const * base)1258 __STATIC_INLINE bool Cy_SCB_UART_GetEnableMsbFirst(CySCB_Type const *base)
1259 {
1260 return _FLD2BOOL(SCB_TX_CTRL_MSB_FIRST, SCB_TX_CTRL(base));
1261 }
1262
1263
1264 /*******************************************************************************
1265 * Function Name: Cy_SCB_UART_Get
1266 ****************************************************************************//**
1267 *
1268 * Reads a single data element from the UART RX FIFO.
1269 * This function does not check whether the RX FIFO has data before reading it.
1270 * If the RX FIFO is empty, the function returns \ref CY_SCB_UART_RX_NO_DATA.
1271 *
1272 * \param base
1273 * The pointer to the UART SCB instance.
1274 *
1275 * \return
1276 * Data from the RX FIFO.
1277 * The data element size is defined by the configured data width.
1278 *
1279 *******************************************************************************/
Cy_SCB_UART_Get(CySCB_Type const * base)1280 __STATIC_INLINE uint32_t Cy_SCB_UART_Get(CySCB_Type const *base)
1281 {
1282 return Cy_SCB_ReadRxFifo(base);
1283 }
1284
1285
1286 /*******************************************************************************
1287 * Function Name: Cy_SCB_UART_GetArray
1288 ****************************************************************************//**
1289 *
1290 * Reads an array of data out of the UART RX FIFO.
1291 * This function does not block. It returns how many data elements were read
1292 * from the RX FIFO.
1293 *
1294 * \param base
1295 * The pointer to the UART SCB instance.
1296 *
1297 * \param buffer
1298 * The pointer to the location to place the data read from the RX FIFO.
1299 * The element size is defined by the data type, which depends on the configured
1300 * data width.
1301 *
1302 * \param size
1303 * The number of data elements to read from the RX FIFO.
1304 *
1305 * \return
1306 * The number of data elements read from the RX FIFO.
1307 *
1308 *******************************************************************************/
Cy_SCB_UART_GetArray(CySCB_Type const * base,void * buffer,uint32_t size)1309 __STATIC_INLINE uint32_t Cy_SCB_UART_GetArray(CySCB_Type const *base, void *buffer, uint32_t size)
1310 {
1311 CY_ASSERT_L1(CY_SCB_IS_BUFFER_VALID(buffer, size));
1312
1313 return Cy_SCB_ReadArray(base, buffer, size);
1314 }
1315
1316
1317 /*******************************************************************************
1318 * Function Name: Cy_SCB_UART_GetArrayBlocking
1319 ****************************************************************************//**
1320 *
1321 * Reads an array of data out of the UART RX FIFO.
1322 * This function blocks until the number of data elements specified by the
1323 * size has been read from the RX FIFO.
1324 *
1325 * \param base
1326 * The pointer to the UART SCB instance.
1327 *
1328 * \param buffer
1329 * The pointer to the location to place the data read from the RX FIFO.
1330 * The element size is defined by the data type, which depends on the configured
1331 * data width.
1332 *
1333 * \param size
1334 * The number of data elements to read from the RX FIFO.
1335 *
1336 *******************************************************************************/
Cy_SCB_UART_GetArrayBlocking(CySCB_Type const * base,void * buffer,uint32_t size)1337 __STATIC_INLINE void Cy_SCB_UART_GetArrayBlocking(CySCB_Type const *base, void *buffer, uint32_t size)
1338 {
1339 CY_ASSERT_L1(CY_SCB_IS_BUFFER_VALID(buffer, size));
1340
1341 Cy_SCB_ReadArrayBlocking(base, buffer, size);
1342 }
1343
1344
1345 /*******************************************************************************
1346 * Function Name: Cy_SCB_UART_GetRxFifoStatus
1347 ****************************************************************************//**
1348 *
1349 * Returns the current status of the RX FIFO.
1350 *
1351 * \param base
1352 * The pointer to the UART SCB instance.
1353 *
1354 * \return
1355 * \ref group_scb_uart_macros_rx_fifo_status
1356 *
1357 *******************************************************************************/
Cy_SCB_UART_GetRxFifoStatus(CySCB_Type const * base)1358 __STATIC_INLINE uint32_t Cy_SCB_UART_GetRxFifoStatus(CySCB_Type const *base)
1359 {
1360 return (Cy_SCB_GetRxInterruptStatus(base) & CY_SCB_UART_RX_INTR_MASK);
1361 }
1362
1363
1364 /*******************************************************************************
1365 * Function Name: Cy_SCB_UART_ClearRxFifoStatus
1366 ****************************************************************************//**
1367 *
1368 * Clears the selected statuses of the RX FIFO.
1369 *
1370 * \param base
1371 * The pointer to the UART SCB instance.
1372 *
1373 * \param clearMask
1374 * The mask whose statuses to clear.
1375 * See \ref group_scb_uart_macros_rx_fifo_status for the set of constants.
1376 *
1377 * \note
1378 * * This status is also used for interrupt generation, so clearing it also
1379 * clears the interrupt sources.
1380 * * Level-sensitive statuses such as \ref CY_SCB_UART_RX_TRIGGER,
1381 * \ref CY_SCB_UART_RX_NOT_EMPTY and \ref CY_SCB_UART_RX_FULL are set high again after
1382 * being cleared if the condition remains true.
1383 *
1384 *******************************************************************************/
Cy_SCB_UART_ClearRxFifoStatus(CySCB_Type * base,uint32_t clearMask)1385 __STATIC_INLINE void Cy_SCB_UART_ClearRxFifoStatus(CySCB_Type *base, uint32_t clearMask)
1386 {
1387 CY_ASSERT_L2(CY_SCB_IS_INTR_VALID(clearMask, CY_SCB_UART_RX_INTR_MASK));
1388
1389 Cy_SCB_ClearRxInterrupt(base, clearMask);
1390 }
1391
1392
1393 /*******************************************************************************
1394 * Function Name: Cy_SCB_UART_GetNumInRxFifo
1395 ****************************************************************************//**
1396 *
1397 * Returns the number of data elements in the UART RX FIFO.
1398 *
1399 * \param base
1400 * The pointer to the UART SCB instance.
1401 *
1402 * \return
1403 * The number of data elements in the RX FIFO.
1404 * The size of date element defined by the configured data width.
1405 *
1406 *******************************************************************************/
Cy_SCB_UART_GetNumInRxFifo(CySCB_Type const * base)1407 __STATIC_INLINE uint32_t Cy_SCB_UART_GetNumInRxFifo(CySCB_Type const *base)
1408 {
1409 return Cy_SCB_GetNumInRxFifo(base);
1410 }
1411
1412 /*******************************************************************************
1413 * Function Name: Cy_SCB_UART_ClearRxFifo
1414 ****************************************************************************//**
1415 *
1416 * Clears all data out of the UART RX FIFO.
1417 *
1418 * \param base
1419 * The pointer to the UART SCB instance.
1420 *
1421 * \sideeffect
1422 * Any data currently in the shifter is cleared and lost.
1423 *
1424 *******************************************************************************/
Cy_SCB_UART_ClearRxFifo(CySCB_Type * base)1425 __STATIC_INLINE void Cy_SCB_UART_ClearRxFifo(CySCB_Type *base)
1426 {
1427 Cy_SCB_ClearRxFifo(base);
1428 }
1429
1430
1431 /*******************************************************************************
1432 * Function Name: Cy_SCB_UART_Put
1433 ****************************************************************************//**
1434 *
1435 * Places a single data element in the UART TX FIFO.
1436 * This function does not block and returns how many data elements were placed
1437 * in the TX FIFO.
1438 *
1439 * \param base
1440 * The pointer to the UART SCB instance.
1441 *
1442 * \param data
1443 * Data to put in the TX FIFO.
1444 * The element size is defined by the data type, which depends on the configured
1445 * data width.
1446 *
1447 * \return
1448 * The number of data elements placed in the TX FIFO: 0 or 1.
1449 *
1450 *******************************************************************************/
Cy_SCB_UART_Put(CySCB_Type * base,uint32_t data)1451 __STATIC_INLINE uint32_t Cy_SCB_UART_Put(CySCB_Type *base, uint32_t data)
1452 {
1453 return Cy_SCB_Write(base, data);
1454 }
1455
1456
1457 /*******************************************************************************
1458 * Function Name: Cy_SCB_UART_PutArray
1459 ****************************************************************************//**
1460 *
1461 * Places an array of data in the UART TX FIFO.
1462 * This function does not block. It returns how many data elements were
1463 * placed in the TX FIFO.
1464 *
1465 * \param base
1466 * The pointer to the UART SCB instance.
1467 *
1468 * \param buffer
1469 * The pointer to data to place in the TX FIFO.
1470 * The element size is defined by the data type, which depends on the configured
1471 * TX data width.
1472 *
1473 * \param size
1474 * The number of data elements to TX.
1475 *
1476 * \return
1477 * The number of data elements placed in the TX FIFO.
1478 *
1479 *******************************************************************************/
Cy_SCB_UART_PutArray(CySCB_Type * base,void * buffer,uint32_t size)1480 __STATIC_INLINE uint32_t Cy_SCB_UART_PutArray(CySCB_Type *base, void *buffer, uint32_t size)
1481 {
1482 CY_ASSERT_L1(CY_SCB_IS_BUFFER_VALID(buffer, size));
1483
1484 return Cy_SCB_WriteArray(base, buffer, size);
1485 }
1486
1487
1488 /*******************************************************************************
1489 * Function Name: Cy_SCB_UART_PutArrayBlocking
1490 ****************************************************************************//**
1491 *
1492 * Places an array of data in the UART TX FIFO.
1493 * This function blocks until the number of data elements specified by the size
1494 * is placed in the TX FIFO.
1495 *
1496 * \param base
1497 * The pointer to the UART SCB instance.
1498 *
1499 * \param buffer
1500 * The pointer to data to place in the TX FIFO.
1501 * The element size is defined by the data type, which depends on the configured
1502 * data width.
1503 *
1504 * \param size
1505 * The number of data elements to write into the TX FIFO.
1506 *
1507 *******************************************************************************/
Cy_SCB_UART_PutArrayBlocking(CySCB_Type * base,void * buffer,uint32_t size)1508 __STATIC_INLINE void Cy_SCB_UART_PutArrayBlocking(CySCB_Type *base, void *buffer, uint32_t size)
1509 {
1510 CY_ASSERT_L1(CY_SCB_IS_BUFFER_VALID(buffer, size));
1511
1512 Cy_SCB_WriteArrayBlocking(base, buffer, size);
1513 }
1514
1515
1516 /*******************************************************************************
1517 * Function Name: Cy_SCB_UART_PutString
1518 ****************************************************************************//**
1519 *
1520 * Places a NULL terminated string in the UART TX FIFO.
1521 * This function blocks until the entire string is placed in the TX FIFO.
1522 *
1523 * \param base
1524 * The pointer to the UART SCB instance.
1525 *
1526 * \param string
1527 * The pointer to the null terminated string array.
1528 *
1529 *******************************************************************************/
Cy_SCB_UART_PutString(CySCB_Type * base,char_t const string[])1530 __STATIC_INLINE void Cy_SCB_UART_PutString(CySCB_Type *base, char_t const string[])
1531 {
1532 CY_ASSERT_L1(CY_SCB_IS_BUFFER_VALID(string, 1UL));
1533
1534 Cy_SCB_WriteString(base, string);
1535 }
1536
1537
1538 /*******************************************************************************
1539 * Function Name: Cy_SCB_UART_GetTxFifoStatus
1540 ****************************************************************************//**
1541 *
1542 * Returns the current status of the TX FIFO.
1543 *
1544 * \param base
1545 * The pointer to the UART SCB instance.
1546 *
1547 * \return
1548 * \ref group_scb_uart_macros_tx_fifo_status
1549 *
1550 *******************************************************************************/
Cy_SCB_UART_GetTxFifoStatus(CySCB_Type const * base)1551 __STATIC_INLINE uint32_t Cy_SCB_UART_GetTxFifoStatus(CySCB_Type const *base)
1552 {
1553 return (Cy_SCB_GetTxInterruptStatus(base) & CY_SCB_UART_TX_INTR_MASK);
1554 }
1555
1556
1557 /*******************************************************************************
1558 * Function Name: Cy_SCB_UART_ClearTxFifoStatus
1559 ****************************************************************************//**
1560 *
1561 * Clears the selected statuses of the TX FIFO.
1562 *
1563 * \param base
1564 * The pointer to the UART SCB instance.
1565 *
1566 * \param clearMask
1567 * The mask whose statuses to clear.
1568 * See \ref group_scb_uart_macros_tx_fifo_status for the set of constants.
1569 *
1570 * \note
1571 * * The status is also used for interrupt generation, so clearing it also
1572 * clears the interrupt sources.
1573 * * Level-sensitive statuses such as \ref CY_SCB_UART_TX_TRIGGER,
1574 * \ref CY_SCB_UART_TX_EMPTY and \ref CY_SCB_UART_TX_NOT_FULL are set high again after
1575 * being cleared if the condition remains true.
1576 *
1577 *******************************************************************************/
Cy_SCB_UART_ClearTxFifoStatus(CySCB_Type * base,uint32_t clearMask)1578 __STATIC_INLINE void Cy_SCB_UART_ClearTxFifoStatus(CySCB_Type *base, uint32_t clearMask)
1579 {
1580 CY_ASSERT_L2(CY_SCB_IS_INTR_VALID(clearMask, CY_SCB_UART_TX_INTR_MASK));
1581
1582 Cy_SCB_ClearTxInterrupt(base, clearMask);
1583 }
1584
1585
1586 /*******************************************************************************
1587 * Function Name: Cy_SCB_UART_GetNumInTxFifo
1588 ****************************************************************************//**
1589 *
1590 * Returns the number of data elements in the UART TX FIFO.
1591 *
1592 * \param base
1593 * The pointer to the UART SCB instance.
1594 *
1595 * \return
1596 * The number of data elements in the TX FIFO.
1597 * The size of date element defined by the configured data width.
1598 *
1599 * \note
1600 * This number does not include any data currently in the TX shifter.
1601 *
1602 *******************************************************************************/
Cy_SCB_UART_GetNumInTxFifo(CySCB_Type const * base)1603 __STATIC_INLINE uint32_t Cy_SCB_UART_GetNumInTxFifo(CySCB_Type const *base)
1604 {
1605 return Cy_SCB_GetNumInTxFifo(base);
1606 }
1607
1608
1609 /*******************************************************************************
1610 * Function Name: Cy_SCB_UART_IsTxComplete
1611 ****************************************************************************//**
1612 *
1613 * Checks whether the TX FIFO and Shifter are empty and there is no more data to send
1614 *
1615 * \param base
1616 * Pointer to the UART SCB instance.
1617 *
1618 * \return
1619 * If true, transmission complete. If false, transmission is not complete.
1620 *
1621 *******************************************************************************/
Cy_SCB_UART_IsTxComplete(CySCB_Type const * base)1622 __STATIC_INLINE bool Cy_SCB_UART_IsTxComplete(CySCB_Type const *base)
1623 {
1624 return Cy_SCB_IsTxComplete(base);
1625 }
1626
1627
1628 /*******************************************************************************
1629 * Function Name: Cy_SCB_UART_ClearTxFifo
1630 ****************************************************************************//**
1631 *
1632 * Clears all data out of the UART TX FIFO.
1633 *
1634 * \param base
1635 * The pointer to the UART SCB instance.
1636 *
1637 * \sideeffect
1638 * The TX FIFO clear operation also clears the shift register, so that
1639 * the shifter could be cleared in the middle of a data element transfer,
1640 * corrupting it. The data element corruption means that all bits that have
1641 * not been transmitted are transmitted as 1s on the bus.
1642 *
1643 *******************************************************************************/
Cy_SCB_UART_ClearTxFifo(CySCB_Type * base)1644 __STATIC_INLINE void Cy_SCB_UART_ClearTxFifo(CySCB_Type *base)
1645 {
1646 Cy_SCB_ClearTxFifo(base);
1647 }
1648 /** \} group_scb_uart_low_level_functions */
1649
1650 /**
1651 * \addtogroup group_scb_uart_interrupt_functions
1652 * \{
1653 */
1654 /*******************************************************************************
1655 * Function Name: Cy_SCB_UART_RegisterCallback
1656 ****************************************************************************//**
1657 *
1658 * Registers a callback function that notifies that
1659 * \ref group_scb_uart_macros_callback_events occurred in the
1660 * \ref Cy_SCB_UART_Interrupt.
1661 *
1662 * \param base
1663 * The pointer to the UART SCB instance.
1664 *
1665 * \param callback
1666 * The pointer to the callback function.
1667 * See \ref cy_cb_scb_uart_handle_events_t for the function prototype.
1668 *
1669 * \param context
1670 * The pointer to the context structure \ref cy_stc_scb_uart_context_t allocated
1671 * by the user. The structure is used during the UART operation for internal
1672 * configuration and data retention. The user should not modify anything
1673 * in this structure.
1674 *
1675 * \note
1676 * To remove the callback, pass NULL as the pointer to the callback function.
1677 *
1678 *******************************************************************************/
Cy_SCB_UART_RegisterCallback(CySCB_Type const * base,cy_cb_scb_uart_handle_events_t callback,cy_stc_scb_uart_context_t * context)1679 __STATIC_INLINE void Cy_SCB_UART_RegisterCallback(CySCB_Type const *base,
1680 cy_cb_scb_uart_handle_events_t callback, cy_stc_scb_uart_context_t *context)
1681 {
1682 /* Suppress a compiler warning about unused variables */
1683 (void) base;
1684
1685 context->cbEvents = callback;
1686 }
1687 /** \} group_scb_uart_interrupt_functions */
1688
1689 #if defined(__cplusplus)
1690 }
1691 #endif
1692
1693 /** \} group_scb_uart */
1694
1695 #endif /* (CY_IP_MXSCB) */
1696
1697 #endif /* (CY_SCB_UART_H) */
1698 /* [] END OF FILE */
1699
