1 /***************************************************************************//**
2 * \file cy_sar2.h
3 * \version 1.1
4 *
5 * Provides an API declaration of the SAR2 driver
6 *
7 *******************************************************************************
8 * \copyright
9 * (c) (2022), Cypress Semiconductor Corporation (an Infineon company) or
10 * an affiliate of Cypress Semiconductor Corporation. All rights reserved.
11 *******************************************************************************
12 * You may use this file only in accordance with the license, terms, conditions,
13 * disclaimers, and limitations in the end user license agreement accompanying
14 * the software package with which this file was provided.
15 *******************************************************************************/
16
17 /**
18 * \addtogroup group_sar2
19 * \{
20 * The SAR2 driver provides an API to configure the SAR2 ADC.
21 * The SAR2 has up to 4 ADCs and up to 32 channels for each ADC module. About
22 * actual number of supported modules and channels, refer to the technical
23 * reference manual (TRM) and device datasheet.
24 *
25 * \section group_sar2_configuration Configuration Considerations
26 * Typical usage:
27 * - Call Cy_SAR2_Init to initialize the ADC module and its channels
28 * - Call Cy_SAR2_Channel_SetInterruptMask if you need to use the interrupt.
29 * After initializing channel(s) call, trigger a call by the software
30 * (calling Cy_SAR2_Channel_SoftwareTrigger) or start a peripheral
31 * configured for the HW trigger.
32 *
33 \note It is not recommended to set the triggerSelection structure member
34 * of the \ref cy_stc_sar2_channel_config_t to CY_SAR2_TRIGGER_CONTINUOUS if
35 * cy_en_sar2_preemption_type_t is set to CY_SAR2_PREEMPTION_ABORT_CANCEL.
36 * It may work to the effect that the channel or channel group will not be able
37 * to complete without advanced priority tuning.
38 * \par
39 *
40 * \note If you use an interrupt for ADC, create an interrupt handler
41 * and register it by using the sysint module. In the handler, you can check
42 * which interrupt is occurred by Cy_SAR2_Channel_GetInterruptStatusMasked
43 * and can get the conversion result by Cy_SAR2_Channel_GetResult.
44 * If you do not use the interrupt, you can poll the conversion status by
45 * Cy_SAR2_Channel_GetInterruptStatus.
46 * For both of polling and interrupt, clear the interrupt flags by
47 * Cy_SAR2_Channel_ClearInterrupt after handling data.
48 * \par
49 *
50 * \note SAR2 block can operate in Active or Sleep mode only.
51 *
52 * \subsection group_sar2_config Configuration Example
53 * First step would be to configure clock:
54 *
55 * \snippet sar2/snippet/main.c SNIPPET_CLOCK_INIT
56 *
57 * Group of two SAR2 ADC channels are configured, one for bandgap voltage
58 * and one for the AN0 analogue input:
59 *
60 * \snippet sar2/snippet/main.c SNIPPET_SAR2_CONFIG
61 *
62 * \subsection group_sar2_init Initialization
63 *
64 * \snippet sar2/snippet/main.c SNIPPET_SAR2_INIT
65 *
66 * \subsection group_sar2_result Obtaining results in counts
67 *
68 * \snippet sar2/snippet/main.c SNIPPET_SAR2_GET_RESULT
69 *
70 * \subsection group_sar2_calc_volts Calculating results in V, mV or uV
71 *
72 * \snippet sar2/snippet/main.c SNIPPET_SAR2_CALC_VOLTS
73 *
74 * \subsection group_sar2_die_temperature Die temperature
75 *
76 * \snippet sar2/snippet/main.c SNIPPET_SAR2_DIE_TEMPERATURE
77 *
78 * Once done, in the variable, returned by the
79 * \ref Cy_SAR2_CalculateDieTemperature function will contain the die temperature
80 * value in Celsius degrees.
81 *
82 * The accuracy can be increased by executing the calibration procedure
83 * (see \ref group_sar2_calibration section) before doing the conversion.
84 *
85 * In the function call, the first argument is the enumeration value,
86 * representing the VDDA value range supplied to this particular chip being used,
87 * see \ref cy_en_sar2_vdda_range_t.
88 *
89 * \subsection group_sar2_channel_grouping Channel grouping
90 * The SAR2 driver supports the channel grouping. Each channel can be either in
91 * an individual group or in a group of 2 or more channels. By default, the
92 * hardware will execute the next channel if it exists and is in the Enabled
93 * state if the current channel does not have the flag 'Group End' set. You can
94 * set triggers to start either the first channel or any channel of the group to
95 * execute all the next channels.
96 *
97 * \section group_sar2_more_information More Information
98 * Refer to the technical reference manual (TRM) and the device datasheet.
99 *
100 * \section group_sar2_changelog Changelog
101 * <table class="doxtable">
102 * <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
103 * <tr>
104 * <td>1.1</td>
105 * <td>Adding support for devices with up to 3 SAR slices.</td>
106 * <td></td>
107 * </tr>
108 * <tr>
109 * <td>1.0</td>
110 * <td>Initial version</td>
111 * <td></td>
112 * </tr>
113 * </table>
114 *
115 * \defgroup group_sar2_macro Macros
116 * \{
117 * \defgroup group_sar2_macros_interrupt Interrupt Masks
118 * \defgroup group_sar2_macros_status Status Masks
119 * \}
120 * \defgroup group_sar2_functions Functions
121 * \defgroup group_sar2_data_structures Data structures
122 * \defgroup group_sar2_enums Enumerated Types
123 * \defgroup group_sar2_calibration Calibration procedure
124 *
125 * \n
126 * \addtogroup group_sar2_calibration
127 * \{
128 * To start the procedure, perform \ref group_sar2_config and
129 * \ref group_sar2_init with included extra channel, which can be re-used
130 * after this procedure is complete:
131 * \snippet sar2/snippet/main.c SNIPPET_CALIB_CH_INIT
132 * The ADC has an offset adjustment function to compensate for offset error.
133 * It is possible to select code from +127 to -128 in a dec. for analog
134 * calibration.
135 * \n
136 * The offset adjustment step is a quarter of 1LSb. \n
137 * Offset = max( 0, min( 4095, floor( VIN/VREFH x 4096 + OFST/4 ) ) )
138 * \image html sar2_offset_calibration.png
139 * \note Enable reference buffer mode using \ref Cy_SAR2_SetReferenceBufferMode
140 * function.
141 *
142 * \n
143 * Following code snippet can be used:
144 * \snippet sar2/snippet/main.c SNIPPET_SAR2_OFFSET_CALIBRATION
145 *
146 * After that, the Gain should also be calibrated as well.
147 * The ADC has a gain adjustment function to compensate for gain error.
148 * It is possible to set code from +15 to -15 dec.
149 * The gain adjustment step is a quarter of 1LSb. \n
150 * Gain = max(0, min(4095, floor((4096 - GAIN)/VREFH x (VIN - VREFH/2) + 2048)))
151 * \image html sar2_gain_calibration.png
152 * \snippet sar2/snippet/main.c SNIPPET_SAR2_GAIN_CALIBRATION
153 * \n
154 * Once done, the calibrationConfig global structure contains calibration data
155 * for SAR2 block 0. Calibration is advised to be done as frequent as possible.
156 * \}
157 */
158
159
160 #if !defined(CY_SAR2_H)
161 #define CY_SAR2_H
162
163 #include <stdint.h>
164 #include <stdbool.h>
165 #include <stddef.h>
166 #include <math.h>
167 #include "cy_syslib.h"
168 #include "cy_utils.h"
169 #include "cy_device.h"
170
171 #if defined (CY_IP_MXS40EPASS_ESAR)
172
173 #if defined(__cplusplus)
174 extern "C" {
175 #endif
176
177 /***************************************
178 * Macro definitions
179 ***************************************/
180
181 /**
182 * \addtogroup group_sar2_macro
183 * \{
184 */
185
186 /** Driver major version */
187 #define CY_SAR2_DRV_VERSION_MAJOR 1
188
189 /** Driver minor version */
190 #define CY_SAR2_DRV_VERSION_MINOR 1
191
192 /** Sar2 driver ID */
193 #define CY_SAR2_ID CY_PDL_DRV_ID(0x4BUL)
194
195 /** Number of input triggers */
196 #define CY_SAR2_TR_IN_NUM (5UL)
197
198 /** Number of output triggers */
199 #define CY_SAR2_TR_OUT_NUM (2UL)
200
201 /** Maximum generic input trigger */
202 #define CY_SAR2_GEN_TR_IN_NUM (16UL)
203
204 /** Maximum generic output trigger */
205 #define CY_SAR2_GEN_TR_OUT_NUM (64UL)
206
207 /** Temperature matrix sixe */
208 #define CY_SAR2_TEMP_MATRIX_SIZE (3UL)
209
210 /** Channel number */
211 #define CY_SAR2_NUM_CHANNELS (32UL)
212
213 /***************************************
214 * Group status
215 ***************************************/
216 /** \addtogroup group_sar2_macros_status
217 * \{
218 */
219 /** If this bit is true, "out of range" was detected and the value was above the High threshold. */
220 #define CY_SAR2_STATUS_ABOVE (PASS_SAR_CH_RESULT_ABOVE_HI_MIR_Msk)
221
222 /** If this bit is true, the range is detected. */
223 #define CY_SAR2_STATUS_RANGE (PASS_SAR_CH_RESULT_RANGE_INTR_MIR_Msk)
224
225 /** If this bit is true, the pulse is detected. */
226 #define CY_SAR2_STATUS_PULSE (PASS_SAR_CH_RESULT_PULSE_INTR_MIR_Msk)
227
228 /** If this bit is true, the result data is valid. */
229 #define CY_SAR2_STATUS_VALID (PASS_SAR_CH_RESULT_VALID_MIR_Msk)
230
231 /** Group acquisition completed. This bit can be set for the last channel of a group if the group scan is done. */
232 #define CY_SAR2_GRP_COMPLETE (PASS_SAR_CH_GRP_STAT_GRP_COMPLETE_Msk)
233
234 /** Group Cancelled. This bit can be set for the last channel of a group if the group scan was
235 * preempted and cancelled. */
236 #define CY_SAR2_GRP_CANCELLED (PASS_SAR_CH_GRP_STAT_GRP_CANCELLED_Msk)
237
238 /** Group Overflow. This bit can be set for the last channel of a group if the group scan is
239 * done and the Done interrupt is already (still) pending. */
240 #define CY_SAR2_GRP_OVERFLOW (PASS_SAR_CH_GRP_STAT_GRP_OVERFLOW_Msk)
241
242 /** Channel Range completed. This bit can be set for each channel if the conversion result
243 * (after averaging) of that channel met the condition specified by the range detection
244 * mode settings of the channel. */
245 #define CY_SAR2_CH_RANGE_COMPLETE (PASS_SAR_CH_GRP_STAT_CH_RANGE_COMPLETE_Msk)
246
247 /** Channel Pulse completed. This bit can be set for each channel if the positive pulse counter reaches zero. */
248 #define CY_SAR2_CH_PULSE_COMPLETE (PASS_SAR_CH_GRP_STAT_CH_PULSE_COMPLETE_Msk)
249
250 /** Channel Overflow. This bit can be set for each channel if a new Pulse or Range interrupt is detected
251 * while the interrupt is still pending or when HW did not acknowledge data pickup.*/
252 #define CY_SAR2_CH_OVERFLOW (PASS_SAR_CH_GRP_STAT_CH_OVERFLOW_Msk)
253
254 /** Group acquisition busy. */
255 #define CY_SAR2_GRP_BUSY (PASS_SAR_CH_GRP_STAT_GRP_BUSY_Msk)
256
257 /** \} group_sar2_macros_status */
258
259
260 /***************************************
261 * Interrupts
262 ***************************************/
263 /** \addtogroup group_sar2_macros_interrupt
264 * \{
265 */
266 /** Group done. */
267 #define CY_SAR2_INT_GRP_DONE (PASS_SAR_CH_INTR_GRP_DONE_Msk)
268
269 /** Group cancelled. */
270 #define CY_SAR2_INT_GRP_CANCELLED (PASS_SAR_CH_INTR_GRP_CANCELLED_Msk)
271
272 /** Group overflow. */
273 #define CY_SAR2_INT_GRP_OVERFLOW (PASS_SAR_CH_INTR_GRP_OVERFLOW_Msk)
274
275 /** Channel range event. */
276 #define CY_SAR2_INT_CH_RANGE (PASS_SAR_CH_INTR_CH_RANGE_Msk)
277
278 /** Channel pulse event. */
279 #define CY_SAR2_INT_CH_PULSE (PASS_SAR_CH_INTR_CH_PULSE_Msk)
280
281 /** Channel overflow event. */
282 #define CY_SAR2_INT_CH_OVERFLOW (PASS_SAR_CH_INTR_CH_OVERFLOW_Msk)
283
284 /** Combined interrupt mask. */
285 #define CY_SAR2_INTR (CY_SAR2_INT_GRP_DONE | \
286 CY_SAR2_INT_GRP_CANCELLED | \
287 CY_SAR2_INT_GRP_OVERFLOW | \
288 CY_SAR2_INT_CH_RANGE | \
289 CY_SAR2_INT_CH_PULSE | \
290 CY_SAR2_INT_CH_OVERFLOW)
291
292 /** \} group_sar2_macros_interrupt */
293
294 /** \cond INTERNAL */
295 /** Macro that returns the channel number for a specified SAR instance. */
296 #if defined (PASS_SAR_SLICE_NR) && (PASS_SAR_SLICE_NR == 3)
297 #define CY_SAR2_CHAN_NUM(base) ((PASS0_SAR0 == (base)) ? PASS_SAR_SLICE_NR0_SAR_SAR_MUX_IN :\
298 (PASS0_SAR1 == (base)) ? PASS_SAR_SLICE_NR1_SAR_SAR_MUX_IN :\
299 PASS_SAR_SLICE_NR2_SAR_SAR_MUX_IN)
300 #elif defined (PASS_SAR_SLICE_NR) && (PASS_SAR_SLICE_NR == 2)
301 #define CY_SAR2_CHAN_NUM(base) ((PASS0_SAR0 == (base)) ? PASS_SAR_SLICE_NR0_SAR_SAR_MUX_IN :\
302 PASS_SAR_SLICE_NR1_SAR_SAR_MUX_IN)
303 #else
304 #error Number of slices determined in PASS_SAR_SLICE_NR are not supported, or PASS_SAR_SLICE_NR is not defined.
305 #endif
306
307 #define CY_SAR2_CHAN_NUM_VALID(base, channel) (CY_SAR2_CHAN_NUM(base) > (channel))
308
309 /** \endcond */
310
311 /** \} group_sar2_macro */
312
313 /***************************************
314 * Enumeration
315 ***************************************/
316
317 /**
318 * \addtogroup group_sar2_enums
319 * \{
320 */
321
322 /**
323 * SAR2 Driver error codes
324 */
325 typedef enum {
326 CY_SAR2_SUCCESS = 0x00U, /**< Returned successful */
327 CY_SAR2_BAD_PARAM = CY_SAR2_ID | CY_PDL_STATUS_ERROR | 0x01U, /**< A bad parameter was passed */
328 } cy_en_sar2_status_t;
329
330 /** When set uses 2 cycles for the Most Significant Bit (MSB). */
331 typedef enum {
332 CY_SAR2_MSB_STRETCH_MODE_1CYCLE = 0U, /**< Use 1 clock cycles per conversion. */
333 CY_SAR2_MSB_STRETCH_MODE_2CYCLE = 1U /**< Use 2 clock cycles per conversion. */
334 } cy_en_sar2_msb_stretch_mode_t;
335
336 /** The Diagnostic Reference function selection. */
337 typedef enum {
338 CY_SAR2_DIAG_REFERENCE_SELECT_VREFL = 0U, /**< DiagOut = VrefL */
339 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_1DIV8 = 1U, /**< DiagOut = VrefH * 1/8 */
340 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_2DIV8 = 2U, /**< DiagOut = VrefH * 2/8 */
341 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_3DIV8 = 3U, /**< DiagOut = VrefH * 3/8 */
342 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_4DIV8 = 4U, /**< DiagOut = VrefH * 4/8 */
343 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_5DIV8 = 5U, /**< DiagOut = VrefH * 5/8 */
344 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_6DIV8 = 6U, /**< DiagOut = VrefH * 6/8 */
345 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_7DIV8 = 7U, /**< DiagOut = VrefH * 7/8 */
346 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH = 8U, /**< DiagOut = VrefH */
347 CY_SAR2_DIAG_REFERENCE_SELECT_VREFX = 9U, /**< DiagOut = VrefX = VrefH * 199/200 */
348 CY_SAR2_DIAG_REFERENCE_SELECT_VBG = 10U, /**< DiagOut = Vbg from SRSS */
349 CY_SAR2_DIAG_REFERENCE_SELECT_VIN1 = 11U, /**< DiagOut = Vin1 */
350 CY_SAR2_DIAG_REFERENCE_SELECT_VIN2 = 12U, /**< DiagOut = Vin2 */
351 CY_SAR2_DIAG_REFERENCE_SELECT_VIN3 = 13U, /**< DiagOut = Vin3 */
352 CY_SAR2_DIAG_REFERENCE_SELECT_I_SOURCE = 14U, /**< DiagOut = Isource (10uA) */
353 CY_SAR2_DIAG_REFERENCE_SELECT_I_SINK = 15U /**< DiagOut = Isink (10uA) */
354 } cy_en_sar2_diag_reference_select_t;
355
356 /** The SAR2 trigger mode selection. */
357 typedef enum {
358 CY_SAR2_TRIGGER_OFF = 0U, /**< Use for channels in group, except the first channel */
359 CY_SAR2_TRIGGER_TCPWM = 1U, /**< Trigger from corresponding TCPWM channel */
360 CY_SAR2_TRIGGER_GENERIC0 = 2U, /**< Generic trigger input 0 */
361 CY_SAR2_TRIGGER_GENERIC1 = 3U, /**< Generic trigger input 1 */
362 CY_SAR2_TRIGGER_GENERIC2 = 4U, /**< Generic trigger input 2 */
363 CY_SAR2_TRIGGER_GENERIC3 = 5U, /**< Generic trigger input 3 */
364 CY_SAR2_TRIGGER_GENERIC4 = 6U, /**< Generic trigger input 4 */
365 CY_SAR2_TRIGGER_CONTINUOUS = 7U /**< Always triggered (also called idle), can only be used for at most 1 channel */
366 } cy_en_sar2_trigger_selection_t;
367
368 /** The SAR2 ADC preemption type selection. */
369 typedef enum {
370 CY_SAR2_PREEMPTION_ABORT_CANCEL = 0U, /**< Abort the ongoing acquisition, does not return. */
371 CY_SAR2_PREEMPTION_ABORT_RESTART = 1U, /**< Abort ongoing acquisition, up on return Restart
372 group from the first channel. */
373 CY_SAR2_PREEMPTION_ABORT_RESUME = 2U, /**< Abort the ongoing acquisition, up on return Resume group from
374 the aborted channel. */
375 CY_SAR2_PREEMPTION_FINISH_RESUME = 3U /**< Completed ongoing acquisition (including averaging), up on return
376 Resume group from the next channel. */
377 } cy_en_sar2_preemption_type_t;
378
379 /** Conversion done, trigger output selection. */
380 typedef enum {
381 CY_SAR2_DONE_LEVEL_PULSE = 0U, /**< The conversion done signal for other IPs is a 2-cycle pulse (clk_sys), no need
382 to read the result register. Typically used for triggering another IPs other
383 than DW. */
384 CY_SAR2_DONE_LEVEL_LEVEL = 1U /**< The conversion done signal for other IPs is the level output until the result
385 register is read. Typically used for DW and also overflowed? detection. */
386 } cy_en_sar2_done_level_t;
387
388 /** The address of the analog signal (pin) to be sampled by a corresponding channel. */
389 typedef enum {
390 CY_SAR2_PIN_ADDRESS_AN0 = 0U, /**< Vout = AN0, select the corresponding analog input. */
391 CY_SAR2_PIN_ADDRESS_AN1 = 1U,
392 CY_SAR2_PIN_ADDRESS_AN2 = 2U,
393 CY_SAR2_PIN_ADDRESS_AN3 = 3U,
394 CY_SAR2_PIN_ADDRESS_AN4 = 4U,
395 CY_SAR2_PIN_ADDRESS_AN5 = 5U,
396 CY_SAR2_PIN_ADDRESS_AN6 = 6U,
397 CY_SAR2_PIN_ADDRESS_AN7 = 7U,
398 CY_SAR2_PIN_ADDRESS_AN8 = 8U,
399 CY_SAR2_PIN_ADDRESS_AN9 = 9U,
400 CY_SAR2_PIN_ADDRESS_AN10 = 10U,
401 CY_SAR2_PIN_ADDRESS_AN11 = 11U,
402 CY_SAR2_PIN_ADDRESS_AN12 = 12U,
403 CY_SAR2_PIN_ADDRESS_AN13 = 13U,
404 CY_SAR2_PIN_ADDRESS_AN14 = 14U,
405 CY_SAR2_PIN_ADDRESS_AN15 = 15U,
406 CY_SAR2_PIN_ADDRESS_AN16 = 16U,
407 CY_SAR2_PIN_ADDRESS_AN17 = 17U,
408 CY_SAR2_PIN_ADDRESS_AN18 = 18U,
409 CY_SAR2_PIN_ADDRESS_AN19 = 19U,
410 CY_SAR2_PIN_ADDRESS_AN20 = 20U,
411 CY_SAR2_PIN_ADDRESS_AN21 = 21U,
412 CY_SAR2_PIN_ADDRESS_AN22 = 22U,
413 CY_SAR2_PIN_ADDRESS_AN23 = 23U,
414 CY_SAR2_PIN_ADDRESS_AN24 = 24U,
415 CY_SAR2_PIN_ADDRESS_AN25 = 25U,
416 CY_SAR2_PIN_ADDRESS_AN26 = 26U,
417 CY_SAR2_PIN_ADDRESS_AN27 = 27U,
418 CY_SAR2_PIN_ADDRESS_AN28 = 28U,
419 CY_SAR2_PIN_ADDRESS_AN29 = 29U,
420 CY_SAR2_PIN_ADDRESS_AN30 = 30U,
421 CY_SAR2_PIN_ADDRESS_AN31 = 31U,
422 CY_SAR2_PIN_ADDRESS_VMOTOR = 32U, /**< Vout = Vmotor, select the motor input. */
423 CY_SAR2_PIN_ADDRESS_VAUX = 33U, /**< Vout = Vaux, select the auxiliarly input. */
424 CY_SAR2_PIN_ADDRESS_AMUXBUS_A = 34U, /**< Vout = AmuxbusA. */
425 CY_SAR2_PIN_ADDRESS_AMUXBUS_B = 35U, /**< Vout = AmuxbusB. */
426 CY_SAR2_PIN_ADDRESS_VCCD = 36U, /**< Vout = Vccd. */
427 CY_SAR2_PIN_ADDRESS_VDDA = 37U, /**< Vout = Vdda. */
428 CY_SAR2_PIN_ADDRESS_VBG = 38U, /**< Vout = Vbg, Bandgap voltage from SRSS. */
429 CY_SAR2_PIN_ADDRESS_VTEMP = 39U, /**< Vout = Vtemp, select the temperature sensor.
430 Ensure that only 1 ADC is allowed to use this. */
431 CY_SAR2_PIN_ADDRESS_VREF_L = 62U, /**< Vout = VrefL (VrefL actually bypasses the SARMUX (XSL)). */
432 CY_SAR2_PIN_ADDRESS_VREF_H = 63U /**< Vout = VrefH (VrefH actually bypasses the SARMUX (XSH)) */
433 } cy_en_sar2_pin_address_t;
434
435 /** The physical port. This field is only valid for the SAR2 ADC0 block. */
436 typedef enum {
437 CY_SAR2_PORT_ADDRESS_SARMUX0 = 0U, /**< ADC uses its own SARMUX. */
438 CY_SAR2_PORT_ADDRESS_SARMUX1 = 1U, /**< ADC0 uses SARMUX1 (only valid for ADC0,
439 undefined result if used for ADC1-3). */
440 CY_SAR2_PORT_ADDRESS_SARMUX2 = 2U, /**< ADC0 uses SARMUX2 (only valid for ADC0,
441 undefined result if used for ADC1-3). */
442 CY_SAR2_PORT_ADDRESS_SARMUX3 = 3U /**< ADC0 uses SARMUX3 (only valid for ADC0,
443 undefined result if used for ADC1-3). */
444 } cy_en_sar2_port_address_t;
445
446 /** Preconditioning mode selection.
447 Preconditioning charges or discharges the SAR sample capacitor to the selected reference voltage for precondition
448 time (global) cycles, a break before a make cycle will be inserted before sampling starts the sample time.
449 See also \ref cy_stc_sar2_config_t */
450 typedef enum {
451 CY_SAR2_PRECONDITION_MODE_OFF = 0U, /**< No preconditioning. */
452 CY_SAR2_PRECONDITION_MODE_VREFL = 1U, /**< Discharge to VREFL. */
453 CY_SAR2_PRECONDITION_MODE_VREFH = 2U, /**< Charge to VREFH. */
454 CY_SAR2_PRECONDITION_MODE_DIAG = 3U /**< Connect the Diagnostic reference output during preconditioning.
455 Configure the Diagnostic reference to output
456 the reference voltage. */
457 } cy_en_sar2_precondition_mode_t;
458
459 /** Overlap mode or SARMUX Diagnostics selection, in both cases only used when the Diagnostic reference is used. */
460 typedef enum {
461 CY_SAR2_OVERLAP_DIAG_MODE_OFF = 0U, /**< No overlap or SARMUX Diagnostics. */
462 CY_SAR2_OVERLAP_DIAG_MODE_HALF = 1U, /**< Sample the selected analog input for 2 sample time periods.
463 During the first period, use the overlap sampling,
464 i.e. connect both the analog input and Diagnostic reference.
465 During the second period only connect the analog input */
466 CY_SAR2_OVERLAP_DIAG_MODE_FULL = 2U, /**< The selected analog input for a single sample
467 time period is like a normal sample but use the overlap sampling,
468 i.e. connect both the analog input and Diagnostic reference. */
469 CY_SAR2_OVERLAP_DIAG_MODE_MUX_DIAG = 3U /**< Select Diagnostic reference instead of analog signal at the
470 input of the SARMUX. This enables a functional safety check
471 of the SARMUX analog connections. */
472 } cy_en_sar2_overlap_diag_mode_t;
473
474 /** Calibration values selection. */
475 typedef enum {
476 CY_SAR2_CALIBRATION_VALUE_REGULAR = 0U, /**< Use regular calibration values */
477 CY_SAR2_CALIBRATION_VALUE_ALTERNATE = 1U /**< Use alternate calibration values */
478 } cy_en_sar2_calibration_value_select_t;
479
480
481 /** Post processing mode selection. */
482 typedef enum {
483 CY_SAR2_POST_PROCESSING_MODE_NONE = 0U, /**< No post processing. */
484 CY_SAR2_POST_PROCESSING_MODE_AVG = 1U, /**< Averaging. */
485 CY_SAR2_POST_PROCESSING_MODE_AVG_RANGE = 2U, /**< Averaging followed by Range detect. */
486 CY_SAR2_POST_PROCESSING_MODE_RANGE = 3U, /**< Range detect. */
487 CY_SAR2_POST_PROCESSING_MODE_RANGE_PULSE = 4U, /**< Range detect followed by pulse detect. */
488 } cy_en_sar2_post_processing_mode_t;
489
490 /** Result data alignment selection. */
491 typedef enum {
492 CY_SAR2_RESULT_ALIGNMENT_RIGHT = 0U, /**< The data is right aligned in result[11:0], with sign extension
493 to 16 bits if enabled. */
494 CY_SAR2_RESULT_ALIGNMENT_LEFT = 1U, /**< The data shifts left in result[15:4] with the
495 lower nibble 0. Caveat if the result is more than 12 bits
496 (e.g. after averaging), then the bits above 12 will be
497 discarded. */
498
499 } cy_en_sar2_result_alignment_t;
500
501 /** Select whether result data is signed or unsigned. */
502 typedef enum {
503 CY_SAR2_SIGN_EXTENTION_UNSIGNED = 0U, /**< Result data is unsigned (zero-extended if needed). */
504 CY_SAR2_SIGN_EXTENTION_SIGNED = 1U, /**< Result data is signed (sign-extended if needed). */
505 } cy_en_sar2_sign_extention_t;
506
507 /** Range detection mode selection. */
508 typedef enum {
509 CY_SAR2_RANGE_DETECTION_MODE_BELOW_LO = 0U, /**< Below Low threshold (result < Lo) */
510 CY_SAR2_RANGE_DETECTION_MODE_INSIDE_RANGE = 1U, /**< Inside range (Lo <= result < Hi) */
511 CY_SAR2_RANGE_DETECTION_MODE_ABOVE_HI = 2U, /**< Above high threshold (Hi <= result) */
512 CY_SAR2_RANGE_DETECTION_MODE_OUTSIDE_RANGE = 3U /**< Outside range (result < Lo || Hi <= result) */
513 } cy_en_sar2_range_detection_mode_t;
514
515 /** Reference buffer mode selection. */
516 typedef enum {
517 CY_SAR2_REF_BUF_MODE_OFF = 0U, /**< No reference mode selected */
518 CY_SAR2_REF_BUF_MODE_ON = 1U, /**< Reference buffered Vbg from SRSS */
519 CY_SAR2_REF_BUF_MODE_BYPASS = 3U, /**< Reference unbuffered Vbg from SRSS */
520 } cy_en_sar2_ref_buf_mode_t;
521
522 /** VDDA voltage range selection. */
523 typedef enum {
524 CY_SAR2_VDDA_2_7V_TO_4_5V = 0U, /**< The Vdda is in range from 2.7 to 4.5 V */
525 CY_SAR2_VDDA_4_5V_TO_5_5V = 1U, /**< The Vdda is in range from 4.5 to 5.5 V */
526 } cy_en_sar2_vdda_range_t;
527
528 /** \} group_sar2_enums */
529
530 /***************************************
531 * Configuration Structure
532 ***************************************/
533 /**
534 * \addtogroup group_sar2_data_structures
535 * \{
536 */
537
538 /** Configuration structure of the SAR2 ADC channel */
539 typedef struct {
540 bool channelHwEnable; /**< If HW is started, or just configured. */
541 cy_en_sar2_trigger_selection_t triggerSelection; /**< The ADC trigger mode selection,
542 see \ref cy_en_sar2_trigger_selection_t */
543 uint8_t channelPriority; /**< Channel priority. 0=highest, 7=lowest.*/
544 cy_en_sar2_preemption_type_t preenptionType; /**< The ADC preemption type selection,
545 see \ref cy_en_sar2_preemption_type_t */
546 bool isGroupEnd; /**< This value indicates that this channel is the last
547 channel of a group or not */
548 cy_en_sar2_done_level_t doneLevel; /**< Conversion done, trigger output selection,
549 see \ref cy_en_sar2_done_level_t */
550 cy_en_sar2_pin_address_t pinAddress; /**< The address of the analog signal (pin) to be sampled by
551 a corresponding channel,
552 see \ref cy_en_sar2_pin_address_t */
553 cy_en_sar2_port_address_t portAddress; /**< Select the physical port,
554 see \ref cy_en_sar2_port_address_t */
555 uint8_t extMuxSelect; /**< External analog mux selection. */
556 bool extMuxEnable; /**< External analog mux enable. */
557 cy_en_sar2_precondition_mode_t preconditionMode; /**< Select Preconditioning mode,
558 see \ref cy_en_sar2_precondition_mode_t */
559 cy_en_sar2_overlap_diag_mode_t overlapDiagMode; /**< Select Overlap mode or SARMUX Diagnostics,
560 see \ref cy_en_sar2_overlap_diag_mode_t */
561 uint16_t sampleTime; /**< Sample time (aperture) in ADC clock cycles.
562 The minimum is 1 (0 gives the same result as 1),
563 the minimum time needed for the proper settling is at
564 least 300ns, i.e. 6 clock cycles at the max frequency of
565 20MHz. */
566 cy_en_sar2_calibration_value_select_t calibrationValueSelect; /**< Select calibration values, see
567 \ref cy_en_sar2_calibration_value_select_t */
568 cy_en_sar2_result_alignment_t resultAlignment; /**< Select the result data alignment,
569 see \ref cy_en_sar2_result_alignment_t */
570 cy_en_sar2_sign_extention_t signExtention; /**< Select whether the result data is signed or unsigned,
571 see \ref cy_en_sar2_sign_extention_t */
572 cy_en_sar2_post_processing_mode_t postProcessingMode; /**< Select Post processing mode == ,
573 see \ref cy_en_sar2_post_processing_mode_t */
574 uint16_t averageCount; /**< Averaging count. Active only if post processing mode
575 is set to Averaging or Averaging + Range detect.
576 The valid range is [1..256] */
577 uint8_t rightShift; /**< Shift Right. When using post processing mode with
578 averaging, the set value is used for the right-shift
579 value of the conversion result. Averaging data may be
580 over 12 bits, therefore the user must ensure the
581 conversion result is not to over 12 bits by using
582 this value. This value is also used to fit the 12-bit
583 result in 8 bits. The valid range is [0..15]*/
584 uint16_t positiveReload; /**< Positive pulse reload value. Active only if
585 post processing is set to the Pulse detection.
586 The valid range is [0..255]. */
587 uint8_t negativeReload; /**< Negative pulse reload value. Active only if
588 post processing is set to the Pulse detection.
589 The valid range is [0..31]. */
590 cy_en_sar2_range_detection_mode_t rangeDetectionMode; /**< Select Range detection mode,
591 see \ref cy_en_sar2_range_detection_mode_t */
592 uint16_t rangeDetectionLoThreshold; /**< Range detect low threshold (Lo) */
593 uint16_t rangeDetectionHiThreshold; /**< Range detect high threshold (Hi) */
594 uint32_t interruptMask; /**< Select the interrupt sources.
595 See \ref group_sar2_macros_interrupt */
596
597 } cy_stc_sar2_channel_config_t;
598
599 /** Configuration structure of the SAR2 HW block */
600 typedef struct {
601 uint8_t preconditionTime; /**< The number of ADC clock cycles when Preconditioning is done
602 before the sample window starts. */
603 uint8_t powerupTime; /**< The number of cycles to wait for power up after
604 IDLE_PWRDWN. */
605 bool enableIdlePowerDown; /**< When idle automatically power is down, the analog if
606 true. */
607 cy_en_sar2_msb_stretch_mode_t msbStretchMode; /**< When the set uses 2 cycles for the Most Significant Bit
608 (MSB), see \ref cy_en_sar2_msb_stretch_mode_t */
609 bool enableHalfLsbConv; /**< When true takes an extra cycle to convert the half LSB and
610 add it to the 12-bit result for Missing Code Recovery */
611 bool sarMuxEnable; /**< Enable the SARMUX (only valid if sarIpEnable = true). */
612 bool adcEnable; /**< Enable the SAR ADC and SAR sequencer
613 (only valid if sarIpEnable = true). */
614 bool sarIpEnable; /**< Enable the SAR IP. */
615 cy_stc_sar2_channel_config_t * channelConfig[CY_SAR2_NUM_CHANNELS]; /**< Channel configuration pointer array. */
616 } cy_stc_sar2_config_t;
617
618 /** Digital calibration values. */
619 typedef struct {
620 uint16_t offset; /**< Digital offset correction. The valid range is [0..4095] */
621 int8_t gain; /**< Digital gain correction. The valid range is [-32..31] */
622 } cy_stc_sar2_digital_calibration_config_t;
623
624 /** Analog calibration values. */
625 typedef struct {
626 int8_t offset; /**< Analog offset correction. The valid range is [-128..127] */
627 int8_t gain; /**< Analog gain correction. The valid range is [-16..15] */
628 } cy_stc_sar2_analog_calibration_conifg_t;
629
630 /** Configuration structure of diagnosis function. */
631 typedef struct {
632 cy_en_sar2_diag_reference_select_t referenceSelect; /**< Select Diagnostic Reference function,
633 see \ref cy_en_sar2_diag_reference_select_t */
634 } cy_stc_sar2_diag_config_t;
635
636 /** Control freeze feature for debugging. */
637 typedef struct {
638 bool enableFreezeAdc0; /**< If true, freeze ADC0 in Debug mode. */
639 bool enableFreezeAdc1; /**< If true, freeze ADC1 in Debug mode. */
640 bool enableFreezeAdc2; /**< If true, freeze ADC2 in Debug mode. */
641 bool enableFreezeAdc3; /**< If true, freeze ADC3 in Debug mode. */
642 } cy_stc_sar2_debug_freeze_config_t;
643
644 /** \} group_sar2_data_structures */
645
646 /***************************************
647 * Function Prototypes
648 ***************************************/
649 /**
650 * \addtogroup group_sar2_functions
651 * \{
652 */
653
654 /* For each ADC */
655 cy_en_sar2_status_t Cy_SAR2_Init(PASS_SAR_Type * base, const cy_stc_sar2_config_t * config);
656 __STATIC_INLINE void Cy_SAR2_DeInit(PASS_SAR_Type * base);
657 __STATIC_INLINE void Cy_SAR2_Enable(PASS_SAR_Type * base);
658 __STATIC_INLINE void Cy_SAR2_Disable(PASS_SAR_Type * base);
659 __STATIC_INLINE uint32_t Cy_SAR2_GetPendingStatus(const PASS_SAR_Type * base);
660 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkValidStatus(const PASS_SAR_Type * base);
661 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkRangeStatus(const PASS_SAR_Type * base);
662 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkRangeHiStatus(const PASS_SAR_Type * base);
663 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkPulseStatus(const PASS_SAR_Type * base);
664 __STATIC_INLINE uint32_t Cy_SAR2_GetResultValidStatus(const PASS_SAR_Type * base);
665 __STATIC_INLINE uint32_t Cy_SAR2_GetResultRangeHiStatus(const PASS_SAR_Type * base);
666
667 /* For each channel */
668 cy_en_sar2_status_t Cy_SAR2_Channel_Init(PASS_SAR_Type * base, uint32_t channel,
669 const cy_stc_sar2_channel_config_t * channelConfig);
670 void Cy_SAR2_Channel_DeInit(PASS_SAR_Type * base, uint32_t channel);
671 uint16_t Cy_SAR2_Channel_GetResult(PASS_SAR_Type * base, uint32_t channel, uint32_t * status);
672 uint16_t Cy_SAR2_Channel_GetWorkingData(PASS_SAR_Type * base, uint32_t channel, uint32_t * status);
673 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetGroupStatus(PASS_SAR_Type * base, uint32_t channel);
674 __STATIC_INLINE void Cy_SAR2_Channel_Enable(PASS_SAR_Type * base, uint32_t channel);
675 __STATIC_INLINE void Cy_SAR2_Channel_Disable(PASS_SAR_Type * base, uint32_t channel);
676 __STATIC_INLINE void Cy_SAR2_Channel_SoftwareTrigger(PASS_SAR_Type * base, uint32_t channel);
677 __STATIC_INLINE void Cy_SAR2_Channel_SetInterruptMask(PASS_SAR_Type * base, uint32_t channel, uint32_t intrMask);
678 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetInterruptMask(PASS_SAR_Type * base, uint32_t channel);
679 __STATIC_INLINE void Cy_SAR2_Channel_ClearInterrupt(PASS_SAR_Type * base, uint32_t channel, uint32_t intrMask);
680 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetInterruptStatus(PASS_SAR_Type * base, uint32_t channel);
681 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetInterruptStatusMasked(PASS_SAR_Type * base, uint32_t channel);
682 __STATIC_INLINE void Cy_SAR2_Channel_SetInterrupt(PASS_SAR_Type * base, uint32_t channel, uint32_t intrMask);
683
684 /* For diagnosis function */
685 cy_en_sar2_status_t Cy_SAR2_Diag_Init(PASS_SAR_Type * base, const cy_stc_sar2_diag_config_t * diagConfig);
686 __STATIC_INLINE void Cy_SAR2_Diag_Enable(PASS_SAR_Type * base);
687 __STATIC_INLINE void Cy_SAR2_Diag_Disable(PASS_SAR_Type * base);
688
689 /* For calibration */
690 __STATIC_INLINE void Cy_SAR2_TriggerCalibrationUpdate(PASS_SAR_Type * base);
691 __STATIC_INLINE bool Cy_SAR2_IsCalibrationUpdateDone(PASS_SAR_Type * base);
692 cy_en_sar2_status_t Cy_SAR2_SetDigitalCalibrationValue(PASS_SAR_Type * base,
693 const cy_stc_sar2_digital_calibration_config_t * digCalibConfig);
694 cy_en_sar2_status_t Cy_SAR2_GetDigitalCalibrationValue(PASS_SAR_Type * base,
695 cy_stc_sar2_digital_calibration_config_t * digCalibConfig);
696 cy_en_sar2_status_t Cy_SAR2_SetAltDigitalCalibrationValue(PASS_SAR_Type * base,
697 const cy_stc_sar2_digital_calibration_config_t * altDigCalibConfig);
698 cy_en_sar2_status_t Cy_SAR2_GetAltDigitalCalibrationValue(PASS_SAR_Type * base,
699 cy_stc_sar2_digital_calibration_config_t * altDigCalibConfig);
700 cy_en_sar2_status_t Cy_SAR2_SetAnalogCalibrationValue(PASS_SAR_Type * base,
701 cy_stc_sar2_analog_calibration_conifg_t * analogCalibConfig);
702 cy_en_sar2_status_t Cy_SAR2_GetAnalogCalibrationValue(PASS_SAR_Type * base,
703 cy_stc_sar2_analog_calibration_conifg_t * analogCalibConfig);
704 cy_en_sar2_status_t Cy_SAR2_SetAltAnalogCalibrationValue(PASS_SAR_Type * base,
705 cy_stc_sar2_analog_calibration_conifg_t * altAnalogCalibConfig);
706 cy_en_sar2_status_t Cy_SAR2_GetAltAnalogCalibrationValue(PASS_SAR_Type * base,
707 cy_stc_sar2_analog_calibration_conifg_t * altAnalogCalibConfig);
708
709 /* For debugging */
710 __STATIC_INLINE cy_en_sar2_ref_buf_mode_t Cy_SAR2_GetReferenceBufferMode(PASS_EPASS_MMIO_Type * base);
711 __STATIC_INLINE void Cy_SAR2_SetReferenceBufferMode(PASS_EPASS_MMIO_Type * base, cy_en_sar2_ref_buf_mode_t mode);
712 cy_en_sar2_status_t Cy_SAR2_SetDebugFreezeMode(PASS_EPASS_MMIO_Type * base,
713 const cy_stc_sar2_debug_freeze_config_t * debConfig);
714
715 /* For SAR general trigger input / output trigger setting */
716 cy_en_sar2_status_t Cy_SAR2_SetGenericTriggerInput(PASS_EPASS_MMIO_Type * base, uint8_t numOfAdc,
717 uint8_t triggerInputNumber, uint8_t genericTriggerValue);
718 cy_en_sar2_status_t Cy_SAR2_SetGenericTriggerOutput(PASS_EPASS_MMIO_Type * base, uint8_t numOfAdc,
719 uint8_t triggerOutputNumber, uint8_t genericTriggerValue);
720
721 /* For temperature measurements */
722 double Cy_SAR2_CalculateDieTemperature(cy_en_sar2_vdda_range_t VDDARange, uint16_t adcVtempRawValue,
723 uint16_t adcVbgRawValue);
724
725 /*******************************************************************************
726 * In-line Function Implementation
727 *******************************************************************************/
728
729 /*******************************************************************************
730 * Function Name: Cy_SAR2_Enable
731 ****************************************************************************//**
732 *
733 * Enables the SAR ADC block.
734 *
735 * \param base : The pointer to the SAR block.
736 *
737 *******************************************************************************/
Cy_SAR2_Enable(PASS_SAR_Type * base)738 __STATIC_INLINE void Cy_SAR2_Enable(PASS_SAR_Type * base)
739 {
740 base->CTL |= PASS_SAR_CTL_ENABLED_Msk;
741 }
742
743 /*******************************************************************************
744 * Function Name: Cy_SAR2_Disable
745 ****************************************************************************//**
746 *
747 * Disables the SAR ADC block.
748 *
749 * \param base : The pointer to the SAR block.
750 *
751 *******************************************************************************/
Cy_SAR2_Disable(PASS_SAR_Type * base)752 __STATIC_INLINE void Cy_SAR2_Disable(PASS_SAR_Type * base)
753 {
754 base->CTL &= ~PASS_SAR_CTL_ENABLED_Msk;
755 }
756
757 /*******************************************************************************
758 * Function Name: Cy_SAR2_DeInit
759 ****************************************************************************//**
760 *
761 * De-initializes the SAR ADC block, returns the register values to default.
762 *
763 * \param base : The pointer to the SAR block.
764 *
765 *******************************************************************************/
Cy_SAR2_DeInit(PASS_SAR_Type * base)766 __STATIC_INLINE void Cy_SAR2_DeInit(PASS_SAR_Type * base)
767 {
768 base->PRECOND_CTL = 0UL;
769 base->CTL = 0UL;
770 }
771
772 /*******************************************************************************
773 * Function Name: Cy_SAR2_GetPendingStatus
774 ****************************************************************************//**
775 *
776 * Returns the trigger pending status.
777 *
778 * \param base
779 * The pointer to the SAR instance.
780 *
781 * \return Pending status. Each bit corresponds a channel, i.e.
782 * If bit0 is 1, ch.0 is pending for a trigger.
783 *
784 *******************************************************************************/
Cy_SAR2_GetPendingStatus(const PASS_SAR_Type * base)785 __STATIC_INLINE uint32_t Cy_SAR2_GetPendingStatus(const PASS_SAR_Type * base)
786 {
787 return base->TR_PEND;
788 }
789
790 /*******************************************************************************
791 * Function Name: Cy_SAR2_GetWorkValidStatus
792 ****************************************************************************//**
793 *
794 * Returns the work register valid status.
795 *
796 * \param base
797 * The pointer to the SAR instance.
798 *
799 * \return Work register valid status. Each bit corresponds a channel, i.e.
800 * If bit0 is 1, ch.0's work register is valid.
801 *
802 *******************************************************************************/
Cy_SAR2_GetWorkValidStatus(const PASS_SAR_Type * base)803 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkValidStatus(const PASS_SAR_Type * base)
804 {
805 return base->WORK_VALID;
806 }
807
808 /*******************************************************************************
809 * Function Name: Cy_SAR2_GetWorkRangeStatus
810 ****************************************************************************//**
811 *
812 * Returns work register range status.
813 *
814 * \param base
815 * The pointer to the SAR instance.
816 *
817 * \return Work register range status. Each bit correspond a channel, i.e.
818 * If bit0 is 1, ch.0 detected a range.
819 *
820 *******************************************************************************/
Cy_SAR2_GetWorkRangeStatus(const PASS_SAR_Type * base)821 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkRangeStatus(const PASS_SAR_Type * base)
822 {
823 return base->WORK_RANGE;
824 }
825
826 /*******************************************************************************
827 * Function Name: Cy_SAR2_GetWorkRangeHiStatus
828 ****************************************************************************//**
829 *
830 * Returns work register range high status.
831 *
832 * \param base
833 * The pointer to the SAR instance.
834 *
835 * \return Work register range Hi status. Each bit corresponds a channel, i.e.
836 * If bit0 is 1, ch.0 detected "out of range" and the value was above the high
837 * threshold.
838 *
839 *******************************************************************************/
Cy_SAR2_GetWorkRangeHiStatus(const PASS_SAR_Type * base)840 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkRangeHiStatus(const PASS_SAR_Type * base)
841 {
842 return base->WORK_RANGE_HI;
843 }
844
845 /*******************************************************************************
846 * Function Name: Cy_SAR2_GetWorkPulseStatus
847 ****************************************************************************//**
848 *
849 * Returns the work register pulse status.
850 *
851 * \param base
852 * The pointer to the SAR instance.
853 *
854 * \return Work register pulse status. Each bit corresponds a channel, i.e.
855 * If bit0 is 1, ch.0 detected a pulse.
856 *
857 *******************************************************************************/
Cy_SAR2_GetWorkPulseStatus(const PASS_SAR_Type * base)858 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkPulseStatus(const PASS_SAR_Type * base)
859 {
860 return base->WORK_PULSE;
861 }
862
863 /*******************************************************************************
864 * Function Name: Cy_SAR2_GetResultValidStatus
865 ****************************************************************************//**
866 *
867 * Returns result register valid status.
868 *
869 * \param base
870 * The pointer to the SAR instance.
871 *
872 * \return Result register pulse status. Each bit corresponds a channel, i.e.
873 * If bit0 is 1, ch.0's result register is valid.
874 *
875 *******************************************************************************/
Cy_SAR2_GetResultValidStatus(const PASS_SAR_Type * base)876 __STATIC_INLINE uint32_t Cy_SAR2_GetResultValidStatus(const PASS_SAR_Type * base)
877 {
878 return base->RESULT_VALID;
879 }
880
881 /*******************************************************************************
882 * Function Name: Cy_SAR2_GetResultRangeHiStatus
883 ****************************************************************************//**
884 *
885 * Returns result register range high status.
886 *
887 * \param base
888 * The pointer to the SAR instance.
889 *
890 * \return Result register range high. Each bit corresponds a channel, i.e.
891 * If bit0 is 1, ch.0 detected "out of range" and the value was above the high
892 * threshold.
893 *
894 *******************************************************************************/
Cy_SAR2_GetResultRangeHiStatus(const PASS_SAR_Type * base)895 __STATIC_INLINE uint32_t Cy_SAR2_GetResultRangeHiStatus(const PASS_SAR_Type * base)
896 {
897 return base->RESULT_RANGE_HI;
898 }
899
900 /*******************************************************************************
901 * Function Name: Cy_SAR2_Channel_Enable
902 ****************************************************************************//**
903 *
904 * Enables a corresponding channel.
905 *
906 * \param base
907 * The pointer to the SAR instance.
908 *
909 * \param channel
910 * The channel number.
911 *
912 * \note To enable a group either start with enabling the last channel first
913 * and the first channel last, or start the trigger after all channels are
914 * enabled.
915 *
916 *******************************************************************************/
Cy_SAR2_Channel_Enable(PASS_SAR_Type * base,uint32_t channel)917 __STATIC_INLINE void Cy_SAR2_Channel_Enable(PASS_SAR_Type * base, uint32_t channel)
918 {
919 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
920
921 base->CH[channel].ENABLE |= PASS_SAR_CH_ENABLE_CHAN_EN_Msk;
922 }
923
924 /*******************************************************************************
925 * Function Name: Cy_SAR2_Channel_Disable
926 ****************************************************************************//**
927 *
928 * Disables a corresponding channel.
929 *
930 * \param base
931 * The pointer to the SAR instance.
932 *
933 * \param channel
934 * The channel number.
935 *
936 * \note To disable a group either stop the trigger first or begin with disabling
937 * the lowest channel first.
938 *
939 *******************************************************************************/
Cy_SAR2_Channel_Disable(PASS_SAR_Type * base,uint32_t channel)940 __STATIC_INLINE void Cy_SAR2_Channel_Disable(PASS_SAR_Type * base, uint32_t channel)
941 {
942 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
943
944 base->CH[channel].ENABLE &= ~PASS_SAR_CH_ENABLE_CHAN_EN_Msk;
945 }
946
947 /*******************************************************************************
948 * Function Name: Cy_SAR2_Channel_SoftwareTrigger
949 ****************************************************************************//**
950 *
951 * Issues a software start trigger.
952 *
953 * \param base
954 * The pointer to the SAR instance.
955 *
956 * \param channel
957 * The channel number.
958 *
959 *******************************************************************************/
Cy_SAR2_Channel_SoftwareTrigger(PASS_SAR_Type * base,uint32_t channel)960 __STATIC_INLINE void Cy_SAR2_Channel_SoftwareTrigger(PASS_SAR_Type * base, uint32_t channel)
961 {
962 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
963
964 SAR2_CH_TR_CMD(base, channel) |= _VAL2FLD(PASS_SAR_CH_TR_CMD_START, 1UL);
965 }
966
967 /*******************************************************************************
968 * Function Name: Cy_SAR2_Diag_Enable
969 ****************************************************************************//**
970 *
971 * Enables the diagnostic function.
972 *
973 * \param base: The pointer to the hardware SAR block.
974 *
975 *******************************************************************************/
Cy_SAR2_Diag_Enable(PASS_SAR_Type * base)976 __STATIC_INLINE void Cy_SAR2_Diag_Enable(PASS_SAR_Type * base)
977 {
978 base->DIAG_CTL |= _VAL2FLD(PASS_SAR_DIAG_CTL_DIAG_EN, 1UL);
979 }
980
981 /*******************************************************************************
982 * Function Name: Cy_SAR2_Diag_Disable
983 ****************************************************************************//**
984 *
985 * Disables the diagnostic function.
986 *
987 * \param base: The pointer to the hardware SAR block.
988 *
989 *******************************************************************************/
Cy_SAR2_Diag_Disable(PASS_SAR_Type * base)990 __STATIC_INLINE void Cy_SAR2_Diag_Disable(PASS_SAR_Type * base)
991 {
992 base->DIAG_CTL &= ~PASS_SAR_DIAG_CTL_DIAG_EN_Msk;
993 }
994
995 /*******************************************************************************
996 * Function Name: Cy_SAR2_TriggerCalibrationUpdate
997 ****************************************************************************//**
998 *
999 * Triggers calibration update. After triggering, coherently copies the values
1000 * from alternate calibration regs to the current calibration regs.
1001 *
1002 * \param base: The pointer to the hardware SAR block.
1003 *
1004 * \note Set an alternate calibration value before calling this function.
1005 * After triggering, calibration will be updated as soon as the SAR is
1006 * idle or a "continuous" triggered group completes.
1007 * To determine whether calibration update is done or not call
1008 * the Cy_SAR2_IsCalibrationUpdateDone function.
1009 *******************************************************************************/
Cy_SAR2_TriggerCalibrationUpdate(PASS_SAR_Type * base)1010 __STATIC_INLINE void Cy_SAR2_TriggerCalibrationUpdate(PASS_SAR_Type * base)
1011 {
1012 base->CAL_UPD_CMD = _VAL2FLD(PASS_SAR_CAL_UPD_CMD_UPDATE, 1UL);
1013 }
1014
1015 /*******************************************************************************
1016 * Function Name: Cy_SAR2_IsCalibrationUpdateDone
1017 ****************************************************************************//**
1018 *
1019 * Gets the status of calibration update.
1020 *
1021 * \param base: The pointer to the hardware SAR block.
1022 *
1023 * \return If true, calibration update is done.
1024 * If false, calibration update is not yet done.
1025 *
1026 *******************************************************************************/
Cy_SAR2_IsCalibrationUpdateDone(PASS_SAR_Type * base)1027 __STATIC_INLINE bool Cy_SAR2_IsCalibrationUpdateDone(PASS_SAR_Type * base)
1028 {
1029 return (_FLD2BOOL(PASS_SAR_CAL_UPD_CMD_UPDATE, base->CAL_UPD_CMD));
1030 }
1031
1032 /*******************************************************************************
1033 * Function Name: Cy_SAR2_Channel_SetInterruptMask
1034 ****************************************************************************//**
1035 *
1036 * Configures the channel interrupt.
1037 *
1038 * \param base
1039 * The pointer to the SAR instance.
1040 *
1041 * \param channel
1042 * The channel number.
1043 *
1044 * \param intrMask
1045 * The mask of interrupts. Select one or more values from
1046 * \ref group_sar2_macros_interrupt and "OR" them together:
1047 * - \ref CY_SAR2_INT_GRP_DONE
1048 * - \ref CY_SAR2_INT_GRP_CANCELLED
1049 * - \ref CY_SAR2_INT_GRP_OVERFLOW
1050 * - \ref CY_SAR2_INT_CH_RANGE
1051 * - \ref CY_SAR2_INT_CH_PULSE
1052 * - \ref CY_SAR2_INT_CH_OVERFLOW
1053 *
1054 *******************************************************************************/
Cy_SAR2_Channel_SetInterruptMask(PASS_SAR_Type * base,uint32_t channel,uint32_t intrMask)1055 __STATIC_INLINE void Cy_SAR2_Channel_SetInterruptMask(PASS_SAR_Type * base, uint32_t channel, uint32_t intrMask)
1056 {
1057 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
1058
1059 SAR2_CH_INTR_MASK(base, channel) = (intrMask & CY_SAR2_INTR);
1060 }
1061
1062 /*******************************************************************************
1063 * Function Name: Cy_SAR2_Channel_GetInterruptMask
1064 ****************************************************************************//**
1065 *
1066 * Returns interrupt mask configuration.
1067 *
1068 * \param base
1069 * The pointer to the SAR instance.
1070 *
1071 * \param channel
1072 * The channel number.
1073 *
1074 * \return Interrupt mask value \ref group_sar2_macros_interrupt
1075 *
1076 *******************************************************************************/
Cy_SAR2_Channel_GetInterruptMask(PASS_SAR_Type * base,uint32_t channel)1077 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetInterruptMask(PASS_SAR_Type * base, uint32_t channel)
1078 {
1079 return SAR2_CH_INTR_MASK(base, channel);
1080 }
1081
1082 /*******************************************************************************
1083 * Function Name: Cy_SAR2_Channel_ClearInterrupt
1084 ****************************************************************************//**
1085 *
1086 * Clears the interrupt.
1087 * The interrupt must be cleared with this function so that the hardware
1088 * can set subsequent interrupts and those interrupts can be forwarded
1089 * to the interrupt controller, if enabled.
1090 *
1091 * \param base
1092 * The pointer to the SAR instance.
1093 *
1094 * \param channel
1095 * The channel number.
1096 *
1097 * \param intrMask
1098 * The mask of interrupts to clear. Typically this will be the value returned
1099 * from \ref Cy_SAR_GetInterruptStatus.
1100 * Alternately, select one or more values from \ref group_sar2_macros_interrupt
1101 * and "OR" them together.
1102 * - \ref CY_SAR2_INT_GRP_DONE
1103 * - \ref CY_SAR2_INT_GRP_CANCELLED
1104 * - \ref CY_SAR2_INT_GRP_OVERFLOW
1105 * - \ref CY_SAR2_INT_CH_RANGE
1106 * - \ref CY_SAR2_INT_CH_PULSE
1107 * - \ref CY_SAR2_INT_CH_OVERFLOW
1108 *
1109 *******************************************************************************/
Cy_SAR2_Channel_ClearInterrupt(PASS_SAR_Type * base,uint32_t channel,uint32_t intrMask)1110 __STATIC_INLINE void Cy_SAR2_Channel_ClearInterrupt(PASS_SAR_Type * base, uint32_t channel, uint32_t intrMask)
1111 {
1112 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
1113
1114 SAR2_CH_INTR(base, channel) = (intrMask & CY_SAR2_INTR);
1115 /* This dummy reading is necessary here. It provides a guarantee that interrupt is cleared at returning from this function. */
1116 (void) SAR2_CH_INTR(base, channel);
1117 }
1118
1119 /*******************************************************************************
1120 * Function Name: Cy_SAR2_Channel_GetInterruptStatus
1121 ****************************************************************************//**
1122 *
1123 * Returns the channel interrupt register status.
1124 *
1125 * \param base
1126 * The pointer to the SAR instance.
1127 *
1128 * \param channel
1129 * The channel number.
1130 *
1131 * \return status
1132 * Contents of the channel interrupt register. See
1133 * \ref group_sar2_macros_interrupt.
1134 *
1135 *******************************************************************************/
Cy_SAR2_Channel_GetInterruptStatus(PASS_SAR_Type * base,uint32_t channel)1136 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetInterruptStatus(PASS_SAR_Type * base, uint32_t channel)
1137 {
1138 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
1139
1140 return (SAR2_CH_INTR(base, channel));
1141 }
1142
1143 /*******************************************************************************
1144 * Function Name: Cy_SAR2_Channel_GetInterruptStatusMasked
1145 ****************************************************************************//**
1146 *
1147 * Returns interrupt status.
1148 *
1149 * \param base
1150 * The pointer to the SAR instance.
1151 *
1152 * \param channel
1153 * The channel number.
1154 *
1155 * \return status
1156 * Contents of the channel interrupt register. See
1157 * \ref group_sar2_macros_interrupt.
1158 *
1159 *******************************************************************************/
Cy_SAR2_Channel_GetInterruptStatusMasked(PASS_SAR_Type * base,uint32_t channel)1160 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetInterruptStatusMasked(PASS_SAR_Type * base, uint32_t channel)
1161 {
1162 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
1163
1164 return (SAR2_CH_INTR_MASKED(base, channel));
1165 }
1166
1167 /*******************************************************************************
1168 * Function Name: Cy_SAR2_Channel_SetInterrupt
1169 ****************************************************************************//**
1170 *
1171 * Triggers an interrupt with software.
1172 *
1173 * \param base
1174 * The pointer to the SAR instance.
1175 *
1176 * \param channel
1177 * The channel number.
1178 *
1179 * \param intrMask
1180 * The mask of interrupts to set.
1181 * Select one or more values from \ref group_sar2_macros_interrupt and "OR" them
1182 * together.
1183 * - \ref CY_SAR2_INT_GRP_DONE
1184 * - \ref CY_SAR2_INT_GRP_CANCELLED
1185 * - \ref CY_SAR2_INT_GRP_OVERFLOW
1186 * - \ref CY_SAR2_INT_CH_RANGE
1187 * - \ref CY_SAR2_INT_CH_PULSE
1188 * - \ref CY_SAR2_INT_CH_OVERFLOW
1189 *
1190 *******************************************************************************/
Cy_SAR2_Channel_SetInterrupt(PASS_SAR_Type * base,uint32_t channel,uint32_t intrMask)1191 __STATIC_INLINE void Cy_SAR2_Channel_SetInterrupt(PASS_SAR_Type * base, uint32_t channel, uint32_t intrMask)
1192 {
1193 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
1194
1195 SAR2_CH_INTR_SET(base, channel) = (intrMask & CY_SAR2_INTR);
1196 }
1197
1198 /*******************************************************************************
1199 * Function Name: Cy_SAR2_Channel_GetGroupStatus
1200 ****************************************************************************//**
1201 *
1202 * Returns the group conversion status.
1203 *
1204 * \param base
1205 * The pointer to an SAR instance.
1206 *
1207 * \param channel
1208 * The channel number.
1209 *
1210 * \return status
1211 * The status of the group, conversion status bits ORed.
1212 *
1213 *******************************************************************************/
Cy_SAR2_Channel_GetGroupStatus(PASS_SAR_Type * base,uint32_t channel)1214 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetGroupStatus(PASS_SAR_Type * base, uint32_t channel)
1215 {
1216 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
1217
1218 return (base->CH[channel].GRP_STAT);
1219 }
1220
1221 /*******************************************************************************
1222 * Function Name: Cy_SAR2_SetReferenceBufferMode
1223 ****************************************************************************//**
1224 *
1225 * Sets ePASS MMIO reference buffer mode.
1226 *
1227 * \param base
1228 * The pointer to the PASS instance.
1229 *
1230 * \param mode
1231 * The reference buffer mode number.
1232 *
1233 *******************************************************************************/
Cy_SAR2_SetReferenceBufferMode(PASS_EPASS_MMIO_Type * base,cy_en_sar2_ref_buf_mode_t mode)1234 __STATIC_INLINE void Cy_SAR2_SetReferenceBufferMode(PASS_EPASS_MMIO_Type * base, cy_en_sar2_ref_buf_mode_t mode)
1235 {
1236 base->PASS_CTL = _CLR_SET_FLD32U(base->PASS_CTL, PASS_EPASS_MMIO_PASS_CTL_REFBUF_MODE, mode);
1237 }
1238
1239 /*******************************************************************************
1240 * Function Name: Cy_SAR2_GetReferenceBufferMode
1241 ****************************************************************************//**
1242 *
1243 * Gets ePASS MMIO reference buffer mode.
1244 *
1245 * \param base
1246 * The pointer to the PASS instance.
1247 *
1248 * \return
1249 * \ref cy_en_sar2_ref_buf_mode_t
1250 *
1251 *******************************************************************************/
Cy_SAR2_GetReferenceBufferMode(PASS_EPASS_MMIO_Type * base)1252 __STATIC_INLINE cy_en_sar2_ref_buf_mode_t Cy_SAR2_GetReferenceBufferMode(PASS_EPASS_MMIO_Type * base)
1253 {
1254 return (cy_en_sar2_ref_buf_mode_t)(int32_t)(uint32_t)_FLD2VAL(PASS_EPASS_MMIO_PASS_CTL_REFBUF_MODE, base->PASS_CTL);
1255 }
1256
1257
1258 /** \} group_sar2_functions */
1259
1260 #if defined(__cplusplus)
1261 }
1262 #endif
1263
1264 #endif /* CY_SAR2_H */
1265
1266 /** \} group_sar2 */
1267 #endif /* CY_IP_MXS40EPASS_ESAR */
1268
1269 /* [] END OF FILE */
1270
